Split-gate Field Effect Transistor Research Articles

Neuron Circuit Based on a Split-gate Transistor with Nonvolatile Memory for Homeostatic Functions of Biological Neurons.

To mimic the homeostatic functionality of biological neurons, a split-gate field-effect transistor (S-G FET) with a charge trap layer is proposed within a neuron circuit. By adjusting the number of charges trapped in the Si3N4 layer, the threshold voltage (Vth) of the S-G FET changes. To prevent degradation of the gate dielectric due to program/erase pulses, the gates for read operation and Vth control were separated through the fin structure. A circuit that modulates the width and amplitude of the pulse was constructed to generate a Program/Erase pulse for the S-G FET as the output pulse of the neuron circuit. By adjusting the Vth of the neuron circuit, the firing rate can be lowered by increasing the Vth of the neuron circuit with a high firing rate. To verify the performance of the neural network based on S-G FET, a simulation of online unsupervised learning and classification in a 2-layer SNN is performed. The results show that the recognition rate was improved by 8% by increasing the threshold of the neuron circuit fired.

Homogeneous Palladium Diselenide pn‐Junction Diodes for Reconfigurable Circuit Applications (Adv. Electron. Mater. 10/2022)

Reconfigurable Diode Circuit Applications Palladium diselenide (PdSe2) has recently emerged as a 2D material that has strong ambipolar property and air stability for use in future nano-electronic devices. Ambipolar semiconductor could easily accumulate the electron or hole carriers at the channel material by gate field modulation. Kimoon Lee, Young Tack Lee, and co-workers in article number 2101282 present the PdSe2-based split-gate field-effect transistor which can be formed as a switchable diode (like a one way road) and single-inversion AND (SAND) logic gate as well.

Longitudinal and latitudinal split-gate field-effect transistors for NAND and NOR logic circuit applications

Two-dimensional (2D) materials have been extensively adopted in various device architectures for advanced applications owing to their structural diversity, high functionality, and ease of integration. Among the various architectures, split-gate field-effect transistors (SG-FETs) have been widely studied based on their sequentially located SG electrode along the source/drain electrodes. In this paper, we propose two different homogeneous molybdenum disulfide (MoS2)-based SG-FET structures, namely AND-FET and OR-FET, whose gap directions are perpendicular to each other. It can exhibit AND or OR switching characteristics if it has a longitudinal or latitudinal gapped SG structure, respectively. Moreover, the AND-FET and OR-FET are regarded as folded structures of series and parallel connections of two n-type transistors. By using these switching devices, we successfully demonstrate NAND and NOR logic gates through a single active channel. These approaches are expected to pave the way for the realization of multi-functionality and high integration of 2D material-based future electronic devices.

Homogeneous Palladium Diselenide pn‐Junction Diodes for Reconfigurable Circuit Applications

AbstractLayered 2D materials, owing to their unique physical and electrical properties, have significant potential for use in future nanomaterial‐based electronic devices. Among these, palladium diselenide (PdSe2) has recently emerged as a distinct 2D material with air stability and strong ambipolar property. In this study, the versatility of a PdSe2‐based split‐gate field‐effect transistor (SG‐FET) using its stable ambipolar nature is demonstrated. By applying sequentially polarized SG biases, the PdSe2 SG‐FET could be operated as a homogeneous and reconfigurable pn‐junction diode. The optimized h‐BN/PdSe2/h‐BN sandwich SG‐FET exhibits almost symmetric behaviors in the n‐ and p‐channel regions, enabling a reconfigurable single‐inversion AND (SAND) logic gate function, which can be used as a phase difference‐detection circuit composed only of a single component. It is believed that this approach to the reconfigurable diode and its circuit application paves the way for future 2D material‐based electronics.

MoS2 based dual input logic AND gate

Crystalline monolayers of CVD MoS2 are used as the active semiconducting channel in a split-gate field effect transistor. The device demonstrates logic AND functionality that is controlled by independently addressing each gate terminal with ±10V. When +10V was simultaneously applied to both gates, the device was conductive (ON), while any other combination of gate voltages rendered the device resistive (OFF). The ON/OFF ratio of the device was ∼ 35 and the charge mobility using silicon nitride as the gate dielectric was 1.2cm2/V-s and 0.1cm2/V-s in the ON and OFF states respectively. Clear discrimination between the two states was observed when a simple circuit containing a load resistor was used to test the device logic AND functionality at 10Hz. One advantage is that split gate technology can reduce the number of devices required in complex circuits, leading to compact electronics and large scale integration based on intrinsic 2-D semiconducting materials.

Resonant plasmonic terahertz detection in graphene split-gate field-effect transistors with lateral p–n junctions

We evaluate the proposed resonant terahertz (THz) detectors on the basis of field-effect transistors (FETs) with split gates, electrically induced lateral p–n junctions, uniform graphene layer (GL) or perforated (in the p–n junction depletion region) graphene layer (PGL) channel. The perforated depletion region forms an array of the nanoconstions or nanoribbons creating the barriers for the holes and electrons. The operation of the GL-FET- and PGL-FET-detectors is associated with the rectification of the ac current across the lateral p–n junction enhanced by the excitation of bound plasmonic oscillations in the p- and n-sections of the channel. Using the developed device model, we find the GL-FET- and PGL-FET-detector characteristics. These detectors can exhibit very high voltage responsivity at the THz radiation frequencies close to the frequencies of the plasmonic resonances. These frequencies can be effectively voltage tuned. We show that in PL-FET-detectors the dominant mechanism of the current rectification is due to the tunneling nonlinearity, whereas in the PGL-FET-detector the current rectification is primarily associated with the thermionic processes. Due to much lower p–n junction conductance in the PGL-FET-detectors, their resonant response can be substantially more pronounced than in the GL-FET-detectors corresponding to fairly high detector responsivity.

Simulation Study on a New Dual-Material Nanowire MOS Surrounding-Gate Transistor

In this paper, a novel field effect nanowire MOS transistor taking advantage of both dual-material gate and surrounding gate is proposed and performance characteristics are demonstrated numerically in detail. Surrounding-gate transistor is known to be used to enhance the electrostatic control of the channel, and dual-material-gate structure is extended from split-gate field effect transistor to obtain larger current and better short-channel performance. Three dimensional device simulations with Sentaurus Device are performed on this dual-material surrounding-gate transistor. Higher driving current, high ION/IOFF ratio and suppressed short-channel effects are obtained with this novel device structure.

Split‐Gate Organic Field Effect Transistors: Control Over Charge Injection and Transport

A split-gate field effect transistor containing four electrodes, source, drain, two gates allows enhanced transport for specific carrier species and separate control of carrier polarity over two gate regimes. The device can be operated as a transistor or a diode by controlling gate biases.

Demonstration of logic AND device using a split-gate pentacene field effect transistor

We report on the fabrication and performance of pentacene-based split-gate field effect transistors (FETs) on doped Si/SiO 2 substrates. Several transistors with split gate structures were fabricated and demonstrated AND logic functionality. The transistor’s functionality was controlled by applying either 0 or − 10 V to each of the gate electrodes. When − 10 V was simultaneously applied to both gates, the transistor was conductive (ON), while any other combination of gate voltages rendered the transistor highly resistive (OFF). A significant advantage of this device is that AND logic devices with multiple inputs can be built using a single pentacene channel with multiple gates. The p-type carrier mobility of charge within the pentacene active layer of these transistors was about 10 − 5 cm 2/V-s. We attribute the low value of mobility primarily to the sharp contours of the pentacene film between the drain and the source contacts and to defects in the pentacene film. The average charge density was 1.4 × 10 12 holes/cm 2. Despite low mobility, the devices operated at lower drain-source ( V DS) and gate-source ( V GS) voltages as compared with previously reported pentacene based FETs.

Split-gate field-effect transistor

We propose a new field-effect transistor (FET) where the gate voltage swing (i.e., the difference between the gate voltage and the threshold voltage) is varied along the channel in such a way that charge carriers are accelerated more rapidly and the average carrier velocity in the channel is increased. This can be achieved either by making the threshold voltage to be a function of position or by using a new device structure—split-gate FET (SFET). In both cases a smaller gate voltage swing close to the source leads to a higher electric field in this portion of the channel and, hence, to a more rapid increase of the carrier drift velocity with distance. Calculations of the device transconductances for a heterostructure SFET using a charge-control model show that the performance in the split-gate device is considerably improved compared to a conventional device. The improved electric field and potential distributions in a SFET should make it possible to utilize ballistic effects in this lateral device.