Solid Phase Epitaxial Growth Research Articles

Formation of Ge dot or film in Ge/Si heterostructure by using sub-monolayer carbon deposition on top and in-situ post annealing

Effects of carbon (C) atoms on solid-phase epitaxial growth of Ge on Si(100) have been studied. C and Ge layers were deposited on Si(100) substrates at low temperature (150–300°C) by using solid-source molecular beam epitaxy (MBE) system and subsequently annealed at 650°C in the MBE chamber. The surface morphology after annealing changed depending on deposited amounts of C and deposition temperature of Ge. Ge dots were formed for small amounts of C while smooth Ge films were formed by large amounts of C varying with the Ge deposition temperature. The surface morphology after annealing was also affected by the as-deposited Ge crystallinity. The change in surface morphology depending on the amounts of deposited C was considered to be affected by the formation of Ge–C bonds which relieved the misfit strain between Ge and Si. The crystallinity of Ge deteriorated with increasing C coverage due to the incorporation of insoluble C atoms in the shape of both dots and films.

Recrystallization of He-ion implanted 6H-SiC upon annealing

Solid phase epitaxial growth of amorphous 6H-SiC created by 15keV He ion implantation to doses of 1.5×1016, 5×1016 and 1×1017cm−2 at room temperature (RT) followed by annealing ranging from 600°C to 900°C for 30min was investigated. The recrystallization process was investigated via cross-sectional transmission electron microscopy (XTEM). Recrystallization initially nucleates and grows at the interface between the amorphous layer and 6H-SiC substrate. In the middle of the amorphous layer, recrystallization nucleation is inhibited. Recrystallization rate is related to the implantation-induced damage and concentration of He impurity. The Fourier transformed images denote that the region of recrystallization contains 3C-SiC and 6H-SiC with different crystalline orientations. Besides, for the 1×1017cm−2 implanted sample, partial areas are kept amorphous in the damaged layer. The threshold temperature of full recrystallization of He ion-implantation-induced amorphization in 6H-SiC and the previous observations on other ions implantation, such as Ne, Ar, Xe etc is compared. The possible reasons are discussed.

Invited; Solid Phase Epitaxy of GeSn Alloys on Silicon and Integration in MOSFET Devices

Single crystalline Ge compounds (SiGe, GeSn) have interesting electrical and optical properties [1], rendering them well-suited to a wide variety of applications. GeSn has been predicted to exhibit carrier mobilities exceeding that of Ge [2], which makes this material suitable as a channel material for high-speed complementary metal-oxide semiconductor (CMOS) technology [3]. In addition to increased carrier mobility, the GeSn material system is interesting for its optical properties. GeSn exhibits a direct band gap between 0.61 and 0.35 eV for Sn concentrations between 6 and 15 % [4]. This makes it much better fit for optoelectronic applications than Si and Ge, especially at long wavelengths.Epitaxial growth of GeSn on Si substrates poses several challenges including a limited solubility of Sn in Ge (0.5%), compositional fluctuations, Sn segregation and a large lattice mismatch (>4%). It is critical to suppress these effects while simultaneously optimizing the GeSn layer characteristics for the basis of high performance devices.Recently, we demonstrated the growth of single crystalline GeSn layers with excellent structural quality grown on Si(111) substrates, by solid phase epitaxy (SPE) of amorphous GeSn alloys[5]. This technique has an advantage in the realization of thin GeSn layers directly on Si. We do not use surfactants, a capping layer, nor a buffer layer. Amorphous GeSn layers are obtained by the co-evaporation of Ge and Sn atoms, with beam equivalent pressures of 1.33 x 10-7 Torr for Ge and 9 x 10-9 Torr for Sn, while exposing the substrate to a N2 flux with a beam equivalent pressure of about 1 x 10-5 Torr, at a deposition temperature around RT. Subsequent annealing transforms the amorphous GeSn into a single crystalline layer via solid phase epitaxy. Excellent structural quality is demonstrated for layers with up to 6.1 % of Sn. The GeSn layers show tensile strain (up to +0.34%), which lowers the difference between the direct and indirect band transition and makes this method promising for obtaining direct band gap group IV layers. GeSn with 4.5% Sn shows increased optical absorption compared to Ge and an optical band gap of 0.52 eV. Furthermore, the surface and interface are smooth (RMS roughness < 1 nm), despite the relaxation of the layers.Additional structural investigation by XRD and TEM showed the presence of twin defects in the GeSn layers after crystallization. These defects can have a significant impact on the carrier mobility and it is therefore important to suppress the formation of twin defects during crystallization. The formation of twin defects is likely related to the presence of contaminants, in particular oxygen, at the interface between the crystalline substrate and the amorphous layer leading to the roughening of the amorphous-crystalline interface during SPE growth. We have developed a 2-step deposition process which successfully suppresses the formation of such twin defects.Additionally, we demonstrate excellent electrical properties of the GeSn layers by the fabrication of depletion-mode GeSn pMOSFETs on Si(111) using SPE of amorphous GeSn layers, TaN/Al2O3 metal-gate/high-k gate stacks, and Ni-based metal S/D contacts. The GeSn MOSFET devices show +100% improvement in hole mobility with respect to bulk Si and good transfer characteristics with On/Off ratio of ~100 for ultrathin (<10 nm) GeSn layers on Si [6].Finally, we also demonstrate successful crystallization of amorphous SiGe layers, deposited by plasma enhanced chemical vapor deposition (PECVD) on Si substrates and annealing in N2 atmosphere. The SiGe layers show excellent structural quality for compositions ranging from Ge- to Si-rich.[1] J. Kouvetakis et al., Ann. Rev. Mater. Res. 36, 497 (2006)[2] J. D. Sau and M. L. Cohen, Phys. Rev. B 75, 045208 (2007)[3] C. Merckling et al., Appl. Phys. Lett. 11, 192110 (2011)[4] G. He and H. A. Atwater, Phys. Rev. Lett. 79, 1937 (1997)[5] R. R. Lieten et al., Appl. Phys. Lett. 102, 052106 (2013)[6] R. R. Lieten et al., Appl. Phys. Express 6, 101301 (2013)

Shallow junction characteristics due to low temperature BGe molecular ion implantation into silicon

Abstract In this study, shallow junction characteristics produced by implanting 2 × 1015 cm−2 77 keV BGe molecular ions into n-type silicon wafers at liquid nitrogen temperature (LT) and room temperature (RT) were investigated. Post-annealing methods employed consisted of furnace annealing (FA) at 550 °C for 0.5, 1, 2, and 3 h and rapid thermal annealing (RTA) at 1050 °C for 25 s. In particular, one-step (FA) and two-step (FA + RTA) post-annealing treatments were conducted. The shallow junction characteristics that were examined included junction depth, sheet resistance, crystalline recovery, and damage microstructure, and were measured using secondary ion mass spectrometry (SIMS), a four-point probe, Raman scattering spectroscopy (RSS), and cross-sectional transmission electron microscopy (XTEM), respectively. The as-implanted results revealed that the LT specimen retains a greater amount of implantation damage than the RT one does due to the occurrence of less in situ annealing in the former during ion implantation. However, the as-annealed results indicated that the shallow junction characteristics of the LT specimens are superior to those of the RT ones when annealing time in FA is greater than 1 h, which is caused by a greater solid phase epitaxial growth (SPEG) rate in the former to anneal out more damage during annealing. Notably, an annealing time of 3 h in FA is needed in order to achieve optimal crystalline recovery and electrical activation in both the one- and two-step post-annealing treatments under investigation. The same holds for both the LT and RT implantations.

Bulk-Si photonics technology for DRAM interface [Invited

We present photonics technology based on a bulk-Si substrate for cost-sensitive dynamic random-access memory (DRAM) optical interface application. We summarize the progress on passive and active photonic devices using a local-crystallized Si waveguide fabricated by solid phase epitaxy or laser-induced epitaxial growth on bulk-Si substrate. The process of integration of a photonic integrated circuit (IC) with an electronic IC is demonstrated using a 65 nm DRAM periphery process on 300 mm wafers to prove the possibility of seamless integration with various complementary metal-oxide-semiconductor devices. Using the bulk-Si photonic devices, we show the feasibility of high-speed multidrop interface: the Mach–Zehnder interferometer modulators and commercial photodetectors are used to demonstrate four-drop link operation at 10 Gb/s, and the transceiver chips with photonic die and electronic die work for the DDR3 DRAM interface at 1.6 Gb/s under a 1∶4 multidrop configuration.

Systematic study of surface magnetism in Si(111)–Fe system grown by solid phase epitaxy: In situ schematic magnetic phase diagram of Si(111)–Fe

We have studied in situ structures and magnetic properties for several iron silicides grown on Si(111)7×7 clean surfaces by the solid phase epitaxy (SPE) method: deposition of Fe at 40K and subsequently annealing, and summarized almost all silicide phases depending on the deposition thickness and the annealing temperature as a “schematic magnetic phase diagram”. In the SPE growth, bcc-Fe(111)1×1, c-FeSi(111)1×1, 2×2, and c(4×8), α-FeSi2(112)2×2, ϵ-FeSi(111)√3 ×√ 3-R30°, β-FeSi2(101)/(110) and polycrystalline phases are formed on Si(111)7×7 surfaces depending on Fe coverage (0.15–10.0nm) and annealing temperature (470–1070K). The structures and magnetic properties of all the above Fe silicide phases have been characterized by using in situ reflection high-energy electron diffraction, scanning tunneling microscopy, and surface magneto-optical Kerr effect. Bulk-unstable c-FeSi phases showed ferromagnetic property at 40K and this ferromagnetism remained even after air exposure. For the c-FeSi(111)/Si(111) system, the large spin polarization was proposed at the Fe interface atoms in the B5-type interface structure between the c-FeSi(111) ultra-thin film and the Si(111) substrate by first-principle calculations.

Maskless nano-implant of 20 keV Ga+ in bulk Si(1 0 0) substrates

Multidirectional SPEG (Solid Phase Epitaxial Growth) of silicon has been investigated in micro and nanoamorphous structures generated on a crystalline substrate by a nano-sized ion beam, Gaussian shaped and with a standard deviation of about 5nm. The 20keVGa+ ions were implanted at a fluence of 5×1014ionscm−2 in a bulk Si(100) single crystal. Two structures were used for the implants: circular regions of 100nm and 1μm diameters respectively and straight lines 10nm in width and few microns in length along (100) or (110) directions. The lateral spread of ions has been taken into account in the damage estimation. Transmission Electron Microscopy indicates that the structures are made of an amorphous core surrounded by a defective and filamentary shell. The recovery of the damaged outer regions promptly occurs during the early stages of the thermal treatment at 500–600°C for all the structures. By prolonging annealing time, re-crystallization of the amorphous cores is achieved too by the movement of the underneath crystal–amorphous interface. The re-growth is almost defects free when the contribution of the crystalline seed below the structures is present, defective and twin mediated if it misses as in the thinnest regions of the specimen.

Lattice kinetic Monte Carlo modeling of germanium solid phase epitaxial growth

AbstractSolid phase epitaxial growth (SPEG) is a common tech¬nique used in the manufacturing processes of MOSFET technology. Even though a relatively broad knowledge is found for silicon, there is a greater uncertainty when it comes to germanium, which importance is arising in the last generation of microelectronic devices. To simu¬late this process, the need of a model which reproduces anisotropic growth and is able to detect and place twin defects becomes relevant, opening the possibility to sim¬ulate the interaction of different crystallographies, as it has been observed to be an important factor for some orientations, justifying by this mechanism experimental results.We present a Lattice Kinetic Monte Carlo (LKMC) model of Ge which is able to give an explanation of the different anisotropy effects in the recrystallization of substrate wafers through a defect formation formalism. An agreement between experimental observations and simulations is found by comparing regrowth velocities for different samples at different anneal conditions with LKMC simulations that consider twin defect formation for specific directions. Different regrowth velocities are found for distinct orientations of a solid phase epitaxial growth process within the annealed sample.(© 2014 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

Solid phase epitaxial growth of 3C–SiC thin film on Si and annihilation of nanopores

The solid phase epitaxial growth of 3C–SiC, 2–5nm thick, on (001) Si by annealing 1–2nm carbon overlayers has been investigated by transmission electron microscopy and X-ray photoelectron spectroscopy. High-temperature annealing in the range of 850–950°C results in solid phase cube-on-cube epitaxial growth of SiC films. This is accompanied by the formation of nanopores below the SiC epilayer in the Si substrate. Such nanopores, formed with truncated octahedron morphology consisting of {111} and (001) facets, are annihilated by diffusion of Ge deposited onto the SiC surface. It was also observed that the Ge islands on top of SiC exhibit a cube-on-cube orientation relation with SiC and the Ge overlayer reduces the density of faults in SiC considerably.

Formation of atomically smooth epitaxial metal films on a chemically reactive interface: Mg on Si(111)

Deposition of Mg on Si(111)7 \ifmmode\times\else\texttimes\fi{} 7 produces an epitaxial magnesium silicide layer. Under identical annealing conditions, the thickness of this Mg${}_{2}$Si(111) layer increases with deposition amount, reaching a maximum of 4 monolayer (ML) and decreasing to \ensuremath{\sim}3 ML at higher Mg coverage. Excess Mg coalesces into atomically flat, crystalline Mg(0001) films. This surprising growth mode can be attributed to the accidental commensurability of the Mg(0001), Si(111), and Mg${}_{2}$Si(111) interlayer spacing and the concurrent minimization of in-plane Si mass transfer and domain-wall energies. The commensurability of the interlayer spacing defines a highly unique solid-phase epitaxial growth process capable of producing trilayer structures with atomically abrupt interfaces and atomically smooth surface morphologies.

Regrowth characteristics of SiGe/Si by IBIEC and SPEG

Single crystalline Si1−xGex/Si with three kinds of Ge contents (x: 0.05, 0.1, and 0.2) with thicknesses of 400–440nm were amorphized by 500keV (x: 0.05 and 0.1) and 600keV (x: 0.2) Ge ion beam bombardment to a fluence of 1.0×1016ions/cm2 at room temperature. The regrowth behavior of the damaged layers were compared between ion beam induced epitaxial crystallization (IBIEC) by 2.0MeV Ge ions at 300°C to fluences of 1.0–3.0×1016ions/cm2 and solid phase epitaxial growth (SPEG) carried out in a flowing N2 ambient for up to 40min at 600°C. Rutherford backscattering spectroscopy (RBS) with channeling techniques revealed that crystallinity improvement by IBIEC tended to be saturated with increasing fluence while crystallinity improvement by SPEG was proceeded with increasing annealing time and relatively high quality SiGe layers were obtained. Crystallinity improvement was more rapid and pronounced for SiGe with higher Ge concentration both in IBIEC and SPEG. In contrast to the case of SPEG at 600°C, transmission electron microscope (TEM) image in SiGe treated by IBIEC showed that bunches of dislocation loops remained as islands surrounded by single crystalline lattice layers image, leading to the high RBS aligned yield even after completion of the layer-by-layer regrowth.

Modeling Two Dimensional Solid Phase Epitaxial Growth for Patterned Ge Substrates

Modeling the two-dimensional (2D)c solid phase epitaxial growth (SPEG) of amorphized Ge has become important due to the renewed interest in Ge as an alternative material in complementary metal-oxide-semiconductor (CMOS) devices. No one has modeled the two-dimensional 2D SPEG of amorphized Ge. In this work, a 2D SPEG model that uses level set techniques as implemented in the Florida object oriented process simulator (FLOOPS) to propagate regrowth fronts with variable crystallographic orientation patterned material is presented. Apart from the inherent orientation dependence of the SPEG velocity, it is established that nitride induced stress can affect mask edge defect formation for patterned samples. Data acquired from TEM experiments matches well with simulations, thus providing a stable model for simulating 2D regrowth and mask edge defect formation in Ge.

Maskless implants of 20 keV Ga+ in thin crystalline silicon on insulator

A nano-sized ion beam apparatus has been used as maskless lithography to implant 20 keV Ga+ ions into a 26 nm thick silicon crystalline film on insulator. The ion beam, with about 5 nm standard deviation, delivered few hundred ions during a single shot. Circular areas with nominal diameter of 20 or 50 nm were irradiated to a fluence of 5 × 1014/cm2. Transmission electron microscopy evidenced that the damaged regions are characterized by an irregular contour with many disordered filaments. Damage extends across the layer thickness and fast Fourier transform analysis indicates that implantation causes the amorphization of a region which extends beyond the nominal diameter. In situ annealing experiments demonstrated that the disordered filamentary regions disappear in the 250–450 °C temperature range and the interfaces with the surrounding crystalline regions sharpen. A temperature as high as 600 °C is required to fully re-crystallize the amorphous core of the implanted dots. Reordering occurs by multi-orientation lateral solid-phase epitaxial growth and the breaking of (111) and (101) interfaces, due to the formation of twins, triggers a fast crystallization kinetics. Rapid thermal annealing (890 °C-10 s) completely crystallizes the amorphous regions, twins are absent and small cluster of defects remains instead. Preliminary scanning capacitance measurements indicate that the implanted atoms, after crystallization, are electrically active. The implant method is then a viable processing step for the doping of non-bulk fully depleted ultra-thin-body MOSFET.

Substrate orientation dependence on the solid phase epitaxial growth rate of Ge

The solid phase epitaxial growth process has been studied at 330 °C by transmission electron microscopy for Ge wafers polished at 10°–15° increments from the [001] to [011] orientations. The velocity showed a strong dependence on substrate orientation with the [001] direction displaying a velocity 16 times greater than the [111] direction. A lattice kinetic Monte Carlo model was used to simulate solid phase epitaxial growth (SPEG) rates at different orientations, and simulations compared well with experimental results. Cross sectional transmission electron microscopy and plan view transmission electron microscopy revealed stacking fault and twin defect formation in the [111] orientation where all other orientations showed only hairpin dislocations. The twin defects formed from Ge SPEG were comparatively less dense than what has previously been reported for Si, which gave rise to higher normalized velocities and a constant [111] SPEG velocity for Ge.

Modeling Solid Phase Epitaxial Growth for Patterned Ge Substrates

Modeling the two-dimensional (2D) solid phase epitaxial growth (SPEG) of amorphized Ge has become important due to the renewed interest in Ge as an alternative material to Si in complementary metal-oxide-semiconductor (CMOS) devices. In this work, a 2D SPEG model that uses level set techniques as implemented in the Florida object oriented process simulator (FLOOPS) to propagate regrowth fronts with variable crystallographic orientation patterned material is presented. Apart from the inherent orientation dependence of the SPEG velocity, it is established that nitride-induced stress can affect mask edge defect formation for patterned samples. Data acquired from transmission electron microscopy (TEM) experiments matches well with simulations, thus providing a stable model for simulating 2D regrowth and mask edge defect formation in Ge. In comparison to Si, mask edge defect formation is less apparent in Ge due to a more isotropic orientation dependence for Ge SPEG.

A novel approach for preparing Fe(TexSy) superconducting films: solid phase epitaxial growth from amorphous precursors

Fe(TexSy) films were fabricated on (100) SrTiO3 substrates from Fe(Te0.65S0.16) amorphous precursors by a solid phase epitaxial growth process under various background atmospheric conditions. Structural analysis by x-ray diffraction showed strong peaks corresponding to Fe(TexSy) phases, when the amorphous precursors were heated with Fe(Te0.8S0.2) sintered pellets. The crystallinity of the films deteriorated at longer periods of heating but the compositional shifts were found to have decreased. Consequently, the critical temperature, TCzero, of the Fe(TexSy) film with minimum compositional shift was found to be 9.0 K and critical current density, JC, of the film was about 1.4 × 104 A cm−2.

Evaluation of Optical Waveguide by Solid Phase Epitaxial Growth of Amorphous Silicon

This study reports the evaluation of an optical waveguide fabricated on a bulk-Si platform by using an epitaxially grown Si layer. The epitaxial growth of Si is obtained by the solid phase epitaxy (SPE) using a hot furnace annealing method. It is observed that an optical propagation loss of the waveguide decreases with increasing the epitaxially grown area in the waveguide. In this study, an epitaxial growth rate is greatly enhanced by an (100) growth orientation due to the lower atomic close packing density along the (100) orientation. The optical propagation loss is also improved with the (100) growth orientation because of the higher crystalline quality and full epitaxial growth of Si.

Computer simulations of crystallization kinetics in amorphous silicon under pressure

With the help of computer simulations we have studied the crystallization kinetics of amorphous silicon in solid phase epitaxial (SPE) and random nucleation growth processes. Our simulations employing classical molecular dynamics and first principles methods suggest qualitatively similar behavior in both processes. Pressure is found to reduce the difference in molar volumes and coordination numbers between the amorphous and crystalline phases, which in turn lowers the energy barrier of crystallization. The activation energy for the SPE growth of four coordinated diamond phase is found to reach a minimum (a maximum in growth rates) close to 10 GPa when its density becomes equal to that of the amorphous phase. The crystallization temperatures of successive high pressure phases of silicon are found to decrease, offering a possible explanation for the pressure induced crystallization reported in this material.

Susceptor-assisted microwave annealing for activation of arsenic dopants in silicon

Microwave annealing of arsenic-doped silicon was employed to achieve nearly complete dopant activation and repair of damage caused by ion implantation. Analysis of Rutherford backscattering spectra suggested that volumetric heating from microwaves can repair ion-implantation damage. Secondary ion mass spectroscopy depth profiling revealed that even with high damage due to implanted arsenic, microwave annealing achieves repair of lattice damage, and electrical activation of dopants without allowing any significant dopant diffusion into the silicon substrate. Surface temperatures greater than 700°C were achieved within ~100s with assisted microwave heating, marking this as a quick annealing technique when compared to un-assisted annealing. This temperature was sufficient for solid phase epitaxial growth in Si. The temperature profile recorded by a thermocouple-calibarated IR pyrometer was explained based upon the type of losses the sample undergoes while heating. The mechanism for susceptor-assisted microwave heating was dominated by dipole polarization losses in the initial stages of anneal and by Ohmic conduction losses at higher temperatures. Cross-section transmission electron microscopy, along with ion channeling spectra indicated that the silicon lattice regained nearly all of its crystallinity during the microwave anneal. Hall measurement and sheet resistance characterization were used to assess the extent of dopant activation.

Roles of local He concentration and Si sample orientation on cavity growth in amorphous silicon

(111)- and (100)-oriented Si samples were implanted with Si+ ions at 1 MeV to a dose of 1 × 1016 cm−2 and with 5 × 1016 He+ cm−2 at 10 keV or 50 keV and eventually annealed in the 800–1000°C temperature range. Sample characterisation was carried out by cross-section transmission electron microscopy, positron annihilation spectroscopy and nuclear reaction analysis. In addition to the formation of He bubbles at the projected range of He, bubbles were observed after solid-phase epitaxial growth (SPEG) of the embedded amorphous Si layer. The He threshold concentration required to obtain thermally stable bubbles in amorphised Si is between one and four orders of magnitude lower than in c-Si. Since bubble formation and growth take place in the a-Si phase, the interaction with SPEG during annealing was studied by considering (100) and (111) Si. Both the SPEG velocity and the resulting defects play a role on bubble spatial distribution and size, resulting in bigger bubbles in (111) Si with respect to (100) Si.