SiOx-based Resistive Switching Research Articles

Atomic Layer Deposited SiOX-Based Resistive Switching Memory for Multi-Level Cell Storage

Herein, stable resistive switching characteristics are demonstrated in an atomic-layer-deposited SiOX-based resistive memory device. The thickness and chemical properties of the Pt/SiOX/TaN stack are verified by transmission electron microscopy (TEM) and X-ray photoemission spectroscopy (XPS). It is demonstrated that much better resistive switching is obtained using a negative set and positive reset compared to the opposite polarity. In addition, multi-level switching is demonstrated by changing the compliance current (CC) and the reset stop voltage, and potentiation and depression are emulated by applying pulses to achieve a synaptic device. Finally, a pulse endurance of 10,000 cycles and a retention time of 5000 s are confirmed by modulating the pulse input and reading voltage, respectively.

Effects of Ambient Sensing on SiOx-Based Resistive Switching and Resilience Modulation by Stacking Engineering

The SiOx-based resistive random access memory (RRAM) is reported as the gas sensor with the spontaneous response i.e. memory window closure as air-vacuum switches, meanwhile enlarged the switching voltages in the vacuum. The HfOx/SiOx stacked structure is proposed with a superior resilience with response to ambient changes through inserting an interface structure, which attributed to the gain of the source of high defect density and Hf-encapsulation of the filamentary region as compared to single layer SiOx structures. Besides, the intrinsic nonlinear behavior is demonstrated by integrating a low dielectric layer, which suppresses the sneak path issues for large-scale SiOx-based RRAM crossbar array implementation in near future.

(Invited) Memcomputing (Memristor + Computing) in Intrinsic SiOx-Based Resistive Switching Memory

This study focuses on memcomputing (Memristor + Computing) in intrinsic SiOx-based resistive switching memory. Specifically, we investigate neuromorphic computing by a device with biological synaptic behaviors in integrating silicon oxide (SiOx) resistive switching memory with Si diodes. Minimal synaptic power consumption due to sneak-path current has been achieved and the capability for spike-induced synaptic behaviors has been demonstrated, representing critical milestones for the application of SiO2–based materials in future neuromorphic computing. The detailed biological synaptic behaviors such as long-term potentiation (LTP), long-term depression (LTD) and spike-timing dependent plasticity (STDP) are demonstrated systematically using a comprehensive analysis of spike-induced waveforms. We will also discuss a implementation technique of implication operations by using SiOx-based memristors in TaN/SiOx/Si. The implication function and its truth table have been implemented. The key factors for the operation of material implication, such as load resistance, characteristics of the memristor, and design tradeoffs have been investigated. Furthermore, we have demonstrated implication operation using a circuit with two SiOx-based memristor and CMOS transistor. A circuit with two one-diode and one resistor (1D-1R) memory elements and a transistor are designed to perform implication operations. A circuit consisting of a 4 × 4 crossbar structure 1D1R memristor array together with the select transistors is proposed. Based on this circuit, a total of 48 steps of operations are performed to realize the functionality of a one bit full adder. The advantages and disadvantages of the memristor enabled logic circuit are compared with CMOS logic circuits. The experimental results suggest a simple, robust approach to realize programmable memcomputing chips compatible with large-scale CMOS manufacturing technology. (* This paper is invited by ECS 2016 Honolulu Meeting.)

Proton exchange reactions in SiOx-based resistive switching memory: Review and insights from impedance spectroscopy

Abstract In this work, the AC admittance and conductance of non-polar SiOx-based resistive switching memory devices is measured as a function of temperature to investigate charge transport and potential switching mechanisms. After electroforming using a forward/backward voltage scan, devices were measured over the frequency range of 1 k–1 MHz and the temperature range of 200–400 K. For temperature (T) > 300 K, AC conductance follows σ(ω) = Aωs, where s is linearly dependent on temperature and close to, but less than, unity. For T

Resistive switching characteristics and mechanisms in silicon oxide memory devices

Abstract Intrinsic unipolar SiOx-based resistance random access memories (ReRAM) characterization, switching mechanisms, and applications have been investigated. Device structures, material compositions, and electrical characteristics are identified that enable ReRAM cells with high ON/OFF ratio, low static power consumption, low switching power, and high readout-margin using complementary metal-oxide semiconductor transistor (CMOS)–compatible SiOx-based materials. These ideas are combined with the use of horizontal and vertical device structure designs, composition optimization, electrical control, and external factors to help understand resistive switching (RS) mechanisms. Measured temperature effects, pulse response, and carrier transport behaviors lead to compact models of RS mechanisms and energy band diagrams in order to aid the development of computer-aided design for ultralarge-v scale integration. This chapter presents a comprehensive investigation of SiOx-based RS characteristics and mechanisms for the post-CMOS device era.

A synaptic device built in one diode–one resistor (1D–1R) architecture with intrinsic SiOx-based resistive switching memory

Abstract We realize a device with biological synaptic behaviors by integrating silicon oxide (SiOx) resistive switching memory with Si diodes to further minimize total synaptic power consumption due to sneak-path currents and demonstrate the capability for spike-induced synaptic behaviors, representing critical milestones for the use of SiO2-based materials in future neuromorphic computing applications. Biological synaptic behaviors such as long-term potentiation, long-term depression, and spike-timing dependent plasticity are demonstrated systemically with comprehensive investigation of spike waveform analyses and represent a potential application for SiOx-based resistive switching materials. The resistive switching SET transition is modeled as hydrogen (proton) release from the (SiH)2 defect to generate the hydrogenbridge defect, and the RESET transition is modeled as an electrochemical reaction (proton capture) that re-forms (SiH)2. The experimental results suggest a simple, robust approach to realize programmable neuromorphic chips compatible with largescale complementary metal-oxide semiconductor manufacturing technology.

Demonstration of Synaptic Behaviors and Resistive Switching Characterizations by Proton Exchange Reactions in Silicon Oxide.

We realize a device with biological synaptic behaviors by integrating silicon oxide (SiOx) resistive switching memory with Si diodes. Minimal synaptic power consumption due to sneak-path current is achieved and the capability for spike-induced synaptic behaviors is demonstrated, representing critical milestones for the use of SiO2–based materials in future neuromorphic computing applications. Biological synaptic behaviors such as long-term potentiation (LTP), long-term depression (LTD) and spike-timing dependent plasticity (STDP) are demonstrated systematically using a comprehensive analysis of spike-induced waveforms, and represent interesting potential applications for SiOx-based resistive switching materials. The resistive switching SET transition is modeled as hydrogen (proton) release from (SiH)2 to generate the hydrogen bridge defect, and the RESET transition is modeled as an electrochemical reaction (proton capture) that re-forms (SiH)2. The experimental results suggest a simple, robust approach to realize programmable neuromorphic chips compatible with large-scale CMOS manufacturing technology.

Study of self-compliance behaviors and internal filament characteristics in intrinsic SiOx-based resistive switching memory

Self-compliance characteristics and reliability optimization are investigated in intrinsic unipolar silicon oxide (SiOx)-based resistive switching (RS) memory using TiW/SiOx/TiW device structures. The program window (difference between SET voltage and RESET voltage) is dependent on external series resistance, demonstrating that the SET process is due to a voltage-triggered mechanism. The program window has been optimized for program/erase disturbance immunity and reliability for circuit-level applications. The SET and RESET transitions have also been characterized using a dynamic conductivity method, which distinguishes the self-compliance behavior due to an internal series resistance effect (filament) in SiOx-based RS memory. By using a conceptual “filament/resistive gap (GAP)” model of the conductive filament and a proton exchange model with appropriate assumptions, the internal filament resistance and GAP resistance can be estimated for high- and low-resistance states (HRS and LRS), and are found to be independent of external series resistance. Our experimental results not only provide insights into potential reliability issues but also help to clarify the switching mechanisms and device operating characteristics of SiOx-based RS memory.

(Invited) Intrinsic Unipolar SiOx-Based Resistive Switching Memory: Characterization, Mechanism and Applications

Intrinsic unipolar SiOx-based Resistive-RAM (ReRAM) characterization, mechanism and applications have been investigated. We investigate device structures, material compositions and electrical characteristics to realize ReRAM cells with high ON/OFF ratio, low static power consumption, low switching power, and high readout-margin using CMOS compatible SiOx-based materials. These ideas are combined with the use of horizontal and vertical device structure designs, composition optimization, electrical controlling and external factors for understanding resistive switching (RS) mechanism. Modeling of RS mechanism, including temperature effect, pulse response and carrier transport behaviors are performed, to develop a compact model in energy diagram, trap-level information in SiOx RS layer, even for computer-aided design (CAD) in very-large-scale integration (VLSI) design. Finally, synapse-based neuromorphic system is demonstrated in SiOx-based ReRAM, combining with bio-inspiration and biomimetics process illustrations. This work presents the comprehensively investigation of SiOx-based resistive switching characteristics, mechanisms, applications for future post-CMOS devices era.

(Invited) Intrinsic Unipolar SiOx-Based Resistive Switching Memory: Characterization, Mechanism and Applications

We propose a research topic to comprehensively understand the intrinsic unipolar SiOx-based resistive-switching random-access memory (ReRAM) characteristics and mechanisms that can provide deep insights of device design and performance improvement for next-generation nonvolatile memory applications, as required for low-power portable electronics, highly-integrated of compact memory design, and other applications. Several main research targets will be pursued. Firstly, we will investigate device structures, material compositions and electrical characteristics to realize ReRAM cells with high ON/OFF ratio, low static power consumption, low switching power, and high readout-margin using CMOS compatible SiOx-based materials in both metal-insulator-semiconductor (MIS) and metal-insulator-metal (MIM), and one diode - one resistive switching element (1D-1R) architectures. These ideas will be combined with the use of horizontal and vertical device structure designs (active device size and thickness), composition optimization (SiOx, x < 2), electrical controlling (compliance current limitation, stopped voltage sweeping, and polarity effect) and external factors (series-resistance and ambient effects) for understanding and characterizations of resistive switching mechanism. Secondly, modeling of resistive switching mechanism, including temperature effect, pulse response and carrier transport behaviors will be performed, to develop a compact model in energy diagram, trap-level information, dipole polarization in SiOx resistive switching layer, even for computer-aided design (CAD) in very-large-scale integration (VLSI) design. Finally, for the first time, an intriguing non-Von Neumann computing architecture, named synapse-based neuromorphic system, will be demonstrated in SiOx-based ReRAM, combining with bio-inspiration and biomimetics process illustrations. The novel applications in the physiology and pathology discussions in reactive oxygen species (ROS) production and regulation processes will be clarified. This work will present the comprehensively investigation of SiOx-based resistive switching characteristics, mechanisms, applications for future post-CMOS devices era.

Stabilization of multiple resistance levels by current-sweep in SiOx-based resistive switching memory

Using current-sweep measurements, the set process in SiOx-based resistive random access memory (RRAM) has been found to consist of multiple resistance-reduction steps. Variation in set behaviors was observed and attributed to different defect distributions in the resistance switching region. Physical mechanism of electroforming process is discussed, which further explains the observed variation of defect distributions. A compliance current study confirms that the achievable memory states of SiOx RRAM are determined by its set behavior. This finding provides additional insight on achieving multi-bit memory storage with SiOx RRAM.

Characterization of external resistance effect and performance optimization in unipolar-type SiOx-based resistive switching memory

SiOx-based resistive random access memory devices with metal-insulator-metal structure are compared to metal-insulator-semiconductor structures, and the effects of external resistance on device performance are characterized. The different reset behaviors are explained as a positive feedback mechanism involving a sudden voltage decrease across the external series resistance when the reset process commences. By varying external resistance, we observe a constant threshold voltage (2.46 V) for the reset process that is possibly due to a voltage-triggered switching mechanism. Our experimental results not only clarify the reset mechanism but also provide insights on optimization of external resistance for programing reliability and operating speed.

Intrinsic SiOx-based unipolar resistive switching memory. II. Thermal effects on charge transport and characterization of multilevel programing

Multilevel programing and charge transport characteristics of intrinsic SiOx-based resistive switching memory are investigated using TaN/SiOx/n++Si (MIS) and TiW/SiOx/TiW (MIM) device structures. Current transport characteristics of high- and low-resistance states (HRS and LRS) are studied in both device structures during multilevel operation. Analysis of device thermal response demonstrates that the effective electron energy barrier is strongly dependent on the resistance of the programed state, with estimates of 0.1 eV in the LRS and 0.6 eV in the HRS. Linear data fitting and conductance analyses indicate Poole-Frenkel emission or hopping conductance in the low-voltage region, whereas Fowler-Nordheim (F-N) or trap-assisted tunneling (TAT) is indicated at moderate voltage. Characterizations using hopping transport lead to hopping distance estimates of ∼1 nm in the LRS for both device structures. Relative permittivity values (εr) were extracted using the Poole-Frenkel formulism and estimates of local filament temperature, where εr values were ∼80 in the LRS and ∼4 in the HRS, suggesting a strongly polarized medium in the LRS. The onset of F-N tunneling or TAT corresponds to an observed “overshoot” in the I-V response with an estimated threshold of 1.6 ± 0.2 V, in good agreement with reported electro-luminescence results for LRS devices. Resistive switching is discussed in terms of electrochemical reactions between common SiO2 defects, and specific defect energy levels are assigned to the dominant transitions in the I-V response. The overshoot response in the LRS is consistent with TAT through either the Eγ' oxygen vacancy or the hydrogen bridge defect, both of which are reported to have an effective bandgap of 1.7 eV. The SET threshold at ∼2.5 V is modeled as hydrogen release from the (Si-H)2 defect to generate the hydrogen bridge, and the RESET transition is modeled as an electrochemical reaction that re-forms (SiH)2. The results provide further insights into charge transport and help identify potential switching mechanisms in SiOx-based unipolar resistive switching memory.

Intrinsic SiOx-based unipolar resistive switching memory. I. Oxide stoichiometry effects on reversible switching and program window optimization

The physical mechanisms of unipolar resistive switching (RS) in SiOx-based resistive memory are investigated using TaN/SiOx/n++Si and TiW/SiOx/TiW device structures. RS is independent of SiOx thickness and device area, confirming that RS occurs in a localized region along a filamentary pathway. Results from experiments varying electrode type, series resistance, and the oxygen content of SiOxNy materials show the potential to optimize switching performance and control device programming window. Device materials with stoichiometry near that of SiO2 are found to have better operating stability as compared to extrinsic, N-doped SiOxNy materials. The results provide further insight into the physical mechanisms of unipolar operation and lead to a localized switching model based on electrochemical transitions involving common SiOx defects. High-temperature data retention measurements for over 104 s in high- and low-resistance states demonstrate the potential for use of intrinsic SiOx RS devices in future nonvolatile memory applications.

Integrated One Diode–One Resistor Architecture in Nanopillar SiOx Resistive Switching Memory by Nanosphere Lithography

We report on a highly compact, one diode-one resistor (1D-1R) nanopillar device architecture for SiOx-based ReRAM fabricated using nanosphere lithography (NSL). The intrinsic SiOx-based resistive switching element and Si diode are self-aligned on an epitaxial silicon wafer using NSL and a deep-Si-etch process without conventional photolithography. AC-pulse response in 50 ns regime, multibit operation, and good reliability are demonstrated. The NSL process provides a fast and economical approach to large-scale patterning of high-density 1D-1R ReRAM with good potential for use in future applications.

Oxygen-induced bi-modal failure phenomenon in SiOx-based resistive switching memory

The ambient gas effect in SiOx-based resistive switching memory has been studied. After the electroforming process, resistive switching behavior functions in vacuum as well as in nitrogen without dramatic degradation. However, introducing an oxygen-nitrogen ambient suppresses resistive switching behavior at pressures above 1 Torr. Resistive switching is fully reestablished in oxygen-exposed devices after a vacuum recovery step. The failure phenomena can be described by Monte Carlo simulation using bi-modal statistics to enable feature distribution modeling of failure modes. Design criteria and guidelines are identified for packaging of future oxygen-sensor and of nonvolatile memory applications.

Understanding the resistive switching characteristics and mechanism in active SiOx-based resistive switching memory

The resistive switching characteristics and mechanism in active SiOx-based resistive switching memory have been investigated by using a simple TaN/SiO2/n++ Si-substrate test structure. Controlling the oxygen content in SiOx layer not only improved device yield but also stabilized electrical switching characteristics. The current transport behavior in high- and low-resistance states, thickness effect in SiOx layer, device area effect, and multilevel effect by controlling compliance current limitation and stopped voltage values have been studied. The results indicate that resistive switching occurs in a localized region along a filament, rather than uniformly throughout the bulk. A general current flow model for nonpolar SiOx-based resistive switching memory has been proposed, which provides a simple physical concept to describe the resistive switching behavior and provides additional insights into optimization of resistive switching memory devices.

Study of polarity effect in SiOx-based resistive switching memory

The SiOx-based resistive switching memory was realized by a simple TaN/SiO2/n++ Si-substrate structure. Post-deposition annealing treatment not only reduced operational variation but also stabilized electrical reliability during repeated switching. The relationship between applied voltage polarity and reset switching parameters is investigated and may indicate that resistive switching occurs at the cathode side. Oxygen-vacancy clustering and asymmetrical thermal-dissipation of the electrodes are discussed as possible causes for the polarity dependence of reset switching parameters. Data retention in high- and low-resistance states was measured for over 104 s, indicating promising potential for future nonvolatile memory applications.

Random Process of Filamentary Growth and Localized Switching Mechanism in Resistive Switching of SiOx Thin Films

The filamentary growth and switching mechanism of SiOx-based resistive switching random access memories have been investigated. In test structures with two devices connected in series, it has been found that the applied voltage in the first electroforming sweep equally stressed the SiOx in both devices. Therefore, it is concluded that a conducting filament (CF) grows in both devices. The resistance switching is induced by the rupture and recovery in a weak spot of the CF. The weak spot formation is a random process in the CF and could be anywhere along the CF. Once the weak spot is established, the rupture and recovery is localized in that particular region and independent of applied voltage polarity.