Si Insulated Gate Bipolar Transistor Research Articles

(Invited) On the Advantage of Deploying ALD-Deposited Gate Oxides for 4H-Silicon Carbide MOS Applications

The wide bandgap semiconductor material 4H-silicon carbide (SiC) has revolutionized the power electronics device market since the commercialization of the first SiC metal-oxide-semiconductor field-effect transistor (MOSFET) in 2012. In the blocking voltage range between 650V-1,700 V, SiC MOSFETs offer a higher maximum switching frequency, lower total space consumption as well as a higher temperature operation range than their silicon (Si) counterparts, e.g., the Si insulated-gate bipolar transistors (IGBT). This has led to the rapid uptake in deployment of SiC MOSFETs in main drivetrain inverter topologies in battery electric vehicles (BEVs).Given the importance the availability of oxides play in the role of any MOS-structure, the successful implementation of SiC MOSFETs into power electronics conversion stages has in no small part been due to its native oxide, silicon dioxide (SiO2). This can easily be thermally grown at temperatures between 1,100°C-1,400°C. This advantage as well as the relatively large conduction band offset of approx. 2.7 eV between SiC and SiO2 make SiO2 the ubiquitous gate oxide in any SiC device.However, interface defect densities are still much more prevalent in SiC/SiO2 systems than in their Si/SiO2 MOS counterparts, and most of these defects originate from the thermal oxidation process, which ends up forming carbon-rich interfaces containing carbon clusters, hydrogen (H) and oxygen (O) vacancies. These defects enhance scattering, increase leakage currents and hence reduce channel mobilities in MOSFETs. This is a major technological issue, leading to specific on-resistances (RON,SP) that are much higher than the theoretical unipolar limit of SiC would allow, hampering the further uptake of SiC MOS technology.In this investigation, we explore the three most used deposition/growth mechanisms that will form an SiO2 layer on SiC and the impact this mechanism will have on the interface quality and high-temperature reliability of MOS-based SiC devices.Lateral MOSFETs (LMOSFETs), metal-oxide-semiconductor capacitors (MOSCAPs) and all other mentioned device structures were fabricated on 10 μm thick, nitrogen-doped (4 x 1015 cm-3) epitaxial layers that were grown on highly nitrogen-doped SiC substrates. LMOSFET devices underwent a conventional implantation schedule for the p-base and n+-source and drain implant, both carried out at 500°C, with the post-implantation anneal carried out at 1,750°C for 45 minutes in Ar (5 slm).Once samples had undergone an initial solvent clean/RCA 1/HF (10%)/ RCA 2/HF (10%) clean procedure, a 1 μm thick field oxide was deposited on the samples through low-pressure chemical vapour deposition (LPCVD). A gate oxide window was opened by means of photolithography, after which the oxide was thinned down to a thickness of approximately 30 nm by means of reactive ion etching (RIE). The final oxide was removed using a wet etch in diluted 10% buffered oxide etch to prevent surface exposure to heavily accelerated and charged particles. The gate oxides were then put down using one of the following oxidation routines: ALD deposition of SiO2 using bis(diethylamino)silane (BDEAS) and an oxygen plasma at 200°C (750 cycles) orALD deposition of SiO2 using bis(diethylamino)silane (BDEAS) and an oxygen plasma at 200°C (750 cycles) plus a PDA in FG ambient (5 slm, 5 % H2) at 1,100°C for 1 h.LPCVD using tetraethyl orthosilicate (TEOS) as a precursor.Direct thermal growth at 1300°C for 5 hrs in diluted N2O (4 slm Ar: 1 slm N2O) ambient. Since samples that had undergone routines 1 and 3 usually show a poor as-deposited oxide quality, a post-deposition anneal was performed on these samples in an oxidation furnace in N2O ambient at 1,300°C for 2 hrs. All N2O treated samples (1,3 and 4) showed an oxide thickness of approximately 60 nm, with the FG-treated sample showing a lower thickness of approx. 35 nm. Conventional metal contact formation was then carried out to finalise the devices.In this investigation, we investigate the current-voltage (I-V), capacitance-voltage (C-V) and constant-voltage time dependent dielectric breakdown (TDDB) performance. We will present evidence that high-quality, highly reliable SiO2 layers, formed by ALD and PDA, can be created. Flatband voltage and hysteresis values will be reduced, compared to thermally grown oxides, and frequency dispersion in accumulation is negligible. The ALD oxide with forming gas PDA has the best performance across the entire dataset at all measured voltages (9.6 MV/cm, 9.3 MV/cm, 9 MV/cm, 8.5 MV/cm, 8 MV/cm). This is due to a different interface chemistry, shown by XPS, HRTEM and SIMS, where Si complexes, such as Si dimers or SixOy groups are broken down into simple Si dangling bonds, which can be readily passivated with a FG anneal. This will be discussed in detail in this talk. Figure 1

Hybrid Si/SiC Switches: A Review of Control Objectives, Gate Driving Approaches and Packaging Solutions

Hybrid silicon (Si)/silicon carbide (SiC) switches are gaining increased attention for designing high-efficiency and high-power density energy conversion systems. They offer very good conduction and switching power loss performance compared to using only Si insulated gate bipolar transistor (IGBT) or SiC metal–oxide–semiconductor field effect transistor (MOSFET) devices as a result of combining the best properties of both devices. Several Si/SiC gate control strategies, gate driving approaches, and packaging considerations have been proposed in the literature. This article presents a comprehensive review and performance comparison of different Si/SiC gate control strategies, gate driver solutions, and packaging approaches that are already proposed in the literature. In addition, it aims to provide a general guideline for selecting the appropriate Si/SiC gate control approach that is suitable for different applications considering several Si/SiC switch design properties. It also aims to establish a general metrics for evaluating the performance of different Si/SiC gate driver solutions that are proposed in the literature in order to help the designer choose a suitable gate driver solution for different applications. Moreover, it highlights future research and development needs of hybrid Si/SiC switches in terms of gate control techniques, gate driver approaches, and packaging solutions in order to achieve further performance improvements and fully exploit their benefits.

Impact of Gate Resistance on Improving the Dynamic Overcurrent Stress of the Si/SiC Hybrid Switch

A silicon/silicon carbide (Si/SiC) hybrid switch (HyS), comprised of a high-current Si insulated gate bipolar transistor and a low-current SiC metal oxide semiconductor field effect transistors, gains attention because it offers lower <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> -state loss under both light and heavy loads. However, the dynamic overcurrent stress experienced by the HyS under the heavy load has to be coped with to avoid reliability degradation and the maximum current rating limitation. This article comprehensively studies how gate resistances regulate the dynamic behavior of the HyS under the heavy load condition. Experiments and analyses are conducted for both turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> and turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> processes. It is found that the gate resistance is important for not only the d <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">v</i> /d <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</i> control but also the overcurrent suppression. Moreover, the lower switching loss can be achieved by adjusting gate resistances when the HyS operates at a heavy load, compared with the gate timing control. A guideline is developed for the design of the gate resistances. This study offers an insight into the role of gate resistances in switching performances of the HyS and an alternative way of coping with the dynamic overstress stress.

Research on Dual 12-Phase 12-Slot Winding Permanent-Magnet Propulsion System Based on All-SiC Power Module

All-SiC power modules have lately received great attention for multiphase motor propulsion systems due to their low radiator temperature and high efficiency. However, the application of all-SiC power modules for dual 12-phase 12-slot winding permanent-magnet propulsion systems remains an ongoing challenge, owing to synchronous operation. In an effort to overcome this challenge, this article quantified and compared the all-SiC power module with Si-insulated gate bipolar transistor (IGBT) to underpin the all-SiC power module as the preferred choice for propulsion inverter application. The motor mathematical model and control strategy were illustrated in detail. Moreover, the crucial features of the propulsion inverter and synchronous control were elucidated by the theoretical and experimental analysis. The synchronous switching of the dual all-SiC power modules allowed the same slot windings to achieve excellent operation. The experimental results were given for the operation of propulsion systems based on all-SiC power modules. The motor operations under different speeds were investigated as well. Finally, the fault tolerance of the dual 12-phase 12-slot permanent magnet synchronous motor (PMSM) was validated under an open circuit.

A SiC-Si Hybrid Module for Direct Matrix Converter With Mitigated Current Spikes

Reliable and affordable ac/ac power conversion plays a key role in supplying various electrical equipment. Among the options available, the direct matrix converter (DMC) outperforms its counterparts (e.g., ac/dc/ac), in terms of lifespan and compactness, due to its omission of fragile and bulky dc-link capacitors. However, most off-the-shelf DMC modules suffer from high input current spikes, which if unresolved can noticeably increase current stresses and lower efficiency. Origin of the spikes and a mechanism for reducing them are hence studied in this article, before developing a low-cost silicon carbide (SiC)-Si hybrid module for implementing DMC reliably and compactly. The developed module consists of 18 Si insulated gate bipolar transistors (IGBTs) and 18 SiC junction barrier Schottky (JBS) diodes connected in a common-collector structure. The improved reverse recovery property of the SiC JBS diodes then permits the hybrid module to operate with mitigated current spikes. To demonstrate, the hybrid module has been fabricated, tested, and compared with two counterparts in terms of their input current spikes and power losses over different output voltages and switching frequencies. Experimental results have proved the expected performances of the hybrid DMC module, which collectively can accelerate large-scale emergence of small all-semiconductor drives for industrial pumps, cooling and refrigeration systems, and others widely needed in developing economies.

Cryogenic Performances Comparisons Among Si MOSFET, SiC MOSFET, Cascode GaN, and GaN Devices

Cryogenic power electronics is an emerging technology to achieve high efficiency and high power density. As the key element of the power electronics system, the device performance should be evaluated under cryogenic temperatures. To demonstrate the differences between different materials and technologies, cryogenic temperature performance comparisons among silicon (Si) metal–oxide–semiconductor field-effect transistor (MOSFET), Si insulated-gate bipolar transistor (IGBT), silicon carbide (SiC) MOSFET, Cascode gallium nitride (GaN), and GaN high-electron-mobility transistor (HEMT) from different perspectives are made, which includes on-state resistance, threshold voltage, turn-on and turn-off times, turn-on and turn-off switching losses. The normalized values are adopted and results are drawn in the same pictures to demonstrate the differences. The results demonstrate that traditional Si devices have better performances under low temperatures. The SiC MOSFET is not suitable for cryogenic applications due to its increased on-state resistance and switching loss. Cascode GaN and GaN HEMT are promising candidates for cryogenic applications with reduced conduction loss and switching loss.

13 kV SiC-DMOSFETs and body diodes for HVDC MMC converters

Power electronics utilizing SiC power devices will become key components in next-generation power systems based on renewable energy, which are becoming an urgent issue worldwide. In this study, the on-characteristics and switching characteristics of 13 kV SiC-double-implanted metal-oxide-semiconductor field-effect transistors (DMOSFETs) and their body diodes were measured. In particular, the carrier lifetime, which has a significant effect on electrical characteristics, was estimated from the dynamic characteristics of the body diodes. The short carrier lifetime resulted in a large on-state voltage and a small reverse recovery loss of the body diode. Moreover, a conceptual design of a modular multilevel converter-based high-voltage, large-capacity, and self-excited AC/DC converter with 13 kV SiC-DMOSFETs was conducted, and its characteristics were investigated. When the 13 kV SiC-DMOSFETs were applied, the ratio of the total device loss to the electricity power of the converter was 1.10%, which is a significant reduction of 50% compared with 2.17% when 6.5 kV Si-insulated gate bipolar transistors were used.

EMI Filter Design for a Three-Phase Buck–Boost Y-Inverter VSD With Unshielded Motor Cables Considering IEC 61800-3 Conducted and Radiated Emission Limits

The standard converter concept employed in variable speed motor drives is the two-level three-phase Si insulated-gate bipolar transistor voltage source inverter with its switch nodes connected to the motor terminals via shielded cables to avoid excessive high-frequency noise emissions. However, high dv/dt pulses of the inverter pose substantial stresses on the motor, which are further intensified by the ever-faster switching speeds of wide band-gap semiconductors, hence promoting interest in inverters with full-sinewave output filters, which potentially enable the use of inexpensive unshielded motor cables. However, the IEC 61800-3 standard dictates stringent conducted and radiated emission limits on unscreened power interfaces. In this article, a dc input and ac output filter structure allowing operation with unshielded cables is derived for a phase-modular 11-kW buck-boost Y-inverter motor drive system employing 1.2-kV SiC MOSFETs with a switching frequency of 100 kHz. First, regulations and measurement techniques for conducted and radiated emissions of motor drives are analyzed. Next, the operating principle of the Y-inverter is described and an electromagnetic interference equivalent circuit is derived, followed by a systematic filter design. Finally, measurements are conducted on an ultracompact hardware prototype of the converter system with 12 kW/dm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> (197 W/in <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> ) power density, where the results indicate full compliance with the IEC 61800-3 conducted and radiated emission limits for operation with unshielded dc supply and motor cables in a residential area.

3.3 kV Class 4 H-SiC Double-Implanted MOSFET With Excellent Radiation Hardness Against Gamma Rays Using Counter-Doped Junction Termination Extension

In this letter, we report experimental results for a 3.3 kV class 4H-SiC double-implanted MOSFET (DMOSFET) that provides excellent radiation hardness against gamma rays using the counter-doped junction termination extension technique. At a total dose of 700 kGy at room temperature, the ON-state current is only degraded by 15%, and the breakdown voltage remains above 3.5 kV with a clear avalanche feature. In contrast, Si insulated gate bipolar transistors (IGBTs) are not able to maintain both its forward and reverse specifications, even at 1 kGy.

Generalized Behavioral Modelling Methodology of Switch-Diode Cell for Power Loss Prediction in Electromagnetic Transient Simulation

Modern wide-bandgap (WBG) devices, such as silicon carbide (SiC) or gallium nitride (GaN) based devices, have emerged and been increasingly used in power electronics (PE) applications due to their superior switching feature. The power losses of these devices become the key of system efficiency improvement, especially for high-frequency applications. In this paper, a generalized behavioral model of a switch-diode cell (SDC) is proposed for power loss estimation in the electromagnetic transient simulation. The proposed model is developed based on the circuit level switching process analysis, which considers the effects of parasitics, the operating temperature, and the interaction of diode and switch. In addition, the transient waveforms of the SDC are simulated by the proposed model using dependent voltage and current sources with passive components. Besides, the approaches of obtaining model parameters from the datasheets are given and the modelling method is applicable to various semiconductors such Si insulated-gate bipolar transistor (IGBT), Si/SiC metal–oxide–semiconductor field-effect transistor (MOSFET), and GaN devices. Further, a multi-dimensional power loss table in a wide range of operating conditions can be obtained with fast speed and reasonable accuracy. The proposed approach is implemented in PSCAD/ Electromagnetic Transients including DC, EMTDC, (v4.6, Winnipeg, MB, Canada) and further verified by the hardware setups including different daughter boards for different devices.

Investigation of Dynamic Temperature-Sensitive Electrical Parameters for Medium-Voltage SiC and Si Devices

This article presents six groups of dynamic temperature-sensitive electrical parameters (TSEPs) for the medium-voltage silicon carbide (SiC) and silicon (Si) devices. The physical mechanisms of the temperature dependence of these parameters are analyzed with the difference between SiC and Si devices highlighted. A test platform is developed that enables implementation of the temperature relevant dynamic characterization. The investigated TSEPs are summarized in terms of their relationship with junction temperature, load current, dc voltage, and external gate resistance. The impact of the parasitic parameters on the evaluation results is analyzed. The comparison between 3.3-kV 5-A SiC MOSFETs and 3-kV 12-A Si insulated-gate bipolar transistors (IGBTs) is conducted. The results verify that for the medium-voltage SiC MOSFETs, the turn-off drain–source voltage switching rate, the turn-off gate current peak value, and the turn-on gate current plateau achieve better thermal sensitivity, in comparison with the Si IGBTs. The turn-off and turn-on delay time exhibit better thermal linearity compared with other investigated TSEPs.

Comparative Evaluation of Voltage Source Converters With Silicon Carbide Semiconductor Devices for High-Voltage Direct Current Transmission

Recent advancements in silicon carbide (SiC) power semiconductor technology enable developments in the high-power sector, e.g., high-voltage-direct-current (HVdc) converters for transmission, where today silicon (Si) devices are state-of-the-art. New submodule (SM) topologies for modular multilevel converters offer benefits in combination with these new SiC semiconductors. This article reviews developments in both fields, SiC power semiconductor devices and SM topologies, and evaluates their combined performance in relation to core requirements for HVdc converters: grid code compliance, reliability, and cost. A detailed comparison of SM topologies regarding their structural properties, design and control complexity, voltage capability, losses, and fault handling is given. Alternatives to state-of-the-art SMs with Si insulated-gate bipolar transistors (IGBTs) are proposed, and several promising design approaches are discussed. Most advantages can be gained from three technology features. First, SM bipolar capability enables dc fault handling and reduced the energy storage requirements. Second, SM topologies with parallel conduction paths in combination with SiC metal-oxide-semiconductor field-effect transistors offer reduced losses. Third, a higher SM voltage enabled by a higher blocking voltage of SiC devices results in a reduced converter complexity. For the latter, ultrahigh-voltage bipolar devices, such as SiC IGBTs and SiC gate turn-off thyristors, are envisioned.

Analysis of dependence of dV CE/dt on turn-off characteristics with a 1200 V double-gate insulated gate bipolar transistor

The double-gate drive is a remarkable gate control technique for dramatically reducing turn-off loss in Si-insulated gate bipolar transistors (IGBT) by increasing dV CE/dt. However, no detailed analysis of the difference of turn-off mechanism according to the difference in dV CE/dt between double-gate drive and conventional gate drive has been reported. The double-gate (DG) drive allows the dV CE/dt of IGBTs to increase beyond the maximum dV CE/dt of 7000 V μs−1 in conventional gate drives. Furthermore, the influence of relations between gate-drive timings and dV CE/dt on turn-off operations were confirmed in the case of three different DG IGBT structures.

Radiated disturbance characteristics of SiC MOSFET module

Wide band gap semiconductor device silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) have many advantages and are considered to be the most promising alternative to silicon (Si) insulated gate bipolar transistors (IGBTs) in low-/medium-voltage fields. However, a faster switching speed results in more serious electromagnetic disturbance problems in the application of SiC MOSFET. In this paper, an experiment system is established to measure the radiated disturbance of a single SiC MOSFET module operating at 9 kHz–300 MHz. The radiated electric fields of the SiC MOSFET module are mainly concentrated within 160 MHz. The switching voltage and radiated disturbance of the Si IGBT module are measured and compared with those of the SiC MOSFET module. The voltage of the SiC MOSFET has a faster change rate and a higher overshoot, which results in the radiated electric fields of SiC MOSFET module being 5–10 dB higher than those of the Si IGBT module below 8 MHz. The measurement results in the time-domain and frequency-domain correspond. A detailed model of a SiC MOSFET module is established and the radiated electric fields are calculated using the method of moments (MOM). The calculated results show the effectiveness of the model for radiated disturbance prediction. In this paper, the radiated electric fields of a SiC MOSFET module are measured and analyzed, and the calculation model can be used to further evaluate the radiated disturbance characteristics of SiC MOSFET and influencing factors.

Determination of failure degree of 1.2 kV SiC MOSFETs after short-circuit test using an improved test setup

Abstract Analysis of the short-circuit characteristics of SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) is very important for their practical application. This paper studies the SiC MOSFET short-circuit characteristics with an improved test setup under different conditions. A high-current Si insulated gate bipolar transistor is used as a circuit breaker in the test circuit rather than the usual short-circuit test conducted without a circuit breaker. The test platform with a circuit breaker does not influence the calculation results regarding the short-circuit withstand time and energy, but the SiC MOSFET will switch off after failure in a very short time. In addition, the degree of failure will be limited and confined to a small area, such that the damage to the chip will be clearly observable, which is significant for short-circuit failure analysis.

Switch Open-Fault Detection for a Three-Phase Hybrid Active Neutral-Point-Clamped Rectifier

This paper proposes a fault-detection method for open-switch failures in hybrid active neutral-point-clamped (HANPC) rectifiers. The basic HANPC topology comprises two SiC-based metal-oxide-semiconductor field-effect transistors (MOSFETs) and four Si insulated-gate bipolar transistors (IGBTs). A three-phase rectifier system using the HANPC topology can produce higher efficiency and lower current harmonics. An open-switch fault in a HANPC rectifier can be a MOSFET or IGBT fault. In this work, faulty cases of six different switches are analyzed based on the current distortion in the stationary reference frame. Open faults in MOSFET switches cause immediate and remarkable current distortions, whereas, open faults in IGBT switches are difficult to detect using conventional methods. To detect an IGBT fault, the proposed detection method utilizes some of the reactive power in a certain period to make an important difference, using the direct-quadrant (dq)-axis current information derived from the three-phase current. Thus, the proposed detection method is based on three-phase current measurements and does not use additional hardware. By analyzing the individual characteristics of each switch failure, the failed switch can be located exactly. The effectiveness and feasibility of the proposed fault-detection method are verified through PSIM simulations and experimental results.

Enhanced Hybrid Active-Neutral-Point-Clamped Converter With Optimized Loss Distribution-Based Modulation Scheme

The active-neutral-point-clamped (ANPC) converter is a prominent topology for medium voltage applications. To realize a high-power-density three-level ANPC converter, silicon carbide (SiC) MOSFETs may be used but they also lead to an extremely high cost. Thus, it is important to properly utilize the SiC switches in order to achieve not only a highly efficient but also a low-cost system. In this article, a three-level enhanced hybrid ANPC (E-HANPC) structure is proposed, which optimally utilizes both Si insulated gate bipolar transistors (IGBTs) and SiC MOSFETs to achieve these objectives. A dedicated modulation scheme is also proposed that enables a reduction in the conduction and switching losses and, hence, higher efficiency is achieved. The presented method optimally distributes the losses amongst the converter switches that leads to enhanced power handling capability of the E-HANPC converter. Moreover, the proposed converter also achieves short-length commutation loops for the high-frequency SiC MOSFETs, which imparts fast-switching capability with reduced overvoltage stress on these switches. To validate the efficacy of the proposed converter and modulation scheme, extensive simulation and analytical studies are performed. A prototype of the single-phase leg of the E-HANPC converter is also developed to validate its feasibility, proposed principles, and reconfirm the simulation and analytical findings.

Wide-Range Prediction of Ultra-High Voltage SiC IGBT Static Performance Using Calibrated TCAD Model

In this paper, a technology computer-aided design (TCAD) model of a silicon carbide (SiC) insulated-gate bipolar transistor (IGBT) has been calibrated against previously reported experimental data. The calibrated TCAD model has been used to predict the static performance of theoretical SiC IGBTs with ultra-high blocking voltage capabilities in the range of 20-50 kV. The simulation results of transfer characteristics, IC-VGE, forward characteristics, IC-VCE, and blocking voltage characteristics are studied. The threshold voltage is approximately 5 V, and the forward voltage drop is ranging from VF = 4.2-10.0 V at IC = 20 A, using a charge carrier lifetime of τA = 20 μs. Furthermore, the forward voltage drop impact for different process dependent parameters (i.e., carrier lifetimes, mobility/scattering and trap related defects) and junction temperature are investigated in a parametric sensitivity analysis. The wide-range simulation results may be used as an input to facilitate high power converter design and evaluation. In this case, the TCAD simulated static characteristics of SiC IGBTs is compared to silicon (Si) IGBTs in a modular multilevel converter in a general high-power application. The results indicate several benefits and lower conduction energy losses using ultra-high voltage SiC IGBTs compared to Si IGBTs.

A New User-Configurable Method to Improve Short-Circuit Ruggedness of 1.2-kV SiC Power MOSFETs

Silicon carbide (SiC) power MOSFETs have been commercialized to replace silicon insulated gate bipolar transistors (IGBTs) in power conversion applications. However, the short-circuit ruggedness of SiC power MOSFETs must be enhanced to match that of Si IGBTs for application in motor drives for electric vehicles. A new, user-configurable method with a series-connected, Si enhancement mode MOSFET (EMM) is demonstrated to improve the short-circuit withstand time of commercially available 1.2-kV SiC power MOSFETs by 86% with a 4.2% increase in on- resistance and a 13% increase in switching loss. In contrast, operating the 1.2-kV SiC power MOSFET with a reduced gate bias of 15 V produces an 80% improvement in short-circuit withstand time with 31% increase in on- resistance and a 31% increase in switching loss. It is demonstrated that the drain of the EMM can be used as a sensing node to monitor on- state current and to detect short-circuit events.

Comprehensive Analysis and Experimental Validation of 240$^\circ$-Clamped Space Vector PWM Technique Eliminating Zero States for EV Traction Inverters With Dynamic DC Link

A bus-clamping space vector pulsewidth modulation (PWM) called 240 $^\circ$ -clamped PWM (240CPWM) is analyzed for three-phase converters that have a cascaded connection of a dc–dc stage and a dc–ac stage. A direct application of the proposed concept is electric vehicle (EV) traction inverters that employ a dc–dc stage to interface a relatively low-voltage battery to a high-voltage motor. The 240CPWM method has the major advantages of clamping a phase to the positive or negative rail for 240 $^\circ$ in a fundamental period, clamping of two phases simultaneously at any given instant, and use of only active states, completely eliminating the use of zero states. These characteristics lead to more than seven times reduction in switching losses of the inverter at unity power factor compared to CSVPWM, comparable or better total harmonic distortion (THD) performance, significant reduction in common-mode voltage and high efficiency. The THD of the line current is analyzed using the notion of stator flux ripple and compared with conventional and discontinuous PWM methods. The switching loss characteristics under different power factor conditions are discussed. Experimental results from a 10-kW hardware prototype are presented. The full load efficiency with the proposed 240CPWM for the dc–ac stage exceeds 99% even with Si insulated-gate bipolar transistors (IGBTs).