Semiconductor Field-effect Transistor Structure Research Articles

Flexible Sensors Based on Low-Temperature Polycrystalline Silicon Thin Film Transistor Technology

Flexible sensors are gaining increasing interest in a number of applications, including biomedical, food control, domotics and robotics, having very light weight, robustness and low cost. In order to improve signal-to-noise ratio, integration of readout electronics is crucial and several technologies are available for the fabrication of thin film transistor (TFTs) based circuits on flexible substrates. Among these technologies, the low temperature polycrystalline silicon (LTPS) is particularly attractive, since LTPS TFTs show excellent electrical characteristics, good stability and offer the possibility to exploit CMOS architectures. The different aspects for the direct fabrication of LTPS TFTs on polymer substrates are reviewed and the specific fabrication process adopted on ultrathin polyimide (PI) substrates is described in some detail. In particular, LTPS TFTs were fabricated on ultra-thin PI substrates, deposited by spin-coating on a Si wafer, and excimer laser annealing was used to crystallize the Si. Characteristics electrical parameters are: field effect mobility up to 50 cm2/Vs; threshold voltage of 7 V; on/off ratio >105 . Then, as examples of flexible sensors, we present a tactile sensor for robotic applications and a pH sensor for biomedical applications.The tactile sensors were designed according to the Piezoelectric Oxide Semiconductor Field Effect Transistor (POSFET) structure, enabling sensing and signal conditioning at same site. In this way, it is possible to improve signal to noise ratio and hence the force sensitivity. In our LTPS POSFET devices we adopted as piezoelectric film the polyvinyledenedifluoride –trifluoroethylene P(VDF-TrFE) polymer. The piezoelectric polymer generates a charge on application of a mechanical force which influences the gate bias of the transistor. Gate bias variations, in turn, are directly reflected into drain current variations, that can be further processed by electronic circuits. The measured response to applied forces is linear, as reported in Fig 1a, with a piezoelectric coefficient up to 47 pC/N. The frequency response was tested in the range 30 - 1200 Hz and presented a high-pass behavior (see Fig.1b), according to the adopted common-source bias configuration.The pH sensor was fabricated according to the extended gate structure, as this structure offers many advantages over the conventional ISFET, such as the low cost, simple passivation and package, insensitivity of temperature and light, flexibility of shape of the extended-gate structure, and better long-term stability. The sensitive layer of the extended gate is a nanostructured ZnO film selectively deposited on the Al-gate electrode in a chemical bath at low-temperature. The pH-sensitivity was tested by exposing the extended gate to different pH-solutions and using as a reference electrode an Ag/AgCl electrode. In Fig. 2 the transfer characteristics, measured at low Vds and for different pH-solutions, are reported. In the inset of Fig.2, the threshold voltage shift induced by the pH variation is shown, giving a slope of 59 mV/pH for the pH range 1 – 9, close the ideal Nernstian response. The present results can pave the way to advanced flexible sensing systems, where sensors and local signal conditioning circuits can be integrated on the same flexible substrate.

Electric-induced oxide breakdown of a charge-coupled device under femtosecond laser irradiation

A femtosecond laser provides an ideal source to investigate the laser-induced damage of a charge-coupled device (CCD) owing to its thermal-free and localized damage properties. For conventional damage mechanisms in the nanosecond laser regime, a leakage current and degradation of a point spread function or modulation transfer function of the CCD are caused by the thermal damages to the oxide and adjacent electrodes. However, the damage mechanisms are quite different for a femtosecond laser. In this paper, an area CCD was subjected to Ti: sapphire laser irradiation at 800 nm by 100 fs single pulses. Electric-induced oxide breakdown is considered to be the primary mechanism to cause a leakage current, and the injured oxide is between the gate and source in the metal-oxide semiconductor field-effect transistor (MOSFET) structure for one CCD pixel. Optical microscopy and scanning electron microscopy are used to investigate the damaged areas and the results show that the electrodes and the oxide underneath are not directly affected by the femtosecond laser, which helps to get rid of the conventional damage mechanisms. For the primary damage mechanism, direct damage by hot carriers, anode hole injection, and an enlarged electric field in the insulating layer are three possible ways to cause oxide breakdown. The leakage current is proved by the decrease of the resistance of electrodes to the substrate. The output saturated images and the dynamics of an area CCD indicate that the leakage current is from an electrode to a light sensing area (or gate to source for a MOSFET), which proves the oxide breakdown mechanism.

ZnSe nanowire/Si p–n heterojunctions: device construction and optoelectronic applications

Nano-heterojunctions will play essential roles in future nano-electronic and nano-optoelectronic devices. However, their extensive applications are impeded by the complicated multi-step growth method involved and the requirements for precise nanowire (NW) positioning/alignment. Here, we develop a facile method to fabricate zinc selenide NW (ZnSeNW)/silicon p–n heterojunctions by transferring the p-type ZnSeNWs onto a SiO2/Si substrate with pre-defined Si windows; the physical contact of the NWs with the Si substrate via van der Waals force leads to the formation of heterojunctions. Electrical measurements on the heterojunctions reveal their excellent diode characteristics with a relatively small ideality factor of ∼1.95, high rectification ratio of ∼106, and low turn-on voltage of ∼0.9 V. Moreover, heterojunction field-effect transistors are constructed based on the p-ZnSeNWs and show remarkable performance enhancement compared to the device counterparts with a metal–oxide–semiconductor field-effect transistor structure. The enhanced gate coupling between the NW conduction channel and the heterojunction gate is believed to be responsible for the high device performance. Significantly, under AM 1.5G light illumination, the heterojunctions exhibit pronounced photovoltaic behavior, yielding a power conversion efficiency of ∼1.8%. Our results demonstrate the great potential of ZnSeNW/Si p–n heterojunctions in high-performance nano-device applications.

A carbon nanotube metal semiconductor field effect transistor-based biosensor for detection of amyloid-beta in human serum

We have developed a carbon nanotube (CNT) film-based biosensor with a metal semiconductor field effect transistor structure (MESFET). A gold top gate was deposited on the middle of the CNT channel and probe antibodies were immobilized on the gold top gate with an antibody-binding protein, protein G or Escherichia coli outer membrane (OM) with autodisplayed Z-domains of protein A. These CNT-MESFET biosensors exhibited a higher sensitivity than the CNT-FET biosensor with probe antibodies immobilized using a chemical linker, since the orientation of immobilized antibodies was controlled by the antibody-binding proteins. In addition, nonspecific binding was effectively inhibited by E. coli OM. Using the CNT-MESFET biosensors with E. coli OM containing Z domain, we detected amyloid-β (Aβ) in human serum, one of the biomarkers for early diagnosis of Alzheimer's disease. Aβ at the level of 1pg/mL in human serum could be measured in real-time and without labeling, which was lower than a limit of detection for plasma Aβ using an enzyme-linked immune sorbent assay. These results suggested that our CNT-MESFET biosensors might be applicable for an early diagnosis of Alzheimer's disease.

Structure Modeling of 100 V Class Super-junction Trench MOSFET with Specific Low On-resistance

For the conventional power metal-oxide semiconductor field-effect transistor (MOSFET) device structure, there exists a tradeoff relationship between specific on-resistance (R ON.SP ) and breakdown voltage (V BR ). In order to overcome the tradeoff relationship, a uniform super-junction (SJ) trench metal-oxide semiconductor field-effect transistor (TMOSFET) structure is studied and designed. The structure modeling considering doping concentrations is performed, and the distributions at breakdown voltages and the electric fields in a SJ TMOSFET are analyzed. The simulations are successfully optimized by the using of the SILVACO TCAD 2D device simulator, Atlas. In this paper, the specific on-resistance of the SJ TMOSFET is successfully obtained 0.96 mΩ·cm², which is of lesser value than the required one of 1.2 mΩ·cm² at the class of 100 V and 100 A for BLDC motor.

Analysis of micro-Raman spectra combined with electromagnetic simulation and stress simulation for local stress distribution in Si devices

We have developed a Raman simulation method using a finite-difference time-domain electromagnetic simulation and a finite element method stress simulation for precise local stress analysis of Si devices. This method accounts for the modification of light distribution by the sample structure, which significantly affects the Raman spectra near a metal gate structure with high refractive index and extinction coefficient. The precise stress estimation by this method is verified by analyzing polarized UV Raman measurements of a metal-oxide semiconductor field-effect transistor structure with a metal gate.

High mobility In0.53Ga0.47As quantum-well metal oxide semiconductor field effect transistor structures

In this paper, we demonstrate high electron mobility In0.53Ga0.47As quantum-well metal oxide semiconductor field effect transistor (MOSFET) structures. The Al2O3 (gate dielectric)/ In0.53Ga0.47As-In0.52Al0.48As (barrier)/In0.53Ga0.47As (channel) structures were fabricated, and the mobility was obtained by Hall measurements. The structures with in-situ chemical vapor deposition (CVD) Al2O3 displayed higher mobility than identical structures fabricated with in situ atomic layer deposition Al2O3, which indicates that CVD process resulted in a lower Al2O3/In0.53Ga0.47As interfacial defect density. A gate bias was applied to the structure with CVD Al2O3, and a peak mobility of 9243 cm2/V s at a carrier density of 2.7 × 1012 cm−2 was demonstrated for the structure with a 4 nm In0.53Ga0.47As-In0.52Al0.48As barrier. A model based on internal phonon scattering and interfacial defect coulomb scattering was developed to explain the experimental data and predict the mobility of In0.53Ga0.47As MOSFET structures.

New 4H silicon carbide metal semiconductor field-effect transistor with a buffer layer between the gate and the channel layer

A new 4H silicon carbide metal semiconductor field-effect transistor (4H-SiC MESFET) structure with a buffer layer between the gate and the channel layer is proposed in this paper for high power microwave applications. The physics-based analytical models for calculating the performance of the proposed device are obtained by solving one- and two-dimensional Poisson's equations. In the models, we take into account not only two regions under the gate but also a third high field region between the gate and the drain which is usually omitted. The direct-current and the alternating-current performances for the proposed 4H-SiC MESFET with a buffer layer of 0.2 μm are calculated. The calculated results are in good agreement with the experimental data. The current is larger than that of the conventional structure. The cutoff frequency (fT) and the maximum oscillation frequency (fmax) are 20.4 GHz and 101.6 GHz, respectively, which are higher than 7.8 GHz and 45.3 GHz of the conventional structure. Therefore, the proposed 4H-SiC MESFET structure has better power and microwave performances than the conventional structure.

Mechanical Stress Evaluation of Si Metal–Oxide–Semiconductor Field-Effect Transistor Structure Using Polarized Ultraviolet Raman Spectroscopy Measurements and Calibrated Technology-Computer-Aided-Design Simulations

Mechanical Stress Evaluation of Si Metal–Oxide–Semiconductor Field-Effect Transistor Structure Using Polarized Ultraviolet Raman Spectroscopy Measurements and Calibrated Technology-Computer-Aided-Design Simulations

Mechanical Stress Evaluation of Si Metal–Oxide–Semiconductor Field-Effect Transistor Structure Using Polarized Ultraviolet Raman Spectroscopy Measurements and Calibrated Technology-Computer-Aided-Design Simulations

The mechanical stresses in Si metal–oxide–semiconductor field-effect transistors (MOSFETs) were evaluated by polarized UV Raman spectroscopy measurements and stress simulations. To calibrate stress parameters of the materials used in the Si MOSFETs, we compared measured and simulated Raman frequency shifts on the cleaved Si(110) surfaces of the MOSFETs. Consequently, we extracted intrinsic stress values of -400 MPa for a SiO2, -200 MPa for polycrystalline Si (poly-Si), 700 MPa for Ni silicide, 1250 MPa for a SiN tensile stress liner, and -3500 MPa for a SiN compressive stress liner by finding good agreement between the measured and simulated Raman shift distributions. To verify our stress simulation, we investigated the source/drain width dependences of Raman frequency shifts near the channel regions of Si MOSFETs by top-view Raman measurements. The calculated Raman frequency shifts agreed well with the results of polarized Raman measurements in terms of not only relative tendencies but also absolute Raman shift values.

Improvement of floating island and thick bottom oxide trench gate metal–oxide–semiconductor field-effect transistor

A metal–oxide–semiconductor field-effect transistor (MOSFET) structure called FITMOS (floating island and thick bottom oxide trench gate MOSFET) has been successfully developed that exhibits outstanding low loss. This unique feature of the FITMOS is realised by fabricating deep trenches in the n-type drift layer, by forming p-type floating islands below the individual trenches using self-aligned ion implantation, and by fabricating trench gates with a thick oxide layer on the bottom. Then, the trade-off between the drain-to-source breakdown voltage and on-resistance has been further optimised by changing the shape of the floating islands from spherical to ellipsoidal. By improving the device structure, a breakdown voltage of 91 V and specific on-resistance of 41.5 mΩ mm2 have been obtained in a 4.5×4.5 mm square device with ellipsoidal floating islands. The relationship between the device structure and the reverse recovery characteristics is also investigated.

Gate leakage reduction through the use of a gate-to-source/drain non-overlapped metal–oxide–semiconductor field-effect transistor structure

In this paper, a novel, nanoscale, metal–oxide–semiconductor field-effect transistor (MOSFET) with gate-to-source/drain non-overlapped and high- k spacer structure has been demonstrated to reduce gate leakage current for the first time. The gate leakage behaviour of the novel MOSFET structure has been investigated with the help of a compact analytical model and Sentaurus simulation. The fringing gate electric field through the dielectric spacer induces an inversion layer in the non-overlap region to act as an extended source/drain region. It is found that the optimal gate-to-source/drain non-overlapped and high- k spacer structure reduces the gate leakage current to a great extent compared with an overlapped structure. Further, the proposed structure has an improved off-current, sub-threshold slope, and drain-induced barrier-lowering characteristic. It is concluded that this structure solves the problem of high leakage current without introducing the extra series resistance.

Normally off operation GaN-based MOSFETs for power electronics applications

Gallium nitride (GaN) is a promising electronic semiconductor material for high-power, high-temperature devices due to its remarkable material properties like wide bandgap, large critical electric field and high saturation velocity compared with Si. The metal-oxide–semiconductor (MOS) field-effect transistor (MOSFET) structure can be operated at a positive threshold voltage, namely the normally off mode, which is preferable for power transistors in terms of fail-safe operation. However in order to minimize the power losses in MOSFET operation, good interface quality at SiO2/GaN and low resistance in the n+-contact layer are strongly required. The MOS capacitors were used to characterize the interface states at SiO2/GaN, and the interface state density at Ec − 0.4 eV was less than 1 × 1011 cm−2 eV−1 after annealing at 900 °C for 30 min by the furnace. In addition, the activation annealing of Si-implanted GaN was performed at 1260 °C for 30 s in rapid thermal annealing (RTA) and its sheet resistance was 23 kΩ sq−1. Finally, we have fabricated GaN MOSFETs and have achieved more than 1 A operation in the normally off mode at more than 250 °C. The breakdown voltage was more than 1500 V. We also confirmed more than 100 h of consecutive operation at 250 °C at the moment.

Carbon Nanotube-Based Dual-Mode Biosensor for Electrical and Surface Plasmon Resonance Measurements

We have developed carbon nanotube-based dual-mode biosensors with a metal semiconductor field effect transistor structure on a quartz substrate. DNA hybridization occurring on the Au top gate can be detected by simultaneously measuring the change in the electrical conductance and the surface plasmon resonance (SPR). Since electrical and SPR measurements offer high sensitivity and reliability, respectively, this dual-mode biosensor is expected to provide both of these features.

Breakdown voltage and on-resistance considerations in the floating islands metal-oxide semiconductor field-effect transistor

This article presents an analytical study of a new power metal-oxide semiconductor field-effect transistor (MOSFET) structure, called ‘FLoating Islands MOSFET (FLIMOSFET)’, which presents a better trade-off between breakdown voltage and on-resistance compared with conventional VDMOSFETs. The improvement of this trade-off was obtained by inserting one (or several) floating island(s) in the lowly doped epitaxial layer. An analytical model was developed, based on the physical structure of the FLIMOSFET, in order to show the positive effect of the P-floating island on the ‘on-resistance/breakdown voltage’ compromise.

An efficient, simple, and precise way to map strain with nanometer resolution in semiconductor devices

We report on the development of the dark-field inline electron holography technique and its application to map strain in technologically relevant structures, using as an example the strain-engineered gate channel in a 45 nm metal-oxide semiconductor field-effect transistor structure. We show that this technique combines a large field of view of several micrometers with high precision (better than 0.01%), high spatial resolution (better than 1 nm), and very loose experimental requirements not possible with any other technique currently available.

Impact of in situ SiNx layer grown with metal organic vapor phase epitaxy on the electrical and optical properties of AlN/GaN metal insulator semiconductor field effect transistor structures

AlN/GaN metal insulator semiconductor field effect transistor structures (MISFETs) with and without in situ SiNx were investigated. The in situ SiNx passivation layer was deposited using silane and ammonia immediately after the AlN/GaN heterostructure growth by metal organic vapor phase epitaxy. Superior Ohmic quality and improvement of the dc and rf characteristics were obtained with devices made on passivated layers in comparison with unpassivated devices. This enhancement of electrical characteristics is attributed to the fact that the in situ SiNx suppresses the depletion of the two-dimensional electron gas (2DEG) and air exposure while processing. The studies of the in situ SiNx quality and its implication to the 2DEG conducted with Hall, transmission line measurements, capacitance-voltage (C-V) measurements, and photoluminescence measurements showed that the electrical and optical characteristics of AlN MISFET structures were substantially degraded or changed after SF6 plasma treatment.

MIS field effect transistor with barium titanate thin film as a gate insulator

The properties of barium titanate (BaTiO 3, BT) like, e.g. high dielectric constant and resistivity, allow it to find numerous applications in field of microelectronics. In this work silicon metal insulator semiconductor field effect transistor (MISFET) structures with BaTiO 3 (containing La 2O 3 admixture) thin films in a role of gate insulator were investigated. The films were produced by means of radio frequency plasma sputtering (RF PS) of sintered BaTiO 3 + La 2O 3 (2 wt.%) target. In the paper transfer and output current–voltage ( I– V), transconductance and output conductance characteristics of obtained transistors are presented and discussed. Basic parameters of these devices like, e.g. threshold voltage ( V TH ), are determined and discussed.

Selective Epitaxial Growth with Full Control of Pattern Dependency Behavior for pMOSFET Structures

This study presents a way to design chips to obtain uniform selective epitaxial growth of SiGe layers in p-type metal–oxide–semiconductor field-effect transistor (pMOSFET) structures. The pattern dependency behavior of the growth has been controlled over different sizes of transistors. It is shown that the exposed Si coverage of the chip is the main parameter in order to maintain control of the layer profile. This has been explained by the gas depletion theory of the growth species in the stationary boundary layer over the wafer. Control of the SiGe layer profile has been obtained over a wide range of device sizes by optimized process parameters in combination with a wafer pattern design consisting of dummy features causing uniform gas depletion over the chips of the wafer.

Implementation and application of cellular neural networks based on single electron device

This paper realizes cellular neural networks using the characteristic of negative differential resistance of hybrid single electron transistor and complementary metallic oxide semiconductor field effect transistor structure. The main building blocks consisting of cell core circuit, A and B template circuits are designed. Then a cellular neural network (CNN) is built and its application in image processing is studied. The computer simulation shows that the designed circuits are suitable for CNN implementation owing to its simple structure, low power dissipation and fast response. It could be used to form CNN of various scales so as to further increase the density of integrated circuits.