Semiconductor Fabrication Plant Research Articles

Modelling the challenging factors for setting up semiconductor fabrication plants: A case study from India

Semiconductors form the essential part of integrated circuits which are used in all electronic equipment and have revolutionised the world of electronics. The setting up of semiconductor fabrication industry is a tough task because of various challenging factors. Industries in India have initiated the setting up of the plant, but still, they are struggling to identify challenging factors hindering the setting up of semiconductor fabrication plants. A total of 27 challenging factors were identified through detailed literature and discussion with industrial experts by a questionnaire-based survey. Further, essential 15 challenging factors are identified based on mean-variance. Finally, this paper then uses the analytic hierarchy process (AHP) to prioritise the challenging factors.

Iterative two-stage hybrid algorithm for the vehicle lifter location problem in semiconductor manufacturing

Automated material handling systems (AMHSs) in semiconductor fabrication facilities (fabs) are inherently capital intensive because they are moving toward full automation. However, in addition to being capital intensive, full automation can come at the cost of compromised performance or instability when abnormal events occur. Vehicular congestion is one example of an abnormal event and is a recurring problem in fabs that reduces production efficiency. In this paper, motivated by a material handling system design problem when constructing a new semiconductor fabrication plant in practice, we present a model for optimizing the location of overhead hoist transport lifters, which have proven to be a suitable addition to AMHSs for resolving bottlenecks caused by heavy congestion. To do so, we study a capacitated facility location problem (CFLP) that incorporates real-life constraints and consider the interactions between lifters of differing types. We first propose a hybrid approach that combines a genetic algorithm with a depth-first search (DFS) based on memorization to approximate the optimum positions for the installation of the lifters. We then conduct a numerical experiment to compare the performance of our approach with optimal solutions in small- to medium-sized facilities and perform a sensitivity analysis for the important parameters involved. Finally, an experimental study based on real data from semiconductor fabs is conducted to demonstrate the applicability and usefulness of the proposed model.

Building information modeling services reuse for facility management for semiconductor fabrication plants

Abstract As building information modeling (BIM) technology becomes mature, there is an increasing demand for the interaction or interoperability between BIM tools and various facility management (FM) systems, especially in semiconductor fabrication plants (FABs). Customized BIM services, i.e., plugin programs, have been developed for FM systems to reuse BIM data or functionality. However, such development may make an FM system more vulnerable to external changes such as BIM tool upgrades. The quality of BIM models reused may deteriorate sharply even if a slight change occurs in any of the upstream BIM services. Based on the model-driven architecture defined by Object Management Group, this research proposes a semi-automated FM system factory called EncapsulatingBIM4FM to formalize the reuse process of BIM services so that changes on BIM tools will not propagate to an FM system. A pilot system for selected FM tasks for an FAB in Taiwan was crafted using EncapsulatingBIM4FM. The tests demonstrated that BIM and FM systems can achieve software interoperability, and they can evolve independently based on individual requirements. BIM's central role in the management of a facility's lifecycle information could be established if EncapsulatingBIM4FM is utilized to develop associated FM systems for the facility.

Identification of I‐equivalent subnetworks in Bayesian networks to incorporate experts' knowledge

AbstractBayesian networks (BNs) have been widely used in causal analysis because they can express the statistical relationship between significant variables. To gain superior causal analysis results, numerous studies have emphasized the importance of combining a knowledge‐based approach and a data‐based approach. However, combining these two approaches is a difficult task because it can reduce the effectiveness of the BN structure learning. Further, the learning schemes of BNs for computational efficiency can cause an inadequate causal analysis. To address these problems, we propose a knowledge‐driven BN structure calibration algorithm for rich causal semantics. We first present an algorithm that can efficiently identify the subnetworks that can be altered to satisfy the learning condition of the BNs. We then reflect experts' knowledge to reduce erroneous causalities from the learned network. Experiments on various simulation and benchmark data sets were conducted to examine the properties of the proposed method and to compare its performance with an existing method. Further, an experimental study with real data from semiconductor fabrication plants demonstrated that the proposed method provided superior performance in improving structural accuracy.

A particle swarm optimization algorithm for multi-row facility layout problem in semiconductor fabrication

Semiconductor chips are the most basic components of smart wearable device and other AI devices. The problem of facility layout in semiconductor fabrication is considered very important, for it will affect the cost saving and performance improvement of the key chips implanted in artificial intelligence production such as intelligent wearable devices. Facility layout problem in semiconductor fabrication is to determine the optimal placement of facilities in a multi-row particular area. In this study, we propose a mathematical model to solve multi-row facility layout problem regarded as a predefined system of discrete points to place the processing modules at different locations in semiconductor fabrication plants (i.e., semiconductor fabrication). Considering the large amounts of computation required we use particle swarm optimization (PSO) algorithm to solve the multi-row facility layout problem by minimizing the total transportation distance between the modules. The results confirm that the PSO algorithm is an effective and practical approach for solving the multi-row facility layout problem within a shorter period. The effect of the number of particles on the efficiency of the PSO algorithm is also discussed in this paper.

Algae-based sorbents for removal of gallium from semiconductor manufacturing wastewater

Removal of various soluble metallic impurities from wastewater in semiconductor fabrication plants is a critical issue facing the microelectronics industry. Considering the large volume of wastewater and a highly variable concentration of these contaminants, finding a robust adsorption process using a low-cost sorbent is of great value and interest to this industry. Of particular interest is the development of a flow-through abatement method for treating the process-tool effluent before it is mixed with other wastewaters. In this work, a strain of freshwater green algae (Chlorella sorokiniana), representing an algae-based sorbent, and a simulated wastewater, containing soluble gallium as the metallic impurity, are used as model compounds. The choice of gallium is based on its increased use, and the lack of related adsorption data compared to the information available for other metals such as copper and arsenic. Both batch and continuous-flow operations were used in this study. Comprehensive process models were developed and validated for both batch and flow systems. These models were found to be valuable for understanding the process steps as well as for obtaining the fundamental parameters that are needed for process design and scale-up. The sorbent was found to have high adsorption capacity even at low pH values (14.1 mg/g at pH of 2.3, and 38.5 mg/g at pH of 2.8). Based on the comparison of adsorption rate and capacity with data on previously studied and conventional sorbents, such as activated carbon and ion-exchange resins, the use of this algae-based sorbent is potentially an attractive option for the removal of gallium from the process-tool wastewater.

The development of flexible integrated circuits based on thin-film transistors

The use of thin-film transistors in liquid-crystal display applications was commercialized about 30 years ago. The key advantages of thin-film transistor technologies compared with traditional silicon complementary metal–oxide–semiconductor(CMOS) transistors are their ability to be manufactured on large substrates at low-cost per unit area and at low processing temperatures, which allows them to be directly integrated onto a variety of flexible substrates. Here, I discuss the potential of thin-film transistor technologies in the development of low-cost, flexible integrated circuits for applications beyond flat-panel displays, including the Internet of Things and lightweight wearable electronics. Focusing on the relatively mature thin-film transistor technologies that are available in semiconductor fabrication plants today, the different technologies are evaluated in terms of their potential circuit applications and the implications they will have in the design of integrated circuits, from basic logic gates to more complex digital and analogue systems. I also discuss microprocessors and non-silicon, near-field communication tags that can communicate with smartphones, and I propose the concept of a Moore’s law for flexible electronics. This Perspective discusses the potential of thin-film transistor technologies in the development of low-cost, flexible integrated circuits, evaluating the more mature technologies available today in terms of their potential circuit applications and the implications they will have in the design of integrated circuits.

Yield Forecasting Across Semiconductor Fabrication Plants and Design Generations

Yield estimation is an indispensable piece of information at the onset of high-volume production of a device, as it can inform timely process and design refinements in order to achieve high yield, rapid ramp-up, and fast time-to-market. To date, yield estimation is generally performed through simulation-based methods. However, such methods are not only very time-consuming for certain circuit classes, but also limited by the accuracy of the statistical models provided in the process design kits (PDKs). In contrast, herein we introduce yield estimation solutions which rely exclusively on silicon measurements and we apply them toward predicting yield during: 1) production migration from one fabrication facility to another and 2) transition from one design generation to the next. These solutions are applicable to any circuit, regardless of PDK accuracy and transistor-level simulation complexity, and range from rather straightforward to more sophisticated ones, capable of leveraging additional sources of silicon data. Effectiveness of the proposed yield forecasting methods is evaluated using actual high-volume production data from two 65-nm RF transceiver devices.

Imaging performance improvement of coherent extreme-ultraviolet scatterometry microscope with high-harmonic-generation extreme-ultraviolet source

In extreme-ultraviolet (EUV) lithography, the development of a review apparatus for the EUV mask pattern at an exposure wavelength of 13.5 nm is required. The EUV mask is composed of an absorber pattern and a Mo/Si multilayer on a glass substrate. This mask pattern has a three-dimensional (3D) structure. The 3D structure would modulate the EUV reflection phase, which would cause focus and pattern shifts. Thus, the review of the EUV phase image is also important. We have developed a coherent EUV scatterometry microscope (CSM), which is a simple microscope without objective optics. The EUV phase and intensity images were reconstructed with diffraction images by ptychography. For a standalone mask review, the high-harmonic-generation (HHG) EUV source was employed. In this study, we updated the sample stage, pump-laser reduction system, and gas-pressure control system to reconstruct the image. As a result, an 88 nm line-and-space pattern and a cross-line pattern were reconstructed. In addition, a particle defect of 2 µm diameter was well reconstructed. This demonstrated the high capability of the standalone CSM, which can hence be used in factories, such as mask shops and semiconductor fabrication plants.

Lifter assignment problem for inter-line transfers in semiconductor manufacturing facilities

As more advanced and diverse semiconductor products are demanded, each product requires more processing steps, and the product mix changes frequently. The production volume may exceed the capacity of one line at a semiconductor fabrication plant, and the equipment utilization becomes unbalanced. This situation leads to a combination of multiple lines, which requires the transfer of wafer lots from one line to another. Lifters are machines for inter-line transfers, and they can quickly become a critical bottleneck of semiconductor manufacturing. We introduce an online assignment problem between lifters and inter-line transfers, which is motivated in unified automated material handling systems. We propose several solution methods to improve assignment efficiency and resolve inter-line transfer delays in material handling systems. When compared to the round robin method used currently, the shortest expected arrival time (SEAT) rule decreases delivery time by 8.9 %.

Design of Fast Real Time Controller for the Dynamic Voltage Restorer Based on Instantaneous Power Theory

The fast variations in the source voltage can affect the performance of the loads such as (a) semiconductor fabrication plants (b) paper mills (c) food processing plants and (d) automotive assembly plants. The common disturbances in the source voltages are the voltage sags or voltage swells this can be due to (i) disturbances arising in the transmission system, (ii) adjacent feeder faults and (iii) fuse or breaker operation. Voltage sags of 10% lasting for 5-10 cycles can result in costly damage in the loads. To mitigate the problems of poor quality power supply, voltage source converters can be connected in series with transmission lines as compensators. These are known as Dynamic Voltage Restorer (DVR) or Static Voltage Restorer. In this paper, a new scheme to control DVR using adaptive neuro fuzzy logic is proposed. In this controller, Takagi-Sugeno fuzzy rules are trained using off-line neuro fuzzy system. Also, instantaneous power theory is used to calculate the phase voltage due to its high accuracy and less computation. The simulation and practical results show that real time application of the proposed controller is possible and robust compared to conventional controllers previously investigated. The experiment results obtained using the dSPACE data acquisition system and Matlab real time toolbox.

Production Planning and WIP Assignment for Wafer Fabrication Tools With Availability Constraints

This paper deals with a short-term production plan of a single toolset during a shift at a semiconductor fabrication plant. We propose a cost-based optimization model that seeks to minimize the cost of the shift while meeting the following conditions: 1) the shift produces its required output, measured in work-in-process (WIP) levels; 2) preventive maintenance (PM) tasks are carried out in compliance with the manufacturer's recommended PM policy; and 3) the equipment undergoes cleaning operations, as recommended by the manufacturer, in a way that minimizes the production of blank wafers (a by-product of the cleaning process). A linear programming model is formulated and a practical procedure is provided to solve this production plan problem. Data from a real fab are used to demonstrate the optimality and applicability of the proposed approach. Results of various sensitivity analyzes further demonstrate how the model can be used to analyze the impact of changes in cost parameters, WIP levels and production rate parameters on the optimal solution.

Condition Monitoring and Operational Decision Making in Semiconductor Manufacturing

Today, the majority of semiconductor fabrication plants (fabs) conduct equipment preventive maintenance based on statistically-derived time-or wafer-count-based intervals. While these practices have had relative success in managing equipment availability and product yield, the cost, both in time and materials, remains high. Condition-based maintenance has been successfully adopted in several industries, where costs associated with equipment downtime range from potential loss of life to unacceptable affects to companies' bottom lines. In this paper, we present a method for the monitoring of complex systems in the presence of multiple operating regimes. In addition, the new representation of degradation processes will be used to define an optimization procedure that facilitates concurrent maintenance and operational decision-making in a manufacturing system. This decision-making procedure metaheuristically maximizes a customizable cost function that reflects the benefits of production uptime, and the losses incurred due to deficient quality and downtime. The new degradation monitoring method is illustrated through the monitoring of a deposition tool operating over a prolonged period of time in a major fab, while the operational decision-making is demonstrated using simulated operation of a generic cluster tool.

Removal of perfluorooctanoic acid and perfluorooctane sulfonate via ozonation under alkaline condition

The elimination of recalcitrant, ubiquitous perfluoroalkyl acids (PFAAs) such as perfluorooctanoic acid (PFOA) and perfluorooctane sulfonate (PFOS) is desirable for reducing potential human health and environmental risks. We here report the degradation of PFOA and PFOS by 85–100% via ozonation under alkaline condition being studied at environmentally relevant contaminant concentrations of 50μgL−1 to 5mgL−1, with enhanced removal rates by addition of hydrogen peroxide. Enhanced removal is achieved by ozonation pretreatment for 15min at the ambient pH (i.e. 4–5), followed by elevation of pH to 11 and continued ozonation treatment for 4h. The ozonation pretreatment resulted in increased degradation of PFOA by 56% and PFOS by 42%. The results indicated hydroxyl radical-driven degradation of PFOA and PFOS in both treatments by ozone and peroxone under alkaline conditions. Wastewaters from electronics and semiconductor fabrication plants in the Science Park of Hsinchu city, Taiwan containing PFOA and PFOS have been readily treated by ozonation under alkaline condition. Treatment of PFAAs by ozone or peroxone proves to be efficient in terms of energy requirement, contact time, and removal rate.

Neuro‐Fuzzy Cost Estimation Model Enhanced by Fast Messy Genetic Algorithms for Semiconductor Hookup Construction

Abstract: Semiconductor hookup construction (i.e., constructing process tool piping systems) is critical to semiconductor fabrication plant completion. During the conceptual project phase, it is difficult to conduct an accurate cost estimate due to the great amount of uncertain cost items. This study proposes a new model for estimating semiconductor hookup construction project costs. The developed model, called FALCON‐COST, integrates the component ratios method, fuzzy adaptive learning control network (FALCON), fast messy genetic algorithm (fmGA), and three‐point cost estimation method to systematically deal with a cost‐estimating environment involving limited and uncertain data. In addition, the proposed model improves the current FALCON by devising a new algorithm to conduct building block selection and random gene deletion so that fmGA operations can be implemented in FALCON. The results of 54 case studies demonstrate that the proposed model has estimation accuracy of 83.82%, meaning it is approximately 22.74%, 23.08%, and 21.95% more accurate than the conventional average cost method, component ratios method, and modified FALCON‐COST method, respectively. Providing project managers with reliable cost estimates is essential for effectively controlling project costs.

An evolving hybrid neural approach for predicting job completion time in a semiconductor fabrication plant

Predicting job completion time is an important but difficult task to a semiconductor fabrication plant. To further enhance its effectiveness, an evolving hybrid neural approach is proposed in this study. To evaluate the effectiveness of the proposed approach, Production Simulation (PS) is also employed to generate test data. According to experimental results, the predicting accuracy of the evolving hybrid neural approach is significantly better than those of many existing approaches. In addition, to improve the practicability of the evolving hybrid neural approach, several issues in practical applications are addressed and discussed. Though the proposed evolving hybrid neural approach seems to be theoretically complicated, its ease of implementation on the production planning and control for a semiconductor plant is demonstrated in this study. [Received 10 October 2008; Revised 05 March 2009; Revised 13 June 2009; Accepted 14 June 2009]

Study on an Application Technology for Aberration Data of Exposure Tools

We have developed techniques for analyzing the imaging performances of KrF exposure tools that use wave aberrations measured at 25 different image heights in a semiconductor fabrication plant. The wave aberrations are obtained by double printing lattice and square patterns and measuring their lateral registration errors. It is confirmed that multiple regression of the 3rd and 5th coma aberration coefficients permits the differences in the widths at the left and right edges of seven pairs of 250nm line and spatial patterns to be predicted to an accuracy of 9.4 nm(2σ). The results of an exposure and development simulation using wave aberrations agree with experimental results for the changes in the width of a 200 nm isolated line pattern with the focus position. This simulation is applied to quantify focus margins, which are found to be degraded due to astigmatism and spherical aberrations. Controlling the excimer laser wavelength is proposed as a means to reduce the spherical aberrations.

Assessment of removal efficiency of perfluorocompounds (PFCs) in a semiconductor fabrication plant by gas chromatography

This study investigated a gas chromatographic (GC) method to assess the destruction or removal efficiency (DRE) of local scrubbers on five perfluorocompounds (PFCs), i.e., SF 6, NF 3, CF 4, C 2F 6, and C 3F 8, which are very potent greenhouse gases used in a semiconductor fabrication plant. Air samples taken at inlets and outlets of local scrubbers were analyzed by a self-constructed multi-column GC system equipped with thermal conductivity detection. Three packed columns were integrated into the heart-cut GC system to allow simultaneous analysis of the five target PFCs. The Porapak Q pre-column performs rough separation and cuts eluent groups to two analytical columns for optimal separation. The Molecular Sieve – 5A column separated NF 3, CF 4, and C 3F 8 and the second Porapak Q separated SF 6 and C 2F 6. Linearity was greater than 0.995 ( R 2) for the five PFCs, and the reproducibility was about 4% (relative standard deviation) for NF 3, and better than 0.5% for the other four PFCs. DRE for the combustion (CB) and electric–thermal types of local scrubbers was evaluated by taking into account the in-line dilution from air and fuel gases. Both flow and tracer methods were employed to deduce the dilution factors (DFs). For the tracer method, helium was employed as the tracer and injected upstream of the scrubbers and thus mixed with the exhaust gas. With this method, the DFs were determined to be in the range from 4.8 to 5.9 for the CB unit, significantly higher than the value of 3.3 based on the flow method. The DREs for the CB unit for C 3F 8 were greater than 90% and between 40% and 50% for CF 4.

A Systematic Methodology For Low Yield Excursion Analysis

Due to the complicated process and huge cost of a modern semiconductor wafer foundry, maintaining stable yield is very critical. If the yield killer is not identified, no containment actions can be taken; if there are no containment actions, the impact will continue and the yield loss will enlarge. In this paper, we have proposed a new systematic methodology for low yield excursion analysis. It integrated Kepner-Tregoe (KT) method and fishbone factor analysis to identify the real yield killer in an efficient and effective manner. From the real case application, it was proven that KT method and fishbone factor analysis can be integrated and resolved the issue successfully. This methodology has great potential to extend to other complicated and urgent daily management issues in a semiconductor fabrication plant.

A hybrid intelligent approach for output projection in a semiconductor fabrication plant

A hybrid intelligent approach is proposed which can be used to estimate the output of each product type in a semiconductor fabrication plant. This is a critical task for plant operation. First, the hybrid fuzzy-c-means (FCM) and fuzzy-back-propagation-neural-network (FBPN) approach is applied to estimate the output time for every job in the plant. Subsequently, the fuzzy output projection function (FOPF) is proposed to project the outputs into each future time period. To evaluate the advantages and/or disadvantages of the hybrid intelligent approach, a simulated semiconductor plant model is also used in this study to generate test data. From the experimental results, the output projection accuracy by the hybrid intelligent approach was significantly better than that of some existing approaches.