ABSTRACT An analytical and physical model for the double-gate vertical JFET (VJFET) with a lateral and a vertical channels is presented. The model has been implemented and tested in the SABER circuit simulator and its modeling language, MAST. The model includes an asymmetric representation of the lateral channel which is the main contribution of the paper. The blocking condition depends on both gate voltages. It is a key issue of the VJFET model and it is presented in details. Each junction of the structure is represented as a Shockley pn-junction model in parallel with the associated junction capacitance. The comparison between simulations and experiments yields to satisfying results, both in static and dynamic conditions. The analysis of the remaining difficulties to be solved is given.
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