Abstract
An analytical one-dimensional thermoelectrical model for the power MOSFET transistor (VDMOS transistor) has been developed and implemented in the Saber circuit simulator. The device temperature becomes an interactive variable during the simulation. The model results in the combination of the electrical model of the device with a thermal network which models the different material layers crossed by the heat flow from the silicon chip to the heatsink (conduction phenomenon), and also takes into account the radiation and convection phenomena. The accuracy of the model is evaluated with electrical and thermal characterizations, and with a validation circuit.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
