A rational formulation of thermal circuit models for electrothermal simulation. II. Model reduction techniques [power electronic systems

Abstract

For pt. I see ibid., vol. 43, no. 9, p. 721-32 (1996). To increase the efficiency of the electrothermal simulation of power electronic circuits and devices, model reduction techniques are applied to develop reduced thermal circuit models of Si chips, thermal packages, and heat sinks. Both the Modal Superposition method and a Component Mode Synthesis method are presented together with a model error estimation and a Ritz vector method. An alternative method for substructuring is also included. The reduced thermal circuit models are verified and implemented in the SABER circuit simulator. The electrothermal model of a full-bridge converter is simulated employing the proposed approach, and the results discussed.