Roll Lamination Research Articles

Stress Reduced Embedded Die Substrate Structure Fabricated for Heterogeneous Integration Using Selective Laser Ablation

The demand for high-speed, multi-functionality, and miniaturization of devices increases with a general acceptance of mobile communication devices such as smartphones and smartwatches in the next-generation 5G and IoT era. Undoubtedly, the semiconductor package of the mobile communication devices needs to be downsized with keeping function. One of the solutions is embedded die substrate technology, which is able to integrate passive components and active components with the minimum volume in the same body to implement heterogeneous integration. However, in the conventional embedded die substrate, the embedded die is fully covered by the substrate materials. This fact results in the generation of significant residual stress in the embedded components. Accordingly, the stress-sensitive components such as micro electro mechanical systems (MEMS) sensor, bulk acoustic wave (BAW) resonator, and surface acoustic wave (SAW) filter are regarded unsuitable for embedding. In our previous study, we newly developed an embedded die substrate structure having a hollow chamber at both sides of the die to mitigate a severe limitation for the stress-sensitive devices [1]. Measurements of stress in a sensor chip embedded in substrate have indicated a significant reduction in stress achieved by the formation of the hollow chamber. The results have also suggested technology options for further reduction of stress. This paper will report the formation of slots in the resin material at the periphery of the die, which is newly developed for stress-free embedded die. The manufacturing flow of embedded die substrate with a hollow chamber starts from the formation of the cavity core frame using a conventional PCB process. The through-hole cavity is formed on an FR4 core frame by a router. The single-sided adhesive tacky tape, which enables to hold the die, is laminated by a roll laminator at the bottom side of the frame. The die is placed into the cavity with a face-down using a flip-chip bonder. After that, the cavity filling material is laminated by a vacuum laminator from the opposite side of the tacky tape. The die into the cavity is completely covered by filling material and proceed the cure at 190 °C for 60 min. After die embedding, the thin layer of the filling material on the die is removed by CO2 laser ablation. After that, the tacky tape is peeled off at room temperature. Accordingly, both side of the die is exposed into the air, and the die is only held at the peripheral by the filling material. After embedding the die, a 6-um-thick copper redistribution (RDL) layer is formed by a semi-additive process (SAP) to connect the IO pads on the die. Then, the hollow chamber at both sides was formed by using cavity prepreg and FR4 core as a cap layer. Finally, laser via, 2nd copper RDL, solder mask, and singulation proceed, then the embedded die substrate is finalized. As a result, cavities are formed at the topside and bottom side of the die, and the die is mechanically held by the filling material only at the periphery. The above process was applied to embedding a piezo-resistance gauge chip, which is able to measure the stress and its distribution generated at the chip surface and evolution of the stress with the progress of the fabrication steps. After completing the packaging, the measurement was extended to the temperature dependency from -60°C to 100°C. The results clearly showed a significant reduction of residual die stress. They also revealed the effects of the material properties of the filling resin. However, even with low modulus filling material, the residual stress remained more than 22 MPa at 50°C environments. To further reduce stress on the die for stress-free packaging, we newly introduce slits in the filling material at the periphery of the die. CO2 laser pulses were applied around the die to make a through-hole via or a through-hole slit in the filling material. We report a change in stress with the ratio of the slit from zero up to 80% as measured with the piezo-resistance gauge chip. Moreover, the effects of the position of the slit are discussed by taking stress concentration at the corner of the die into consideration. To summarize, this paper reports a newly developed fabrication process of embedded die substrate technology for mechanical stress-free packaging. The characteristic of the laser ablation is fully utilized to form a stress-releasing structure around the embedded die. This new technology will enable heterogeneous integration of stress-sensitive components in an embedded die substrate.

Fast ionic PEO-NaCF3SO3-Na3Zr2Si2P3O12 membranes for all-solid-state energy storage devices

The present investigation delves into the ionic transport studies in Na+ ion-based composite solid polymer electrolytes (CSPEs) reinforced with nano crystallites of Na3Zr2Si2P3O12 (NZSP) and reveals their possible application as solid-state electrolyte, particularly in supercapacitors. These membranes have been prepared by solution casting. Highest conductivity of ∼ 10-4 Ω-1cm−1 is achieved for a typical composition 10NaCF3SO3-90(0.40PEO-0.60NZSP) at 40 °C. For the samples with large NZSP content (≥54 wt%), polymer (PEO) melting is hardly seen to be affecting the conductivity behaviour. The content of NZSP also improves electrochemical stability window. Further, the ‘liquid-free’ all-solid-state supercapacitors have been prepared by hot roll lamination using the hybrid CSPEs as electrolyte and activated charcoal electrodes (surface area ∼ 1000m2g−1). The NZSP content in the polymer matrix influences supercapacitor performance. The supercapacitors are stable with CV and galvanostatic charge–discharge cycling, and exhibit a specific capacitance of ∼ 150 Fg−1 at a current density of ∼ 2Ag−1 and 1 V operating voltage.

Semi-additive patterning process based fabrication of miniaturized, package-embedded high conversion ratio inductors for DC-DC converters

• A scalable semi-additive patterning process for fabrication of highly miniaturized toroidal inductors irrespective of bulk conductivity of the magnetic core. • Double sided, 3-step drilling for less tapered through substrate features. • Dielectric slot filling requires higher vacuum time, pressure, and pressure time. • No photoresist seepage into through substrate vias with roll lamination. Many data centers currently operate at low power efficiencies (∼75%) because of the many voltage conversions necessary to step down inputs from 48 V to 1 V. This voltage step-down is accomplished in the Power System-on-Chip (PwrSoC) package, which contain large quantities of surface mount inductors. However, surface mount inductors are large in area and require long power delivery networks to supply the voltage to the PwrSoC, thereby leading to interconnection losses and reducing overall system efficiency. Miniaturizing these inductors could place them nearer to the PwrSoC. Miniaturized and embeddable solenoid and toroidal inductors can be built from magnetic substrates using patterned copper windings created from through substrate vias and micropatterning. However, to achieve inductances close to SMTs, magnetic substrates must be thick or have large lateral footprints. Furthermore, the magnetic flux leakage must be minimized between inductors. This work will elucidate the challenges of dielectric filling of through substrate slots, laser drilling of slots and vias in different substrates, and dry film photoresist lamination that will enable complete copper windings. This paper presents the process flow, challenges, and redressal of these challenges to build miniaturized, embedded inductors that have previously been introduced by our research team.

Novel measuring method for prepreg processability of oxide fiber ceramic matrix composites

In this study, the processing behavior of pre-impregnated fabrics (prepregs) for the fabrication of ceramic matrix composites (CMC), specifically oxide fiber composites (OFC), was investigated. The evaluation of rheological slurry properties alone proved to be insufficient for the assessment of their suitability for the cold roll lamination process used in this work. Therefore, a novel testing method was developed, which determined the behavior of a prepreg stack in process-oriented conditions. This provided qualitative information not only on the squeeze flow of the slurry, but also on its ability to maintain this imposed level of compaction with no major rebounding throughout the following processing steps. Tests were performed with three different slurries and the results obtained corresponded well with the fabrication of full-scale OFC plates. Hence, the results gained by this novel method provide a more straight-forward approach for the evaluation of prepreg systems and quality control.

Versatile fabrication of liquid metal nano-ink based flexible electronic devices

Liquid metal (LM) of eutectic Gallium-Indium (EGaIn) possesses room temperature fluidity and excellent conductivity, allowing for promising potentials in flexible electronics. However, it is a considerable challenge to fabricate LM based circuits due to high surface tension of EGaIn. Here, we present a polyvinylpyrrolidone (PVP) stabilized LM nano-ink with excellent colloidal stability can be employed for constructing flexible devices by versatile fabrication strategies. By direct-writing, the circuits can be fabricated on common paper, followed by mechanical sintered to recover conductivity. The circuits can be then enveloped by temperature-controlled roll laminator for its practical durability. By filtration, LM nanodroplets were sucked into the porous structure of a Nylon film to form conductive membrane, which could restore conductive property by friction sintering. Subsequently, customized conductive pattern readily obtained by laser cutting could be encapsulated in flexible material of Ecoflex, yielding different flexible devices including NFC antenna, capacitor based pressure sensor and bio-electrodes for nerve signal sensing of living mice in vivo. The current work presents versatile fabrication strategies of LM nano-ink based flexible electronics, which hold great possibilities in the field of printed electronics. Furthermore, the LM nano-ink that reconciles stability and biocompatibility provides huge potential for future implanted flexible electronics.

Flexible and fully transparent WORM memory devices based on Ag nanoparticles blended with poly(ethylene-co-vinyl acetate)

Silver nanoparticles (Ag NPs) blended with poly(ethylene-co-vinyl acetate) (EVA) were used as an active layer to fabricate flexible and fully transparent memory devices by using the spin-coating method followed by the thermal roll lamination technique with the structure of ITO/EVA:Ag NPs/ITO. The devices exhibited a non-volatile write-once-read-many-times (WORM) memory type and possessed current bi-stability with ON/OFF current ratio within the range of 104-105 at a reading voltage of +1 V. The data continuous read operations reached more than 10 h, which revealed the stability of the memory devices over a long period of time. The conduction mechanisms of the memory device could be explained by theoretical models and proposed by electron trapping at the trapping center of Ag NPs inside the EVA matrix. In addition, the memory device showed a fast response of 231 ns and was fully transparent with maximum transmittance of the device at 83.2%. Further, the devices could be operated under the bending condition of more than 0.83% strain.

Transparent write-once-read-many-times memory devices based on an ITO/EVA:rGO/ITO structure

Fully transparent electronic devices play an important role in electronic applications. Well-known examples are the wearable devices and transparent displays; their applications are transparent memory devices of interest. The transparent write-once-read-many-times (WORM) memory devices based on synthesized graphene oxide (GO) blended in poly (ethylene-co-vinyl acetate) (EVA) had been fabricated by a thermal roll lamination technique in which the synthesized GO inside the EVA matrix was reduced into reduced graphene oxide (rGO) during the lamination process. The memory devices exhibited an optical transmittance of more than 60% in the visible light region. The conduction mechanisms of the memory devices were identified using theoretical models based on the current–voltage (I–V) curves. The fitted I–V results were described by the conductive filaments in which electrons were transported through the rGO direct contacts. In addition, the maximum ON/OFF current ratio of the transparent WORM memory device was approximately 5 × 105, and the retention time tests showed two current states with good data retention properties under different temperatures.

Bi-stable switching behaviors of ITO/EVA:ZnO NPs/ITO transparent memory devices fabricated using a thermal roll lamination technique

This research reported the transparent non-volatile write-once-read-many-times (WORM) memory behaviors of memory devices based on zinc oxide nanoparticles (ZnO NPs) embedded in an insulating poly(ethylene-co-vinyl acetate) (EVA), sandwiched between two ITO-coated flexible polyethylene naphthalate (PEN) substrates. The memory devices were fabricated employing a thermal roll lamination technique with the laminated-structure of PEN/ITO/EVA:ZnO NPs/ITO/PEN. The average transmittance of the laminated memory device was over 70% for an optical visible range of 400–800 nm. The maximum ON/OFF current ratio for the memory device was about 103. In addition, a reliability study for continuous read operations in a long time memory device is presented. The conductance switching mechanisms of the laminated memory device were analyzed using theoretical models on the basis of the experimental data.

Photopatternable Laminate BCB Dielectric

Divinylsiloxane-bis-benzocyclobutene (DVS-bis-BCB, or BCB) is a well-known dielectric material that has been used in high volume manufacturing for many years (Dow's CYCLOTENE™ 3000/4000-series Advanced Electronic Resins). Typically, the application of these products has been by spincoating or spray coating of the dielectric material from a solvent-based formulation. However, for certain applications - for example, those involving large area, square substrates such as glass panels - it is desirable to be able to apply the BCB-based dielectric material using a dry film coating process, such as vacuum or hot roll lamination. In this paper, we describe the concept of creating a laminate film utilizing DVS-bis-BCB as the primary dielectric material component. In creating the laminate dielectric material, it is important to maintain the unique combination of thermal and electrical properties of DVS-bis-BCB, including high thermal stability, excellent copper barrier properties, low moisture uptake, low dielectric constant, and low dielectric loss. However, DVS-bis-BCB alone is too rigid to produce a high quality laminate film, therefore, it is necessary to modify the formulation to improve flexibility and lamination quality. As the flexibility of the film is increased, higher fracture toughness (K1C) and higher elongation values should result. Novel formulation adjustments to the base DVS-bis-BCB polymer system have resulted in an experimental laminate dielectric product that will be the focus of this discussion. Depending on the application, laminate films can vary in thickness from 2μm to 50μm or even thicker. A typical laminate film construct includes the BCB-based dielectric film with a base sheet of an optically-clear polyester (PET) film and a polyethylene (PE) cover sheet. The DVS-bis-BCB-based laminate can be tuned with appropriate additives to either pattern with UV exposure from a tool such as a Süss MicroTec Mask Aligner (50mJ/cm2 – 100mJ/cm2 exposure energy) or laser pattern with a tool such as a Süss MicroTec 248nm Excimer Laser. Aspect ratios of 1:1.5 have been achieved with a photopatternable DVS-bis-BCB film and aspect ratios of >1:1 are possible with a laser-patterned film. Beside the photopackage added to the film to enable UV patterning, toughening additives have also been incorporated to enhance the fracture toughness (K1C) and elongation properties. K1C for the laminate has been improved to 0.55Mpa·m1/2 vs. 0.35Mpa·m1/2 for DVS-bis-BCB. Elongation has been improved to 13% for the laminate vs. 8% for DVS-bis-BCB. Electrical properties are similar to DVS-bis-BCB. An additional attribute of the laminate dielectric is the ability to tent over and protect vias. Vias >100μm diameter have successfully been tented with a 10μm thick film. A DVS-bis-BCB-based laminate has been demonstrated with continued optimization and evaluation to follow.

Mechanical Characteristic Changes of Carbon Fiber Reinforced Plastics (CFRP) Depending on the Lamination Methods

The prepreg process among the CFRP (Carbon Fiber Reinforced Plastic) forming methods is the short term of ‘Pre-impregnation’, which is widely used for aerospace composites that require a high quality property such as a fiber-reinforced woven fabric, in which an epoxy hardening resin is impregnated. the reality is, however, that this process requires continuous researches and developments for its commercialization because the delamination characteristically develops between the layers when a great weight is loaded from outside. to supplement such demerit, three lamination methods among the prepreg lamination methods of CFRP were designed to minimize the delamination between the layers due to external impacts. Further, the newly designed methods and the existing lamination methods were analyzed through a mechanical characteristic test, tensile test and infrared thermal device during the tensile tests, to obtain a better property than the existing lamination methods. the tensile test result showed that the newly designed three lamination methods, i.e. Roll, Half and Zigzag lamination methods, appeared superior to the Play lamination method in the aspects of the strength and strain. The strength of the Zigzag lamination method, which was the highest, was confirmed as being improved by about 20% than that of the Ply method.

Thin layer joining by gas adsorption

Abstract Attempt has been made to join borosilicate glass and cycloolefin (COP) polymer film by using gas adsorption method. After corona plasma treat, COP was exposed to (3-glycidoxypropyl) trimethoxysilane (GPS) and glass to (3-aminopropyl) triethoxysilane (APS) both in air atmosphere, resulting in co-adsorption of water vapor in the atmosphere and organosilane gases. Surface characterization of plasma treated and gas adsorbed surfaces was carried out by X-ray photoelectron spectroscopy (XPS) using Mg K α X-ray source. Joining was carried out by a roll laminator after contact of both surfaces at room temperature, followed by annealing at 130 °C for 10 min. Adhesion strength was evaluated by 180 degree peel test based on ASTM D-903 and durability was examined under the conditions of 60 °C and 95% RH. It was found that after plasma treatment, complex functional groups such as C H, C O, C O, O C O and CO 3 were found on COP and O H on glass. Thickness of GPS gas adsorption layer on COP was evaluated by the XPS to be at least 1.1 nm by taking inelastic mean free path of Si 2p photoelectron into consideration. Joining force was found to be more than 5 N/25 mm corresponding to almost equal to COP bulk tensile strength. In addition, durability of this adhesion strength remained unchanged over 2000 h even after exposure to the durability test conditions of 60 °C and 95% RH. The results can be explained in terms of formation of H H hydrogen bonding and Si O covalent bonding via silanols will be made at the interface as a result of lamination and annealing processes. In conclusion, ultrathin joining method by gas adsorption was established by the formation of hydrogen and covalent bonds at the interface by low temperature reaction process.

Laminated paper-based analytical devices (LPAD): fabrication, characterization, and assays

Paper-based microfluidic devices have recently garnered an increasing interest in the literature. The majority of these devices were produced by patterning hydrophobic zones in hydrophilic paper via photoresist or wax. Others were created by cutting paper using a laser. Here, we present a fabrication method for producing devices by simple craft-cutting and lamination, in a way similar to making an identification (ID) card. The method employs a digital craft cutter and roll laminator to produce laminated paper-based analytical devices (LPAD). Lamination with a plastic backing provides the mechanical strength for a paper device. The approach of using a craft cutter and laminator makes it possible to rapid-prototype LPAD with no more difficulty than producing a typical ID card, at very low cost. Devices constructed using this method have been exploited for simultaneous detection of bovine serum albumin (BSA) and glucose in synthetic urine with colorimetric assays. Both BSA and glucose are detectable at clinically relevant concentrations, with the detection limit at 2.5 μM for BSA and 0.5 mM for glucose.

Highly flexible polymer light-emitting devices using carbon nanotubes as both anodes and cathodes

Polymer light-emitting devices based on the in situ formation of a p-i-n junction in a polymer blend have been fabricated by roll lamination. Single-walled carbon nanotubes are used as both the anode and cathode for a fabrication process that does not employ vacuum. The metal-free, thin-film devices exhibit a low turn-on voltage, modestly high efficiency, and brightness. The devices are fairly transparent and exhibit high mechanical flexibility. No failure was observed after repeated bending to a 2.5 mm radius and unbending for 50 cycles. Tandem light-emitting devices were prepared, by stacking a blue device on top of a yellow device, for the convenient generation of various mixed colors.

Fully bendable polymer light emitting devices with carbon nanotubes as cathode and anode

Polymer light emitting devices were fabricated by roll lamination using single-walled carbon nanotubes as both anode and cathode. The devices exhibited a low turn-on voltage of 3.8 V, high brightness of 1400 cd/m2 at 10 V and maximum efficiency of 2.2 cd/A at 480 cd/m2. The devices are also highly transparent and exhibited very high flexibility. No failure was observed after bending the devices down to 2.5 mm radius.

Fabrication of a Flexible and Disposable Microreactor Using a Dry Film Photoresist

In this paper, we demonstrate that a low-cost flexible microreactor can be manufactured using a dry film photoresist in conjunction with photolithographic and hot roll lamination techniques. A microfluidic flow path and sample reservoir patterns were prefabricated in a dry film photoresist tape using traditional photolithographic methods. This tape was sandwiched between two plastic films - wells were prepouched on the cover film — that were bonded upon passage through a hot roll laminator. A simple Plexiglas reactor holder was designed and constructed to use in evaluating the flexible microchip reactor. We demonstrate a chemical synthesis of polyaniline that was performed with this polymeric microreactor using a hydrodynamic flow control system. The fabrication of this microreactor suggests that there is great potential for designing and prototyping disposable microscale reaction systems using dry film photoresist for a range of chemical and biochemical syntheses.

High performance organic light-emitting diodes fabricated via a vacuum-free lamination process

We demonstrate high performance organic light-emitting diodes (OLEDs) fabricated via a vacuum-free, direct lamination process. The OLEDs were made by laminating an anode component to a separately engineered cathode component using a roll laminator. We further present a solution-based chemical n-doping strategy to enable efficient electron injection from an inert cathode into polymeric organic semiconductors. The n-doping strategy is demonstrated by chemically reducing a conjugated light-emitting polymer with an alkali metal in an organic solvent. The metal reduced conjugated polymer, when employed as an electron injection layer, yields laminated OLEDs with efficiency comparable to conventionally fabricated devices utilizing a vacuum-deposited, reactive metal cathode. These designs and techniques should enable applications such as lighting where extremely low cost device fabrication is required.

Fabrication of microfluidic devices using dry film photoresist for microchip capillary electrophoresis

An inexpensive, disposable microfluidic device was fabricated from a dry film photoresist using a combination of photolithographic and hot roll lamination techniques. A microfluidic flow pattern was prefabricated in a dry film photoresist tape using traditional photolithographic methods. This tape became bonded to a poly(methyl methacrylate) (PMMA) sheet with prepouched holes when passed through a hot roll laminator. A copper working electrode and platinum decoupler was readily incorporated within this microchip. The integrated microchip device was then fixed in a laboratory-built Plexiglas holder prior to its use in microchip capillary electrophoresis. The performance of this device with amperometric detection for the separation of dopamine and catechol was examined. The separation was complete within 50 s at an applied potential of 200 V/cm. The relative standard deviations (RSD) of analyte migration times were less than 0.71%, and the theoretical plate numbers for dopamine and catechol were 3.2 × 10 4 and 4.1 × 10 4, respectively, based on a 65 mm separation channel.

PET-laminated thin-film capillary electrophoresis chips by sandwiching method

In this article, the sandwiching method, a novel, simple, and cost-effective capillary electrophoresis (CE) chip fabrication approach, is proposed. In this new approach, polymer PET-laminated film rather than the commonly used silicon wafer is chosen to be the material of the chip; a micro CNC machining center is adopted to cut the microchannels; and a temperature-controlled roll laminator is used to bond the microchannels in between two sealing PET films. Separation experiments using red Rhodamine B and blue Xylene Cyanole illustrate that the separation efficiency of the sandwiching CE chip is comparable to the semiconductor-based chip and the conventional capillary. However, the sandwiching method requires much less complicated fabrication processes and is more cost-effective.