Reset Pulse Research Articles

Investigating Phase Transform Behavior in Indium Selenide Based RAM and Its Validation as a Memory Element

Phase transform properties of Indium Selenide (In2Se3) based Random Access Memory (RAM) have been explored in this paper. Phase change random access memory (PCRAM) is an attractive solid-state nonvolatile memory that possesses potential to meet various current technology demands of memory design. Already reported PCRAM models are mainly based upon Germanium-Antimony-Tellurium (Ge2Sb2Te5 or GST) materials as their prime constituents. However, PCRAM using GST material lacks some important memory attributes required for memory elements such as larger resistance margin between the highly resistive amorphous and highly conductive crystalline states in phase change materials. This paper investigates various electrical and compositional properties of the Indium Selenide (In2Se3) material and also draws comparison with its counterpart mainly focusing on phase transform properties. To achieve this goal, a SPICE model of In2Se3 based PCRAM model has been reported in this work. The reported model has been also validated to act as a memory cell by associating it with a read/write circuit proposed in this work. Simulation results demonstrate impressive retentivity and low power consumption by requiring a set pulse of 208 μA for a duration of 100 μs to set the PCRAM in crystalline state. Similarly, a reset pulse of 11.7 μA for a duration of 20 ns can set the PCRAM in amorphous state. Modeling of In2Se3 based PCRAM has been done in Verilog-A and simulation results have been extensively verified using SPICE simulator.

Rapid UV-A photo detection using a BTBT organic thin-film transistor enhanced by a 1,5-dichloro-9,10-dintiro-anthracene acceptor

A UV-A sensitive phototransistor was demonstrated using an organic semiconductor 2,7-dipentyl[1]benzothieno[3,2- b ][1] benzothiophene (C5-BTBT) and a strong electron acceptor 1,5-dichloro-9,10-dintiro-anthracene (2Cl-2NO2-Anth) which is not photo-isomerizable. At 0 gate bias the photoresponsivity of the device begins to saturate at an incident power Pinc = 1 mW/cm2, where a photocurrent-to-dark current ratio (P) of P > 105 is observed with a photoresponsivity of 9 A/W. The photoresponsivity was increased with the decrease of Pinc, reaching 40 A/W at a Pinc = 0.0427 mW/cm2. A persistent photocurrent with a P > 105 was observed for more than 2 h, demonstrating the potential use for rewritable photo memory. By applying a gate voltage program consisting of a reset pulse of −90 V every 2nd data point, the device can perform as a UV sensor or switch at the timescale of 600 ms.

Simulations of an all-optical flip-flop with a reset pulse frequency exceeding operating frequency

An all-optical flip-flop based on a nonlinear multi-section DFB semiconductor laser structure is proposed. Holding beam is not required for device's operation. A section of the DFB structure is detuned to prevent lasing in the “OFF” state, and it is accompanied with a negative nonlinear coefficient that is due to partial absorption of photons at Urbach tail. At a high light intensity in the structure the nonlinear coefficient reduces the detuning, and the device is in lasing state; “ON” state. The device is reset by an optical pulse at a shorter wavelength through cross gain modulation. The reset pulse is absorbed in a middle section in the device before reaching the detuned nonlinear section. The switching times between the states are in nanoseconds time scale.

Introduction of WO3 Layer in a Cu-Based Al2O3 Conductive Bridge RAM System for Robust Cycling and Large Memory Window

In this paper, we optimize a WO3\Al2O3 bilayer serving as the electrolyte of a conductive bridge RAM device using a Cu-based supply layer. By introducing a WO3 layer formed by thermal oxidation of a W plug, the hourglass shape of the conductive filament is desirably controlled, enabling excellent switching behavior. We demonstrate a clear improvement of the microstructure and density of the WO3 layer by increasing the oxidation time and temperature, resulting in a strong increase of the high-resistance-state breakdown voltage. The high quality WO3 microstructure allows thus the use of a larger reset pulse amplitude resulting both in larger memory window and failure-free write cycling.

Carbon nanotube memory cell array program error analysis and tradeoff between reset voltage and verify pulses

In emerging non-volatile memories, nano-random access memory (NRAM) has advantages of small program current and high endurance compared with resistive RAM (ReRAM) and phase-change RAM (PRAM). This work comprehensively investigates NRAM set and reset program characteristics by measuring a 116 nm 4 Mbit NRAM cell array. Specifically, reset is found more dependent on reset voltage than reset current. Next, NRAM set and reset bit error rates (BERs) have less significant reduction compared with the increased ratio of set and reset pulse widths. The reset BER can also be reduced by applying multiple reset pulses. Moreover, 108 write cycles are measured on 256 bytes NRAM cells, no wear-out or broken cell is found. Finally, the program characteristics of two verify-reset schemes are compared. The maximum verify-reset voltage can be reduced by increasing the number of reset pulses.

Simulations of a Novel All-Optical Flip-Flop Based on a Nonlinear DFB Laser Cavity Using GPGPU Computing

A new all-optical flip-flop based on a nonlinear Distributed feedback (DFB) structure is proposed. The device does not require a holding beam. A nonlinear part of the grating is detuned from the remaining part of the grating and has negative nonlinear coefficient. Optical gain is provided by an injected electrical current into an active layer. In the OFF state, due to the detuned section, no laser light is generated in the device. An injected optical pulse reduces the detuning of the nonlinear section, and the optical feedback provided by the DFB structure generates a laser light in the structure that sustains the change in the detuned section. The device is switched “OFF” by detuning another section of the grating by a Reset pulse. The Reset pulse reduces the refractive index of that section by the generation of electron-hole pairs. The Reset pulse wavelength is adjusted such that the optical gain provided by the active layer at that wavelength is zero. The Reset pulse is prevented from reaching the nonlinear detuned section by introducing an optical absorber in the laser cavity to attenuate the pulse. The device is simulated in time domain using General Purpose Graphics Processing Unit (GPGPU) computing. Set-Reset operations are in nanosecond time scale.

Reduction of Reset Current in Phase Change Memory by Pre-Programming

Since RESET current has been a significant obstacle to achieving high density and low power consumption for phase change memory (PCM), a pre-programming method is proposed to reduce the RESET current based on the control of active area size. The pre-programming method is made of a high current RESET pulse and a DC SET pulse. The test results gathered across a 1 Kbits block of a 64 M bits PCM test chip in 40 nm CMOS process show that a maximum RESET current reduction of 0.3 mA is achieved by the proposed method. The increase of active area size of face centered cubic (FCC) phase GST is taken as the major reason for the reduction of RESET current, which is confirmed by transmission electron microscope (TEM) and a two-dimensional finite analysis.

Adding a self-reset feature to the Bulk-BICS with dynamic storage cell

This work presents a study of the effects of the leakage currents in the control transistors of a dynamic storage cell intended to be used with Bulk-BICS circuits. A means to introduce a controlled discharge current to the storage element is presented, making the dynamic storage cell stable in the reset-state at rest. This self-reset feature allows eliminating the recurrent reset pulse necessary in the previous version for stabilization of the memory cell. A reduction in the current consumption when the circuit is idle is also achieved with this technique.

Investigation and Improvement of Verify-Program in Carbon Nanotube-Based Nonvolatile Memory

Carbon nanotube (CNT)-based random access memory (NRAM) cells are measured to investigate cell program at different set current compliances and temperatures. Then, a physical model is proposed to explain the mechanism of cell resistance switching. Specifically, the changes in the NRAM cell tunneling current and resistance can be attributed to the variation of the distance between CNTs. An attraction force ( $F_{\mathrm {attraction}})$ , generated by electrical induction, reduces the distance, whereas a repulsion force ( $F_{\mathrm {repulsion}})$ , generated by phonon-induced temperature, increases the distance. It is proposed that the dominance of these two forces is reversed during set and reset programs, possibly due to the reduction of $F_{\mathrm {repulsion}}$ in set program. Finally, two verify-reset schemes are proposed to improve the NRAM cell verify-program performance. The first proposal, multiple-pulse reset demonstrates 23% program time reduction by skipping a cell resistance read between two successive reset pulses. The second proposal, gate-pulse reset is calculated to decrease more than 40% program energy by reducing bitline charge energy in array program.

Tri-state bipolar resistive switching behavior in a hydrothermally prepared epitaxial BiFeO3 film

A crystalline BiFeO3 (BFO) heteroepitaxial film was produced by mild hydrothermal epitaxy on a Nb–SrTiO3(100) (NSTO) substrate. The resulting coated substrate was used to fabricate a Pt/BFO/NSTO heterostructure device. The device exhibits reversible bipolar resistive switching behavior. The resistance states can be reversibly switched among multiple levels, by changing the magnitude of the reset pulse voltage. This illustrates the devices potential in multilevel nonvolatile memory devices. The resistive switching behavior of the device is attributed to trap-controlled space-charge-limited current conduction, which is controlled by oxygen vacancies in the film. The modulation of the Pt/BFO Schottky-like junction depletion under an applied electric field is thought to be responsible for the resistance switching behavior of the device, in the carrier injection-trapped/detrapped process.

All-optical 2-bit header recognition and packet switching using polarization bistable VCSELs.

We propose and evaluate an all-optical 2-bit header recognition and packet switching method using two 1.55-µm polarization bistable vertical-cavity surface-emitting lasers (VCSELs) and three optical switches. Polarization bistable VCSELs acted as flip-flop devices by using AND-gate operations of the header and set pulses, together with the reset pulses. Optical packets including 40-Gb/s non-return-to-zero pseudo-random bit-sequence payloads were successfully sent to one of four ports according to the state of two bits in the headers with a 4-bit 500-Mb/s return-to-zero format. The input pulse powers were 17.2 to 31.8 dB lower than the VCSEL output power. We also examined an extension of this method to multi-bit header recognition and packet switching.

Direct parasagittal magnetic resonance imaging of the internal auditory canal to determine cochlear or auditory brainstem implant candidacy in children.

Laryngoscope, 125:2382–2385, 2015

Charge collection microscopy of in-situ switchable PRAM line cells in a scanning electron microscope: technique development and unique observations.

An imaging method has been developed based on charge collection in a scanning electron microscope (SEM) that allows discrimination between the amorphous and crystalline states of Phase-change Random Access Memory (PRAM) line cells. During imaging, the cells are electrically connected and can be switched between the states and the resistance can be measured. This allows for electrical characterization of the line cells in-situ in the SEM. Details on sample and measurement system requirements are provided which turned out to be crucial for the successful development of this method. Results show that the amorphous or crystalline state of the line cells can be readily discerned, but the spatial resolution is relatively poor. Nevertheless, it is still possible to estimate the length of the amorphous mark, and also for the first time, we could directly observe the shift of the amorphous mark from one side of the line cell to the other side when the polarity of the applied (50 ns) RESET pulse was reversed.

Endurance degradation mechanisms in TiN\Ta2O5\Ta resistive random-access memory cells

Impact of set/reset pulse duration and amplitude on the endurance failure modes of TiN\Ta2O5\Ta cells is investigated and is related to interaction between Oxygen and TiN bottom electrode during reset. Hourglass electrical switching simulation of conductive filament temperature during reset transient and ab-initio calculation of reaction energy further support this degradation mechanism. Based on this understanding, endurance improvement is achieved by using shorter reset pulse and/or using inert Ru bottom electrode.

Reset charge sensitive amplifier for NaI(Tl) gamma-ray spectrometer

The time constant of the output signal of the front-end readout circuit of a traditional gamma-ray spectrometer with a NaI(Tl)+PMT structure is affected by temperature, measurement environment and the signal transmission cable, so it is difficult to get a good resolution spectrum, especially at higher counting rates. In this paper, a reset charge sensitive amplifier (RCSA) is designed for the gamma-ray spectrometer with a NaI(Tl)+PMT structure. The designed RCSA outputs a step signal, thus enabling the acquisition of double-exponential signals with a stable time constant by using the next stage of a CR differentiating circuit. The designed RCSA is mainly composed of a basic amplifying circuit, a reset circuit and a dark current compensation circuit. It provides the output step signal through the integration of the PMT output charge signal. When the amplitude of the step signal exceeds a preset voltage threshold, it triggers the reset circuit to generate a reset pulse (about 5µs pulse width) to reset the output signal. Experimental results demonstrated that the designed RCSA achieves a charge sensitivity of 4.26×1010V/C, with a zero capacitance noise of 51.09fC and a noise slope of 1.98fC/pF. Supported by the digital shaping algorithm of the digital multi-channel analyzer (DMCA), it can maintain good energy resolution with high counting rates up to 150kcps and with a temperature range from −19°C to 50°C.

Effect of AC pulse overshoot on nonlinearity and reliability of selectorless resistive random access memory in AC pulse operation

The effect of AC pulse engineering on the nonlinearity and reliability of selectorless resistive random access memory was investigated in order to implement a high-density cross-point array. Applying an AC pulse bias can induce current overshoot during resistive switching, owing to the parasitic capacitance and resistance of the measuring equipment. We observed that the nonlinearity of the selectorless resistive random access memory was dependent on the current overshoot of the set pulse, whereas the programming/erasing endurance was determined by the current overshoot of the reset pulse. The current overshoot is very sensitive to AC pulse conditions, and it degrades device performance and reliability. Therefore, the AC pulse shape was engineered to eliminate current overshoot resulting from parasitic factors and to achieve reliable nonlinearity and endurance of the selectorless resistive random access memory.

50 nm AlxOy ReRAM program 31% energy, 1.6× endurance, and 3.6× speed improvement by advanced cell condition adaptive verify-reset

Two verify-reset schemes are proposed to improve the program energy, endurance and speed of 50nm AlxOy ReRAM cells. Both of the proposed schemes improve the verify-reset program by adapting the program voltage and pulse width to the variation of ReRAM cell filament status during the verify-reset. In this paper, first, the reset resistance and cell endurance are compared using different reset voltages and reset pulse widths. Then, two proposed verify-reset schemes are introduced independently. The first proposed scheme controlled reset voltage (Vreset) increment demonstrates 32% program energy reduction and 6.7× program speed increase. In this scheme, the reset voltage stress is increased from −1.5V to −1.65V, only when the reset-tries fail continuously during verify-reset (hard-to-reset). The second proposed scheme set-before-reset applies the set pulse during verify-reset, to convert the filament from a hard-to-reset state to an easy-to-reset state. With this approach, 31% program energy reduction, 1.6× program endurance and 3.6× program speed increase can be obtained simultaneously.

Compact Power-on Reset Circuit Using a Switched Capacitor

We propose a compact power-on reset circuit consisting of a switched capacitor, a capacitor, and a Schmitt trigger inverter. A switched capacitor working with a clock signal charges the capacitor. Thus, the voltage across the capacitor is increased toward the supply voltage. The circuit provides a reset pulse until the voltage across the capacitor reaches the high threshold voltage of the Schmitt trigger inverter. The proposed circuit is simple, compact, has no static power consumption, and works for a wide range of power-on rising times. Furthermore, the clock signal is available while the reset pulse is activated. The proposed circuit works for up to 6 s of power-on rising time, and occupies a 60 × 30 μm² active area.

Electric-Field-Induced Ultralow Power Switching in Superlattice Phase Change Materials

Phase Change Memory is one of the most promising candidates for next generation non-volatile memories. PCM, however, has some drawbacks, one of which is the high consumed power in recording a data bit. To solve this problem, a superlattice phase change material GeTe/Sb2Te3 (GeTeSL) has been proposed, which reduces the consumed power to about 10% of the conventional PCM material Ge2Sb2Te5 (GST225) [1]. This paper reviews the studies on the materials to further reduce the power and the switching mechanism of the SL materials, and the circumvention for ultralow consumed power using the above-mentioned mechanism. The test device was fabricated on the Si substrate with W plug of 150 nm in diameter surrounded by SiO2. The film structure of the SL device was as follows if not mentioned; TiN(1 nm)/Sb2Te3(10 nm)/[GeTe(1 nm)/Sb2Te3 (4 nm)]8/W(50 nm). The part in the parenthesis is the SL region where the number of the SL cycles was 8. The film was deposited by sputtering with the substrate heated to 250°C. The bottom TiN controls the heterogeneous nucleation probability of Sb2Te3 to obtain the smooth surface for well-aligning the SL structure [2]. The bottom Sb2Te3 is to define the crystal orientation of the SL region. With this method, the well-aligned SL structure was obtained where Sb2Te3(001) and GeTe(111) were highly oriented [3]. To reduce the consumed power, two kinds of SL materials were investigated; Ge x Te100-x /Sb2Te3 and SnxTe100-x /Sb2T3 (SnTeSL). The measurement results on the relationship between x and the consumed power show that the consumed power is reduced as x decreases for both GeTeSL and SnTeSL, and that the consumed power is about 1/1000 of GST225 at Sn10Te90/Sb2Te3 [4]. Figure 1 shows the relationship between x and the RESET voltage or the dynamic resistance, which indicates that the reduction of Irst is the main cause of the extreme power reduction. This result can be explained by the hypothesis that the SL material is switched not by thermal energy but by the electric field. This hypothesis is supported by the electric and optical experiments [5]. The relationship between the RESET pulse width and the Vrst or Irst shows that the Vrst ∙ Irst is almost constant in GST225 whereas Irst decreases at short pulses and Vrst stays constant in GeTeSL and SnTeSL. The optical experimental results using a femtosecond laser and a z-polarizer indicate that the in-plane electric field contributes to the power reduction in GeTeSL. The first principle calculation using the density functional theory and Berry phase confirms that the in-plane electric field causes the motion of Ge or Sn in SL materials even though the temperature was kept 300K. Figure 2 shows the measurement results of the devices with the various SL cycles in SnTeSL. Vrst decreases almost linearly as the number of cycles decreases whereas the RESET power is reduced exponentially due to drastic reduction of Irst . The RESET power was about 1/10000 of GST225 at a single SL. This result comes from the electric-field-induced mechanism where the read resistance can be switched with the dynamic current sufficiently suppressed. This dynamic current suppression is one of the key issues in reduction of the consumed power in PCM, which is achieved uniquely by the well-aligned SL materials. Acknowledgement This research is granted by JSPS through FIRST Program initiated by CSTP.

Bit Error Rate Measurements of All-Optical Flip-Flop Operations of a 1.55-μm Polarization Bistable VCSEL

We measured the bit error rate (BER) of all-optical flip-flop operations using a 1.55-μm polarization bistable vertical-cavity surface-emitting laser (VCSEL). Polarization bistable flip-flop operations were obtained by injecting optical set and reset pulses with independently adjusted wavelengths toward the two VCSEL lasing modes, whose polarizations are orthogonal to each other. Acquired waveforms showed clearly opened eyes, and BERs less than 1 × 10−9 were measured up to 1 Gb/s although the optical set and reset pulse power was much lower than the VCSEL output power. We also demonstrated all-optical flip-flop operations by injecting optical set and reset pulses with the same wavelength, which were generated by a single laser diode. In this case, we obtained polarization bistable flip-flop operations up to 500 Mb/s with almost the same BER values that were obtained when the wavelengths of the set and reset pulses were adjusted independently. The optical input pulse powers were higher than for the case using input pulses with two different wavelengths, but still lower than the VCSEL output power.