Reliability Of Electronic Packages Research Articles

Effect of B2O3 and Basic Oxides on Network Structure and Chemical Stability of Borosilicate Glass

Glass properties play crucial roles in ensuring the safety and reliability of electronic packaging. However, challenges, such as thermal expansion and resistance to acid corrosion, pose long-term service difficulties. This study investigated the impact of the microstructure on acid resistance by adjusting the glass composition. A glass material with excellent acid resistance was obtained by achieving a similar coefficient of thermal expansion to tantalum; it exhibited a weight loss rate of less than 0.03% when submerged in 38% sulfuric acid at 85 °C for 200 h. Theoretically, this glass can be used to seal wet Ta electrolytic capacitors. Differential scanning calorimetry (DSC) was used to analyze the glass transition temperature and thermal stability of borosilicate glasses. X-ray diffractometry (XRD), scanning electron microscopy (SEM), and Raman spectroscopy were used to study the microstructure of the amorphous phase of the borosilicate glass, which revealed a close relationship between the degree of network phase separation in the borosilicate glass and the degree of polymerization (isomorphic polyhedron value, IP) of the glass matrix. The IP value decreased from 3.82 to 1.98 with an increasing degree of phase separation. Boron transitions from [BO4] to [BO3] within the glass network structure with increasing boron oxide content, which diminishes the availability of free oxygen provided by alkaline oxide, resulting in a lower acid resistance. Notably, the glass exhibited optimal acid resistance at boron trioxide and mixed alkaline oxide contents of 15% and 6%, respectively. Raman experiments revealed how the distributions of various bridging oxygen atoms (Qn) affect the structural phase separation of the glass network. Additionally, Raman spectroscopy revealed the depolymerization of Q4 into Q3, thereby promoting high-temperature phase separation and highlighting the unique advantages of Raman spectroscopy for phase recognition.

Online Condition Monitoring Methodology for Power Electronics Package Reliability Assessment

Online Condition Monitoring Methodology for Power Electronics Package Reliability Assessment

Experimental and numerical study of solder bumps impact on the underfill fluid flow under electrohydrodynamic effect

Solder bumps can increase filling time, which is one of the main challenges in electronic packaging reliability. Here, we compare the capillary flow behavior between parallel plates with and without solder bumps to examine how solder bumps affect the length of the underfill fluid flow under the effects of an electric potential. We found that the solder bumps restrained the flow length, while the electric field enhanced it. By enhancing the voltage from 0 to 1000 V, in the case without solder bumps, the flow length increased by up to 30%, and it increased by up to 25% in the case of solder bumps. To determine the optimum bump design, we selected the diameter and pitch size of the solder bumps as the independent variables. The results revealed that larger pitch sizes and smaller diameters show longer fluid flow lengths. The effect of the electric field on varying nozzle positions was also investigated. We found that the fluid flow length increased when the nozzle was between the solder bumps compared to the top of the solder bumps. According to our observations, the nozzle position is also the main factor in determining the fluid flow length compared with the bump diameter and pitch sizes for the design of the underfill packaging process. Numerical simulations were also performed to compare the experimental results, and the average discrepancy between the experimental and numerical results at various time steps for different solder bump parameters was between 5 to 10%. Our findings demonstrate the potential of using electric potential in conjunction with solder bumps to control underfill flow, which can benefit flip-chip packaging applications. Numerical methods can accurately predict underfill fluid flow with solder bumps under the electric field effect.

Grain modification and formation of tough IMC phase in submicron Sn–Ag microbumps via doping Zn and Ni in Cu substrate

For the advanced 2.5D/3D IC applications, the IMCs suppression and phase stability should be emphasized. With a reduced bonding height of microbumps, the IMCs would occupy a high volume fraction of the joints during the reflow process or operation. A high volume fraction of IMCs and excessive phase transition could induce internal stress and voids, which might be adverse to reliability of interconnection. The novel Cu–26Zn–18Ni/Sn-3.5Ag/Cu–26Zn–18Ni (by weight) microbumps have been fabricated and the considerable inhibition on the IMCs and void formation was investigated. Four kinds of IMC were found in Cu–26Zn–18Ni/Sn-3.5Ag/Cu–26Zn–18Ni microbumps.: (Cu,Ni)6(Sn,Zn)5, (Cu,Ag)5(Sn,Zn)8, Ag3Sn and (Cu,Ni)Zn. The tough bulk (Cu,Ag)5(Sn,Zn)8 combined with solid solution strengthened and refined (Cu,Ni)6(Sn,Zn)5 grains as well as the void-free microstructure were expected to enhance the reliability of microbumps. The effect of Ag on the formation of tough (Cu,Ag)5(Sn,Zn)8 was also addressed. These findings provided insights into the design of substrate alloy in advanced electronic packaging reliability.

Optimized super-resolution promote accuracy for projection speckle three-dimensional digital image correlation

The camera resolution and electronic noise limit the accuracy of the projection speckle three-dimensional digital image correlation (3D-DIC) which is a non-invasive method to detect the reliability of electronic packaging structure. In this study, a measurement method of super-resolution (SR) reconstruction coupled with projection speckle DIC is proposed. The algorithm based on the maximum a posteriori model for DIC measurement systems was also optimized, and a speckle-specific bimodal prior was proposed to adapt to speckle images. By using optimized SR technology as an image pre-processing technique to enhance the resolution of captured images, the accuracy of measurements is improved. Full-field displacement measurement experiments show that, with suitable magnification and speckle size, the use of SR technology reduces the range of displacement errors from 8 μm to 2 μm. Experiments on step block topography measurements show that the use of SR technology reduces the error between DIC measurements and Moiré interferometry from 5 μm to within 2 μm. Therefore, SR technology can be effectively paired with projection speckle DIC measurements to adapt to various measurement scenarios in the field of electronic packaging reliability testing.

Design Optimization by Virtual Prototyping Using Numerical Simulation to Ensure Thermomechanical Reliability in the Assembly and Interconnection of Electronic Assemblies

Abstract A methodology is presented that allows the evaluation of the thermomechanical reliability of electronic packages using “virtual prototyping.” Here, a virtual flip chip ball grid array (FC-BGA) is examined in comparison to a reference chip scale package (CSP). The comparison is performed using finite element simulation. A combined measurement-simulation technique is used to calibrate the finite element simulations on a reference object. The adjustment is based on the in-plane deformation field obtained by both simulation and optical measurement. For the latter, an optical sensor is used for in-plane deformation and strain field analysis based on the gray-scale correlation method. The findings obtained can be extrapolated to alternative package types with different but similar design to evaluate their suitability for the desired application before physical fabrication.

Multi-Physics Fields Simulations and Optimization of Solder Joints in Advanced Electronic Packaging

The endurability of solder joints in the ball-grid array (BGA) packaging is crucial to the functioning of the microelectronic system. To improve electronic packaging reliability, this paper is dedicated to numerically optimize solder joint array configuration and study the influence of multi-physical fields on solder joint reliability. The uniqueness of this study is that on the basis of temperature field and stress field, the electric field is added to realize the coupling simulation of three physical fields. In addition, the “Open Angle” is mathematically defined to describe the array configuration, and it was used to reveal the influence factors of solder joint fatigue, including stress, temperature, and current density. In the single solder joint model, the impacts of geometric shape and working conditions on the maximum value and distribution of these evaluation factors (stress, temperature, and current density) were investigated. Overall, the numerical investigation gives the optimal configuration, geometric shape, and working condition of solder joints, which benefits the design of endurable and efficient BGA packaging.

Reliability of Wide Band Gap Power Electronic Semiconductor and Packaging: A Review

Wide band gap (WBG) power electronic devices, such as silicon carbide metal–oxide–semiconductor field-effect transistors (SiC MOSFETs) and gallium–nitride high-electron-mobility transistors (GaN HEMTs) have been widely used in various fields and occupied a certain share of the market with rapid momentum, owing to their excellent electrical, mechanical, and thermal properties. The reliability of WBG power electronic devices is inseparable from the reliability of power electronic systems and is a significant concern for the industry and for academia. This review attempts to summarize the recent progress in the failure mechanisms of WBG power electronic semiconductor chips, the reliability of WBG power electronic packaging, and the reliability models for predicting the remaining life of WBG devices. Firstly, the typical structures and dominant failure mechanisms of SiC MOSFETs and GaN HEMTs are discussed. This is followed by a description of power electronic packaging failure mechanisms and available packaging materials for WBG power electronic devices. In addition, the reliability models based on physics-of-failure (including time-dependent dielectric breakdown models, stress–strain models, and thermal cycling models), and data-driven models are introduced. This review may provide useful references for the reliability research of WBG power devices.

Viscoelastic Influence on the Board Level Assessment of Wafer Level Packages Under Drop Impact and Under Thermal Cycling

Abstract Structural components such as printed circuit boards (PCBs) are critical in the thermomechanical reliability assessment of electronic packages. Previous studies have shown that geometric parameters such as thickness and mechanical properties like elastic modulus of PCBs have a direct influence on the reliability of electronic packages. Elastic material properties of PCBs are commonly characterized using equipment such as tensile testers and used in computational studies. However, in certain applications viscoelastic material properties are important. Viscoelastic influence on materials is evident when one exceeds the glass transition temperature of materials. Operating conditions or manufacturing conditions such as lamination and soldering may expose components to temperatures that exceed the glass transition temperatures. Knowing the viscoelastic behavior of the different components of electronic packages is important in order to perform accurate reliability assessment and design components such as PCBs that will remain dimensionally stable after the manufacturing process. Previous researchers have used creep and stress relaxation test data to obtain the Prony series terms that represent the viscoelastic behavior and perform analysis. Others have used dynamic mechanical analysis in order to obtain frequency-domain master curves that were converted to time domain before obtaining the Prony series terms. In this paper, nonlinear solvers were used on frequency domain master curve results from dynamic mechanical analysis to obtain Prony series terms and perform finite element analysis on the impact of adding viscoelastic properties when performing reliability assessment. The computational study results were used to perform a comparative assessment to understand the impact of including viscoelastic behavior in reliability analysis under thermal cycling and drop testing for Wafer Level Chip Scale Packages.

Shock and impact reliability of electronic assemblies with perimeter vs full array layouts: A numerical comparative study

Abstract This study aims to assess the effect of the solder joint array layouts, including full and peripheral designs, on the mechanical response and reliability of electronic packages subjected to shock and impact loadings. Linear and nonlinear finite element simulations using the global-local modeling technique are employed to perform the analysis. Several peripheral array configurations are considered and compared to the full array systems. The results showed that, for optimum electronic package designs in terms of reliability and cost, it is highly recommended to use peripheral packages having three or four rows of solder interconnects in electronic systems under shock and impact loadings.

Growth Behavior of Ni-Sn Intermetallic Compounds in Microbumps During Long-Term Aging Process

With downward scaling of bump size in advanced electronic packaging, it is urgent to understand Sn/Ni interfacial reaction in a limited volume. In this paper, the growth behaviors of Ni-Sn intermetallic compounds (IMCs) in Cu/Ni/Sn-Ag microbumps aged at 150 ℃ for 2000 h were investigated. The diffusion of Sn atoms across Ni3Sn4 layer caused constant nucleation of Ni3Sn4 grains near the Ni barrier. The thickening of Ni3Sn4 layer was contributed by grain nucleation and coarsening, leading to a vertical difference of grain size inside the Ni3Sn4 layer. Another kind of IMC, Ni3Sn2, was formed at the Ni/Ni3Sn4 interface. A growth model of Ni-Sn IMCs comprising diffusion, nucleation, grain coarsening and phase transformation was proposed based on experimental results. These findings provided insights into advanced electronic packaging reliability.

Harmonic Response Analysis for Ball Grid Array Package Using Computer Finite Element Simulation

BGA package is selected as the research object in this paper. Workbench (finite elemental analysis tool in ANSYS) is used for harmonic response analysis. The author lays several paper sheets on the sample and builds the finite element model of clamp, ceramic and metal plate. Then, the model analysis is carried out. Based on this, it is converted to harmonic response analysis. According to the results, the author has found that there is no relation between the number of paper sheets and acceleration-frequency result. It promotes the development of electronic packaging reliability.

Parametric study of thermally induced warpage of FpBGA package using finite element methods

Warpage is considered to be the major concern in ensuring the reliability and manufacturability of electronic package because a flat package is crucial for a successful formation of board level assembly process. Warpage is the out of plane displacement which is a resultant of difference in co-efficient of thermal expansion (CTE) between the adjoining packaging materials. Enormous warpage may lead to occurrence of faulty joints such as open connections, mis-shaped joints, and loss of package board-level reliability under manufacturing, thermal loading process, shock and vibration. In this paper, a Fine pitch ball grid array Package (FpBGA) which is a prominent type of electronic package offering solution for downsizing of electronic components such as mobiles and camcorders has been choose for study. Warpage of FpBGA was simulated from post cure temperature to reflow temperature using Finite Element Methods. A static thermal analysis was carried out using ABAQUS software and a parametric study was done to investigate the effect of material properties and geometric properties in minimizing the warpage. Materials properties such as CTE, Elastic modulus of substrate and die, geometric properties like thickness of die and substrate were chosen for study.

Electromigration behavior of silver thin film fabricated by electron-beam physical vapor deposition

Electromigration (EM) is considered as a serious issue that threatens the reliability of electronic packaging. For the long-term reliability of the application of pure silver thin films, it is important to investigate its EM effect; however, there are limited studies focused on this aspect. In this study, the EM of a silver thin film deposited on a glass substrate was examined at a current density of 8.89 × 105 A/cm2 and room temperature of 15 °C. During the EM test, the new phenomenon of the thin-thread silver structures with a unique direction was noted. To explain this, finite element analysis was applied to simulate the temperature and direction of the current flow. The effect of thermal and stress migration could be ignored in this experiment based on the temperature distribution results. The electron wind force played an important role in the formation of the thin-thread silver with nucleation structure following the direction and strength of the electron flow. By analyzing the failure location, melting was observed near the cathode since the generation of the thin-thread silver decreased the contact area for passing current. Finally, reducing the grain boundaries was proposed as an approach to improve the reliability of the pure silver sample, which is paramount for manufactures.

Growth behavior of tin whisker and hillock on Cu/Ni/SnAg micro-bumps under high temperature and humidity storage

It is the first time that tin whisker was observed to grow from shallow surface grains on Cu/Ni/SnAg micro-bumps under high temperature and humidity storage. Stress difference formed by oxidation and intermetallic compound (IMC) reaction was the driving force for whisker formation. Interrelated twins with uniform orientation slowed down the diffusion rate of tin atoms and large Ag3Sn bulk on the shallow surface restricted the whisker grain boundary migration, impacting significantly on the morphology of whisker and hillock. Based on the results, formation mechanism of tin whisker and terrace-like hillock was proposed. The findings are of great significance to the study of tin whisker and hillock on isolated Sn-based solders and provide insights into the reliability of 3D electronic packaging.

Reliability in Electronic Packaging: Past, Now and Future

Reliability in Electronic Packaging: Past, Now and Future

Accelerated mechanical low cycle fatigue in isothermal solder interconnects

Properly assessing the underlying physics of failure is critical in predicting the long term reliability of electronic packages in their intended field applications, yet traditional reliability demonstration methods are complicated by time and cost considerations as well as deterministic inadequacies when considering thermomechanical failures. In this work, an alternative reliability testing apparatus and associated protocol were utilized to provide clarity and insight to solder fatigue mechanisms at the device scale; targeting rapid testing times with minimal cost while preserving fatigue life prediction accuracy. A test stand was developed to allow for bi-directional application of shear stress at elevated steady-state temperatures. Utilizing the mechanical force of springs to apply shear loads to solder interconnects within the devices, the reliability of a given device to withstand repeated cycling was studied using in situ resistance monitoring techniques to detect the number of cycles-to-failure (CTF) based on a 30% resistance increase criterion. A mathematical method for quantifying the plastic work density (amount of damage) sustained by the solder interconnects prior to failure was developed relying on the relationship between Hooke's Law for springs and damage deflection to accurately assess the mechanical strength of tested devices.

Sub-surface Damage of Ultra-Thin Monocrystalline Silicon Wafer Induced by Dry Polishing

Ultra-thin wafer fabrication has become a hot spot in recent years with the growing demand for small size and high performance electronic devices. However, far less research focused on the damage behavior in ultra-thin wafer. In this work, 300 mm diameter silicon wafer was thinned to 6 µm thick by grinding plus ultra-precision dry polishing. The damage behavior before and after the dry polishing was discussed. Mechanical and surface analysis showed that the dry polishing process can help improve the strength and surface uniformity of ultra-thin wafer by removing high pressure phase and micro cracks. Series of nano beam diffraction patterns revealed the stress induced by the thinning process only existed in surface. High resolution transmission electron microscopy images analyzed by geometric phase approach indicated that surface dislocations can move across the wafer and reached bottom device layers during the dry polishing, increasing the risk of electrical deterioration. The findings are of great significance to the study on process optimization of ultra-thin wafer and provide insights into the reliability of advanced electronic packaging.

Influence of Thermal Aging on Lead-Free Solder Joints Reliability: A Review

The handheld electronic products currently turning to high density, high performances, and multifunctionality, which sets higher demands on the solder joints reliability in electronic packaging. Because of environmental conscious towards Pb-containing solders, Pb-free solder get attracted wide attention in the electronic industry. Challenges of the Pb-free solders in the microelectronics device are the microstructural evolution influence the mechanical behavior of the solder reliability. This paper analyses a short overview on the progress of the study on the relationship between structure and property, and possible concerns regarding reliability of Pb-free solders joints. Furthermore, the measures to enhance the solder joint reliability are evaluated which contribute to a further theoretical foundation for the research on the solder joints reliability of electronic devices in service life.

Experimental and finite element analysis on determining the fatigue life of pb-free solder joint (Sn-0.5Cu-3Bi-1Ag) used in electronic packages under harmonic loads

Electronic packages that are used these days are exposed to different types of vibration loadings in their usage environment. This vibration exposure can be categorized as harmonic and random vibrations. When reliability assessment of modern electronic systems is considered, vibration loading has an important role to play. One of the biggest challenges facing today is the accurate and rapid assessment of fatigue life under the vibration loading. Conventional solder joints were made of lead-tin alloy. According to many environment legislations and rules, lead is prohibited as an ingredient in the solder alloy. The reason for the prohibition of the usage of the lead is that it poisons the environment. In this study, Sn-0.5Cu-3Bi-1Ag is used as the lead-free solder alloy. Fatigue life prediction of electronic package containing SAC405 is conducted with the aid of vibration testing and Finite element analysis under harmonic vibration loading. A specially designed Plastic Ball Grid Array Package (PBGA) component is mounted on Printed Circuit Board (PCB). It is taken as a test vehicle for the vibration test. The test vehicle is excited by a sinusoidal vibration. The frequency of this excitation equals the fundamental frequency of the test vehicle and it is continued till the component fails. Since the solder balls are very small for direct measurement, Finite Element analysis (FEA) is used for noting down the stresses. The stress versus failures cycles (S-N) curve is made by relating both the stresses on the solder balls obtained and the number of failure cycles from vibration analysis. The fatigue life of the component can be estimated from the generated S-N curve. It is analyzed that the methodology is effective in predicting the component’s life. Hence, the reliability of electronic package can be improved.