Reduction Of Threading Dislocations Research Articles

Effects of phosphorous and antimony doping on thin Ge layers grown on Si

Suppression of threading dislocations (TDs) in thin germanium (Ge) layers grown on silicon (Si) substrates has been critical for realizing high-performance Si-based optoelectronic and electronic devices. An advanced growth strategy is desired to minimize the TD density within a thin Ge buffer layer in Ge-on-Si systems. In this work, we investigate the impact of P dopants in 500-nm thin Ge layers, with doping concentrations from 1 to 50 × 1018 cm−3. The introduction of P dopants has efficiently promoted TD reduction, whose potential mechanism has been explored by comparing it to the well-established Sb-doped Ge-on-Si system. P and Sb dopants reveal different defect-suppression mechanisms in Ge-on-Si samples, inspiring a novel co-doping technique by exploiting the advantages of both dopants. The surface TDD of the Ge buffer has been further reduced by the co-doping technique to the order of 107 cm−2 with a thin Ge layer (of only 500 nm), which could provide a high-quality platform for high-performance Si-based semiconductor devices.

Threading dislocations reduction of GaN-on-Si by introducing AlN/3D-GaN with SiN interlayer for photodetectors

Gallium nitride-on-Silicon epitaxy technology has enabled a high level of large-scale GaN integrated manufacturing. However, the poor crystalline quality of GaN on Si substrates dramatically deteriorates device performance. This work demonstrates the application of a buffer layer structure of AlN/3D-GaN with a SiN interlayer to obtain GaN films with high crystalline quality on Si substrates. Transmission electron microscopy and X-ray diffraction reveal reductions in GaN dislocation density. The full width at half maximum values of the X-ray rocking curve for the GaN(0002) and (10–12) planes have decreased from 499 to 710 arcsec to 339 and 350 arcsec, respectively. Ultraviolet photodetectors based on the optimized GaN-on-Si substrates exhibit low dark currents (34 pA@10 V) and high responsivity (6.8 A/W@10 V). Our reported novel buffer architecture provides an important reference for improving the performance of other GaN-based optoelectronics and power electronic devices on Si substrates.

Impact of Pocket Geometry on Quantum Dot Lasers Grown on Silicon Wafers

Epitaxially grown quantum dot (QD) lasers in narrow pockets on patterned silicon photonics wafers present a key step toward full monolithic integration of on‐chip light sources. However, InAs QD lasers grown in deep and narrow pockets demonstrate limited performance and reliability compared to planar‐grown counterparts. Herein, InAs QD lasers are grown in patterned SiO2 pockets atop planar thermal cyclic annealed GaAs on (001) Si substrate with reduced threading dislocation density, enabling detailed study of how pocket geometry impacts device performance. Fabry–Pérot lasers with cleaved facets exhibit strong variation in performance based on the dimensions of the pocket, wherein thermal and optical metrics improve with increasing pocket width. Devices lase up to a maximum stage temperature of 115 °C with an extrapolated lifetime of 2.2 years at 80 °C for material grown in 50 μm by 3900 μm pockets. This study addresses, the ongoing challenge of optimizing pocket‐grown devices to planar equivalent performance.

Nucleation and Growth of GaAs on a Carbon Release Layer by Halide Vapor Phase Epitaxy.

We couple halide vapor phase epitaxy (HVPE) growth of III-V materials with liftoff from an ultrathin carbon release layer to address two significant cost components in III-V device - epitaxial growth and substrate reusability. We investigate nucleation and growth of GaAs layers by HVPE on a thin amorphous carbon layer that can be mechanically exfoliated, leaving the substrate available for reuse. We study nucleation as a function of carbon layer thickness and growth rate and find island-like nucleation. We then study various GaAs growth conditions, including V/III ratio, growth temperature, and growth rate in an effort to minimize film roughness. High growth rates and thicker films lead to drastically smoother surfaces with reduced threading dislocation density. Finally, we grow an initial photovoltaic device on a carbon release layer that has an efficiency of 7.2%. The findings of this work show that HVPE growth is compatible with a carbon release layer and presents a path toward lowering the cost of photovoltaics with high throughput growth and substrate reuse.

HiPIMS-grown AlN buffer for threading dislocation reduction in DC-magnetron sputtered GaN epifilm on sapphire substrate

Gallium nitride (GaN) epitaxial films on sapphire (Al2O3) substrates have been grown using reactive magnetron sputter epitaxy with a liquid Ga target. Threading dislocations density (TDD) of sputtered GaN films was reduced by using an inserted high-quality aluminum nitride (AlN) buffer layer grown by reactive high power impulse magnetron sputtering (R-HiPIMS) in a gas mixture of Ar and N2. After optimizing the Ar/N2 pressure ratio and deposition power, a high-quality AlN film exhibiting a narrow full-width at half-maximum (FWHM) value of the double-crystal x-ray rocking curve (DCXRC) of the AlN(0002) peak of 0.086° was obtained by R-HiPIMS. The mechanism giving rise the observed quality improvement is attributed to the enhancement of kinetic energy of the adatoms in the deposition process when operated in a transition mode. With the inserted HiPIMS-AlN as a buffer layer for direct current magnetron sputtering (DCMS) GaN growth, the FWHM values of GaN(0002) and (10 1‾ 1) XRC decrease from 0.321° to 0.087° and from 0.596° to 0.562°, compared to the direct growth of GaN on sapphire, respectively. An order of magnitude reduction from 2.7 × 109 cm−2 to 2.0 × 108 cm−2 of screw-type TDD calculated from the FWHM of the XRC data using the inserted HiPIMS-AlN buffer layer demonstrates the improvement of crystal quality of GaN. The result of TDD reduction using the HiPIMS-AlN buffer was also verified by weak beam dark-field (WBDF) cross-sectional transmission electron microscopy (TEM).

Biaxial, Hybrid Plastic-Elastic Relaxation in Micropatterned Semipolar InGaN Buffer Layers Improves Quality of Templated Quantum Well Emitters

Despite significant progress and multiple creative approaches taken toward the realization of long-wavelength III-nitride based light emitters over the past decade, high double-digit external quantum efficiencies remain elusive for GaN/InGaN based devices for wavelengths longer than 525 nm. This stems from the large mismatch between the GaN and InGaN lattice that manifests in deleterious crystal strain gradients, degrades surface growth morphology, and introduces diverse and potent nonradiative defects.A promising route to mitigation of strain-based effects is templating epitaxial growth on relaxed InGaN epilayers; in particular, a known and controllable platform for uniaxial strain relaxation is the creation of 1-D misfit dislocation arrays at semipolar GaN/InGaN heterointerfaces. Leveraging work by Hardy et al. on achieving >200 nm thick, partially relaxed semipolar InGaN layers [1] and precise determination of InGaN epilayer strain state and composition by Young et al. [2], we explore the potential for 2-D buffer layer relaxation in (11-22) InGaN layers via micron- and sub-micron patterning. Cathodoluminescence microscopy and x-ray diffraction indicated significant increases in biaxial epilayer relaxation with increased pillar aspect ratio; quantum wells deposited atop these relaxed InGaN buffers showed dramatic threading dislocation reduction, luminescence and morphology improvements, and evidence of improved indium incorporation relative to planar samples at nominally identical growth conditions.[1] Hardy, M.T., Young, E.C., Hsu, P.S., Haeger, D.A., Koslow, I.L., Nakamura, S., DenBaars, S.P., Speck, J.S. Suppression of m-plane and c-plane slip through Si and Mg doping in partially relaxed (20-21) InGaN/GaN heterostructures. Appl. Phys. Lett. 101, 132102 (2012).[2] Young, E. C., Romanov, A.E., Speck, J.S., Determination of composition and lattice relaxation in semipolar ternary (In,Al,Ga)N strained layers from symmetric x-ray diffraction measurements. Appl. Phys. Express. 4, 061001 (2011).

Nucleation of Threading Dislocations in 4H-SiC at Early Physical-Vapor-Transport Growth Stage

In this work, we identify the nucleation mechanism of threading dislocations (TDs) associated with stacking faults (SFs) and 15R-SiC at the early growth stage of 4H-SiC single crystals grown by the physical vapor transport (PVT) technology. By combining molten KOH etching and photochemical etching, we successfully reveal etch pits of TDs and linear etch patterns of SFs on the (112̅0) surface of 4H-SiC single crystals. Systematic investigations based on transmission electron microscopy (TEM) observations and Raman analysis indicate that the Si–C bilayer stacking sequence of SFs is (3, 2) in Zhdanov’s notation. The accumulation of SFs (3, 2) gives rise to the polymorph fluctuation and thus the formation of 15R-SiC at the early PVT growth stage of 4H-SiC single crystals. Quantitative stress analyses indicate that the strain field distributions along the SFs (3, 2) and the 15R-/4H-SiC interfaces are inhomogeneous, which give rise to the nucleation of TDs and low-angle grain boundaries (LAGBs), respectively. The nucleation of LAGBs releases the high stress at the 15R-/4H-SiC interface, which facilities the following 4H-SiC single-crystal growth. Our work indicates that the avoidance of polymorph fluctuation is important to the reduction of TDs at the early growth stage of PVT-grown 4H-SiC single crystals.

Mid-infrared InAs/InAsSb Type-II superlattices grown on silicon by MOCVD

In this work we report the growth of the InAs/InAsSb type-II superlattice (T2SL) onto Si substrates via the use of a GaSb/GaAs/Si buffer layer structure all grown by MOCVD. Transmission electron microscopy (TEM) was used to show the effectiveness of the buffer layer structure in reducing threading dislocation density and to verify the formation of an interfacial misfit dislocation array between the GaSb and GaAs layers. Electron channelling contrast imaging was used to measure a threading dislocation density of 6.73 × 108/cm2 at the surface of the T2SL. TEM and X-ray diffraction show that the T2SL itself was grown to a high quality considering the large mismatch of the heteroepitaxy. Fourier transform infrared spectroscopy was used to measure the photoluminescence performance of the T2SL which was found to have a FWHM of 50 meV at a peak wavelength of 4.5 µm at 77 K. These results are a step forward towards integration of full InAs/InAsSb T2SL device structures onto Si substrates via MOCVD.

Self-Assembled Size-Tunable Microlight-Emitting Diodes Using Multiple Sapphire Nanomembranes.

Microlight-emitting diode (Micro-LED) is the only display production technology capable of meeting the high-performance requirements of future screens. However, it has significant obstacles in commercialization due to etching loss and efficiency reduction caused by the singulation process, in addition to expensive costs and a significant amount of time spent on transfer. Herein, multiple-sapphire nanomembrane (MSNM) technology has been developed that enables the rapid transfer of arrays while producing micro-LEDs without the need for any singulation procedure. Individual micro-LEDs of tens of μm size were formed by the pendeo-epitaxy and coalescence of GaN grown on 2 μm width SNMs spaced with regular intervals. We have successfully fabricated micro-LEDs of different sizes including 20 × 20 μm2, 40 × 40 μm2, and 100 × 100 μm2, utilizing the membrane design. It was confirmed that the 100 × 100 μm2 micro-LED manufactured with MSNM technology not only relieved stress by 80.6% but also reduced threading dislocation density by 58.7% compared to the reference sample. It was proven that micro-LED arrays of varied chip sizes using MSNM were all transferred to the backplane. A vertical structure LED device could be fabricated using a 100 × 100 μm2 micro-LED chip, and it was confirmed to have a low operation voltage. Our work suggests that the development of the MSNM technology is promising for the commercialization of micro-LED technology.

Effect of low-temperature interlayer in active-region upon photoluminescence in multiple-quantum-well InGaN/GaN

Photoluminescence (PL) spectra dependent on the excitation power and temperature of two different red-emitting InGaN/GaN trapezoidal multiple quantum wells (TMQWs), with GaN and AlN low-temperature interlayers (LTILs) between the InGaN well and GaN barrier layers, were investigated. It was found that compared with the TMQWs with GaN LTILs, the TMQWs with AlN LTILs have a better structural quality, more significant carrier-localizing effect, and superior internal quantum efficiency. The results can be explained by the fact that due to the stability of Al–N bond and strain-compensated effect of AlN, compared with the GaN LTIL, the AlN LTIL grown on the InGaN well layer with embedded In-rich quantum dots (QDs), cannot only reduce threading dislocation densities as confirmed by XRC measurements, but also prevent In atoms from diffusing from In-rich QDs to InGaN matrix and/or from the InGaN well to GaN barrier layer, thus suppressing degradation of the QDs and generation of non-radiative centers.

Strain relaxation and dislocation annihilation in compositionally graded α-(AlxGa1-x)2O3 layer for high voltage α-Ga2O3 power devices

α-Ga2O3 of the corundum structure and the large bandgap of 5.3 eV has attracted great interest because it can be grown on a sapphire (α-Al2O3) substrate with the same crystal structure. However, the lattice mismatch (4.3%) and the different thermal expansion coefficients between α-Ga2O3 and the sapphire substrate induce crystalline defects and thermal strain, leading to a high density of threading dislocations and degraded electrical properties of the α-Ga2O3 films grown directly on the substrate. Herein, to circumvents these issues, compositionally graded α-(AlxGa1-x)2O3 layers are adopted to reduce threading dislocations for a high quality of epitaxial α-Ga2O3 films. The evolution of strain relaxation and the inclination of threading dislocations in graded α-(AlxGa1-x)2O3 layers are confirmed by reciprocal space mapping (RSM) and transmission electron microscopy (TEM). Through RSM and TEM studies, we confirmed that compressive strain enhances the inclination of dislocations, and therefore, the dislocations merge and annihilate in the graded α-(AlxGa1-x)2O3 layers. Moreover, owing to dislocations annihilation in the graded α-(AlxGa1-x)2O3 layers, the calculated density of threading dislocations in α-Ga2O3 films with a graded α-(AlxGa1-x)2O3 layer is reduced by 64.9% compared with that of α-Ga2O3 films deposited directly grown on a bare sapphire substrate. Furthermore, a fabricated lateral-structure Schottky diodes reveals enhanced breakdown voltages and forward current density due to the improved crystalline quality using the graded α-(AlxGa1-x)2O3 layer. This study provides an attractive approach for obtaining high-quality epitaxial α-Ga2O3 thin films for high voltage power devices.

Repeatability and Mechanisms of Threading Dislocation Reduction in InN Film Grown with In Situ Surface Modification by Radical Beam Irradiation

The objective of this study was to investigate the repeatability of in situ surface modification by radical beam irradiation to reduce threading dislocation density in InN film. The growth of InN template and N radical irradiation processes were repeated twice in situ in the radio-frequency plasma-excited molecular beam epitaxy chamber before the regrowth of InN film on the N radical irradiated template. Transmission electron microscopy was applied to study dislocation behaviors of the InN film grown. In this letter, we show cross-sectional-view transmission electron microscopy evidence of the threading dislocation reduction from ~2.8×1010 cm-2 in the first irradiated InN layer to ~2.0×1010 cm-2 in the second irradiated InN layer, and to ~1.3×1010 cm-2 in the top regrown InN layer. The mechanisms of threading dislocation reduction were also studied.

Reduction of threading dislocations in GaN grown on patterned sapphire substrate masked with serpentine channel

Gallium nitride (GaN) is a promising semiconductor for the fabrication of a wide range of electronic and optoelectronic devices. For GaN grown on widely used sapphire substrate, bundles of threading dislocations (TDs) are induced by thermal and lattice mismatch. These TDs intersect the surface of GaN and degrade the internal quantum efficiency (IQE) of GaN-based devices. To address this issue, two innovative techniques are proposed for effective filtration of TDs. First, a novel design of serpentine channel pattern sapphire substrate (SCPSS) is applied for effective filtration of TDs at the interface. Transmission electron microscopy (TEM) indicated that SCPSS plays an effective role in the filtration of TDs; however, cathodoluminescence (CL) revealed that many TDs still intersect the surface of GaN. To further optimize the growth of GaN, the temperature was ramped down to the intermediate level and an interlayer (IL) of InGaN was introduced near the window of SCPSS. CL analysis indicated that additional use of InGaN-IL further reduced the TDs. Raman microscopy showed that incorporation of IL lead to drastic reduction in compressive stress. Atomic force microscopy (AFM) confirmed the achievement of excellent surface topography with InGaN-IL. Moreover, it is observed that growth of GaN by SCPSS is better than conventional growth because of improved surface morphology and low TDs. The reduction of TDs by SCPSS and InGaN-IL is an effective approach for the growth of high-quality GaN towards efficient devices.

Micropyramid Vertical Ultraviolet GaN/AlGaN Multiple Quantum Wells LEDs on Si(111)

Micropyramid vertical GaN-based ultraviolet (UV) light-emitting diodes (LEDs) on Si(111) substrate have been fabricated by selective area growth to reduce threading dislocations and the polarization effects. There is no-light emission at the bottom and six planes of the pyramid at lower current due to the leakage current and nonradiative recombination of the dislocation at the bottom and the 90° threading dislocations (TDs) at six planes of the pyramid, and the top of the pyramid is the high-brightness region. The micropyramid UV LED has a high optical output intensity under a small current injection, and the series resistance of unit area is only a quarter of the conventional vertical LEDs, so the micropyramid UV LED would have a high output power under the drive circuit. The reverse leakage current of a single micropyramid UV LED is 2 nA at −10 V.

Origination and evolution of point defects in AlN film annealed at high temperature

While high temperature annealing has been proven to be an effective strategy to reduce threading dislocation density of AlN film, the point defect induced near-ultraviolet emission increases dramatically with the increase in annealing temperature, and thus limits its application in deep ultraviolet optoelectronic devices. Herein, the origination and evolution of point defects in high-temperature annealed AlN are studied and clarified by photoluminescence spectroscopy, secondary ion mass spectrometry, positron annihilation and first-principles calculation. We have confirmed that (1) the annealing induces the increased O impurity concentration by two orders of magnitude; (2) The increase of O impurity concentration in AlN after high temperature annealing is the key factor that causes the evolution of point defects and the enhancement of near ultraviolet defect peak; (3) the formation of more O content [VAl-n(ON)] and VN at different annealing temperatures are responsible for photoluminescence evolution. Present work reveals the formation mechanism of point defects in AlN and provides further support for improving the quality of AlN.

Threading Dislocation Reduction of Ge by Introducing a SiGe/Ge Superlattice

The influence of introducing a SiGe/Ge superlattice (SL) between Ge layers and Si substrate for the sake of the reduction of the threading dislocation density (TDD) without additional annealing is investigated. By introducing the SiGe/Ge SL and optimizing the layer stack, the TDD of the Ge layer becomes ∼1/3. In the case of 2.8 μm thick Ge without introducing the SiGe/Ge SL, the TDD at the surface is 7.6 × 108 cm−2. A slight TDD reduction is observed by introducing a Si0.2Ge0.8/Ge SL between the Si substrate and the Ge layer. By inserting 5, 10 and 20 cycles of Si0.2Ge0.8/Ge, the TDD is reduced to 7.1 × 108, 5.9 × 108 and 5.3 × 108 cm−2, respectively. The lateral lattice parameters of these SLs are ∼5.656 Å, which is a smaller value compared to that of bulk Ge, indicating plastic relaxation by misfit dislocation formation. Further TDD reduction is realized with increasing Si concentration in the SiGe/Ge SL without changing the cycle of the SL. However, surface roughening due to pit formation occurs if the Si concentration in the SL is higher than 50% because of increased strain at the interfaces between SiGe and Ge. With increasing SiGe and Ge thickness ratio in the SL layer and maintaining periodicity and cycles, the TDD is reduced to 2.8 × 108 cm−2 without degrading the surface roughness. This improvement is related to a relaxation of the SiGe/Ge SL by plastic deformation.

Growth of High Quality GaN on Si (111) Substrate by Using Two-Step Growth Method for Vertical Power Devices Application

A crack-free GaN film grown on 4-inch Si (111) substrate is proposed using two-step growth methods simply controlled by both III/V ratio and pressure. Two-step growth process is found to be effective in compensating the strong tensile stress in the GaN layer grown on Si substrate. The high-resolution X-ray diffraction (XRD) rocking curves of (002) and (102) planes for the GaN epitaxial layer with two-step growth method are 317 and 432 arcsec, while the corresponding values for the reference sample without two-step growth method are 550 and 1207 arcsec, respectively. The reduced threading dislocation of GaN film with two-step growth method is obtained to be ~2 × 108/cm2, which is attributed to effectively annihilate and bend threading dislocation.

Strain Relaxation and Dislocation Annihilation in Compositionally Graded α-(Al xGa 1-x) 2O 3 Layer for High Voltage α-Ga 2O 3 Power Devices

α-Ga2O3 of the corundum structure and the large bandgap of 5.3 eV has attracted great interest because it can be grown on a sapphire (α-Al2O3) substrate with the same crystal structure. However, the lattice mismatch (4.3%) between α-Ga2O3 and the sapphire substrate induces a high density of threading dislocations, which act as breakdown leakage paths and lead to deterioration of the crystallinity and electrical properties of the α-Ga2O3 films grown directly on the substrate. Herein, to circumvent this issue compositionally graded α-(AlxGa1-x)2O3 layers are adopted to reduce threading dislocations for a high quality of epitaxial α-Ga2O3 films. The evolution of strain relaxation and the inclination of threading dislocations in graded α-(AlxGa1-x)2O3 layers are confirmed by reciprocal space mapping (RSM) and transmission electron microscopy (TEM). Through RSM and TEM studies, we confirmed that compressive strain enhances the inclination of dislocations and therefore, the dislocations merge and annihilate in the graded α-(AlxGa1-x)2O3 layers. The calculated density of threading dislocations in an α-Ga2O33 films with a graded α-(AlxGa1-x)2O3 buffer layer is reduced by 64.9% compared with that of an α-Ga2O3 films deposited directly grown on a bare sapphire substrate. Furthermore, a fabricated lateral-structure Schottky diode reveals enhanced breakdown voltages and forward current density due to the improved crystalline quality by using the graded α-(AlxGa1-x)2O3 buffer layer. This study provides an attractive approach for obtaining high-quality epitaxial α-Ga2O3 thin films for high voltage power devices.

Threading Dislocation Reduction of Ge by Introducing a SiGe/Ge Superlattice

Ge growth on Si is essential e.g. for photonics device integration (e.g. Ge photodiode) into Si based CMOS platform (1). However, due to 4.2% of lattice mismatch between Ge and Si, misfit dislocations (MD) and threading dislocations (TD) are introduced for strain relaxation after exceeding critical thickness. In order to realize low-darkcurrent Ge photodiode, improvement of crystallinity is important. High quality Ge growth techniques by combining various annealing techniques (at 800~850oC) are reported (2-3). However, because of low melting point of Ge (937oC), the Ge growth process is typically integrated at the last part of front-end process. Therefore, these annealing processes are affecting device parameters of existing devices. In previous paper, we reported Ge/SiGe superlattice (SL) fabrication and found improvement of TD density (TDD) by increasing Si composition of SiGe in the SL (4). Here we report TDD improvement of Ge by introducing the SL without annealing.Ge growth with SiGe/Ge SL is carried out using reduced pressure chemical vapor deposition system. Si(100) wafers are used. After an HF last cleaning, the wafer is loaded into reactor and baked at 1000oC and cooled down to 600oC in H2 and further cooled down to 350oC in N2. After that 100 nm-thick seed Ge is deposited using N2-GeH4 gas. Then the wafer is heated up to 500oC in H2 and Ge/SiGe superlattice is fabricated using H2-GeH4 and H2-SiH4-GeH4 gases, respectively. Furthermore, 2.8 µm thick Ge is deposited at 550oC using H2-GeH4 gas.Thickness is measured by cross section SEM and spectroscopic ellipsometry. TDD is determined by Secco defect etching technique. Strain and relaxation of Ge and SiGe layers are measured by XRD reciprocal space mapping. Distribution of the MD and the TD are measured by cross section TEM.In the case of direct Ge growth on Si (Fig. 1a), MDs are formed at interface between Ge and Si. TDs are spreading into the Ge layer. Some of the TDs are long and extending to surface. These MD and TD formations are due to the lattice mismatch between Ge and Si. On the other hand, in the case of Ge sample grown on ×20 Si0.3Ge0.7 / Ge SL (Fig. 1b), most of MDs are formed at interface between 100 nm-thick Ge buffer and Si substrate. Additionally high density of TDs are observed in the Ge buffer and the SL layer. In the SL layer, lower TDD is observed in the upper part compared to that in the deeper part. At the interface between upper 2.8 µm thick Ge and the SL layer, MD and high density of TDs toward lateral direction is observed indicating relaxation. TDD in the 2.8 µm thick Ge layer seems to be lower compared to that in Fig. 1a).In the case of direct Ge growth on Si, TDD of ~7.5×108 cm-2 is obtained (Fig. 2). The TDD is comparable to previously reported results (2). By depositing 2.8 µm thick Ge on Si0.2Ge0.8 SL, TDD is decreased to ~5.4×108 cm-2. With decreasing Ge concentration of SiGe layer of the SL, decrease of TDD is observed until 40%. However, by replacing SiGe layers to mono-layers of Si, increased TDD is observed, which might be due to too high strain at interface between Si and SiGe.Figure 3 shows TDD of 2.8 µm thick Ge deposited on Si0.2Ge0.8/Ge SL with different Si0.2Ge0.8 and Ge thickness combination without changing periodicity of the SL. Lower TDD is observed when the 2.8 µm thick Ge is deposited on the SL with higher Si0.2Ge0.8 thickness. Possible reason is higher degree of relaxation of the SL layer.In Fig. 4, TDD of 2.8 µm thick Ge deposited on SLs of various lattice parameters are shown. By reducing lateral lattice parameter of the SiGe/Ge SL by increasing SiGe thickness or Si concentration, TDD decreases. The reduction of the TDD is fitting to one line for both cases. These results indicate that higher plastic relaxation of the SL occurs on the Ge buffer due to increased compressive strain of SiGe in the SL, and the TDD reduction of the Ge on the SL may be caused by similar mechanism of reverse graded buffer. By introducing SiGe/Ge SL, multiple effect of the reverse graded buffer may be expected. Reference (1) S. Lischke et al. Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM) , (2014) 29(2) Y. Yamamoto et al Solid-State Electron. 60 (2011) 2(3) Y. Yamamoto et al. Semicond. Sci. Technol. 33 (2018) 124007(4) Y. Yamamoto et al. Jpn. J. Appl. Phys. 59, SGGK10 (2020) Figure 1

InGaSb Defect Filter Layer to Improve Performance of GaSb Solar Cells Grown on GaAs Substrates

The reduction of the threading dislocation density in metamorphic GaSb grown on GaAs substrates through the use of InGaSb defect filter layers has been investigated. More specifically, we study the effects of strain and thickness on the ability of a InGaSb defect filter layer to reduce threading dislocations in GaSb solar cells grown on GaAs substrates. The strain between the GaSb metamorphic layer on GaAs substrate (99.5% relaxed) and the InGaSb defect filter layer is varied by changing the indium composition in the InGaSb layer. It is demonstrated that an InGaSb defect filter layer with 0.6% strain is more effective for blocking threading dislocations compared with higher-strain layers, resulting in improved short-circuit current (Jsc) and open-circuit voltage (Voc) for the metamorphic GaSb solar cell. The optimization of the defect filter layer involves varying the thickness of the layer to achieve the lowest possible threading dislocation density. This also takes into account the critical thickness of the InGaSb layer on GaSb to avoid generation of threading dislocations from the InGaSb layer itself. It is shown that adding an In0.11Ga0.89Sb defect filter layer with thickness of 250 nm and 0.6% strain beneath a GaSb solar cell grown on a GaAs substrate improves Voc from 0.1 V to 0.16 V and Jsc from 19.7 mA/cm2 to 24.7 mA/cm2.