Threading Dislocation Reduction of Ge by Introducing a SiGe/Ge Superlattice

Abstract

The influence of introducing a SiGe/Ge superlattice (SL) between Ge layers and Si substrate for the sake of the reduction of the threading dislocation density (TDD) without additional annealing is investigated. By introducing the SiGe/Ge SL and optimizing the layer stack, the TDD of the Ge layer becomes ∼1/3. In the case of 2.8 μm thick Ge without introducing the SiGe/Ge SL, the TDD at the surface is 7.6 × 108 cm−2. A slight TDD reduction is observed by introducing a Si0.2Ge0.8/Ge SL between the Si substrate and the Ge layer. By inserting 5, 10 and 20 cycles of Si0.2Ge0.8/Ge, the TDD is reduced to 7.1 × 108, 5.9 × 108 and 5.3 × 108 cm−2, respectively. The lateral lattice parameters of these SLs are ∼5.656 Å, which is a smaller value compared to that of bulk Ge, indicating plastic relaxation by misfit dislocation formation. Further TDD reduction is realized with increasing Si concentration in the SiGe/Ge SL without changing the cycle of the SL. However, surface roughening due to pit formation occurs if the Si concentration in the SL is higher than 50% because of increased strain at the interfaces between SiGe and Ge. With increasing SiGe and Ge thickness ratio in the SL layer and maintaining periodicity and cycles, the TDD is reduced to 2.8 × 108 cm−2 without degrading the surface roughness. This improvement is related to a relaxation of the SiGe/Ge SL by plastic deformation.