Proximity Rapid Thermal Diffusion Research Articles

Si tunnel junctions obtained by proximity rapid thermal diffusion for tandem photovoltaic cells

Low-resistance c-Si Esaki tunnel junctions (TJ) can be applied in two-terminal Si-based tandem solar cells to electrically connect two sub-cells. Proximity rapid thermal diffusion (PRTD) is an economical and facile method to fabricate the Si tunnel junctions with a damage-free surface. The p++/n++ Si TJ on (111)-oriented c-Si wafer produced by combining PRTD and photovoltaic industrial techniques is reported in this work. The adjustment of the n++ emitter by a two-step rapid thermal annealing effectively facilitates the realization of the p++/n++ TJ. The peak current density of a tunnel diode based on this TJ is within the range 140–192 A cm−2 with a peak to valley current ratio of 1.9–3.2. Such a p++/n++ TJ is implemented in III–V nanowires (NWs) on Si tandem solar cells. Despite the defectuosity of the NWs array, we demonstrate that an increase of the open-circuit voltage is observed compared with the sole single-junction Si solar cell. This kind of TJ can also be integrated with other top cell materials such as perovskites and copper indium gallium selenide. Low-cost and high-efficiency c-Si based tandem solar cells might be produced with the application of Si TJs obtained by PRTD.

Effect of diffusion parameters on emitter formation in silicon solar cells by proximity rapid thermal diffusion

N-type emitters have been formed in p-type monocrystalline silicon with good uniformity and high peak doping concentration by proximity rapid thermal diffusion (PRTD). High diffusion rates are achievable for relatively low temperatures (< 1000°C) with the addition of O2 to the N2 diffusion atmosphere. Solar cells have been prepared from the diffused samples to assess their performance and efficiencies of up to 6.0% have been achieved. The devices possess high series resistance and high recombination rates amongst other factors which limit their performance. Reducing the junction depth improves Jsc and efficiency but is accompanied by degrading shunt resistance and FF for junction thicknesses below ~ 400nm. Further refinements of cell processing should improve efficiency and result in a diffusion process for forming shallow emitters for application to microstructured devices such as micropillar radial junction solar cells.

Fabrication of Si tunnel diodes for c-Si based tandem solar cells using proximity rapid thermal diffusion

Increasing competitiveness of photovoltaic (PV) devices is currently an important objective in technological research, especially with the development of tandem solar cells based on c-Si as the bottom cell. For a monolithical structure, a tunnel diode in between the top and bottom cells is necessary.In this work we report on the development of the fabrication of Si tunnel junction using a combination of spin-on doping and proximity rapid thermal diffusion. A desirable attribute of this process is simplicity. Two different structures p++/n++ or n++/p++ were fabricated on (100) Si substrates. Carrier density profiles were measured by ECV to characterize the shallow doping profiles. Vertical tunnel diodes were fabricated and I(V) characteristics are presented. It is shown that device peak current densities up to 270 A/cm² are achieved using this technique, which is the best value reported with such simple technique.

Borosilicate glass nanolayer as a spin-on dopant source: FTIR and spectroscopic ellipsometry investigations

Borosilicate glass is a potential dopant source for producing shallow boron junctions by the use of proximity rapid thermal diffusion. Interest in this technique has increased recently due to its application to the manufacture of solar cells. A borosilicate gel is spun onto a silicon wafer and the layer is rapidly thermally annealed to convert it to a borosilicate glass (BSG). Fourier transform infrared (FTIR) spectroscopy, spectroscopic ellipsometry and sheet-resistance measurements have been used to understand and subsequently optimise the conversion of the gel to a BSG nanolayer. Physical properties of the thin, spun-on layer, such as thickness, refractive index and porosity, were monitored. The optimum conversion step involved rapid thermal annealing for 45 s at 900 °C. This avoided any boron loss from the BSG layer during the thermal processing step. The position of the B–O stretching vibration around 1370 cm−1 was found to be sensitive to boron outdiffusion and it is suggested that FTIR spectroscopy provides a simple method for monitoring the outdiffusion of boron from the spin-on dopant nanolayer. Further FTIR studies using p-polarised light at oblique incidence revealed, for the first time, the LO–TO phonon splitting of the B–O stretching vibration band in the glassy layer. Investigation of the stability of BSG layers over long periods showed that unstabilised (or undensified) BSG films demonstrate a dramatic loss of boron over 6 months.

Fabrication and characterisation of Si micropillar PV structures

Arrays of vertical silicon micropillar radial junction solar cells have been fabricated by diffusion of direct application spin on dopant and from the vapour phase through proximity rapid thermal diffusion. The micropillars were fabricated by optical lithography and deep reactive ion etching. The micropillar arrays show superior antireflective properties over the measured spectrum and good correlation to finite difference time domain modelling of identical geometry arrays. Junctions formed by a conventional spin on doping process of phosphorus containing dopant solution produced Suns-Voc values in the region of 0·3 V. This value is likely due to difficulties encountered in achieving an even distribution of dopant over the entire surface of the arrays. An alternative method utilising spin on dopant but employing an intermediate vapour phase diffusion step produced promising results with Suns-Voc values reaching 0·5 V following a post-diffusion drive-in step.

Silicon Solar Cell With Integrated Tunnel Junction for Multijunction Photovoltaic Applications

A silicon (Si) solar cell structure with an integrated Si tunnel junction (TJ) is proposed for multijunction (MJ) solar cell applications. The TJ is fabricated on top of an ordinary Si solar cell via the proximity rapid thermal diffusion process. The fabricated solar cells with integrated TJs show nondegraded photovoltaic characteristics. The electrical performance of the TJs allows for normal operation of Si-based MJ solar cells under at least 250-sun illumination and can be improved to achieve compatibility for higher illumination levels. The structure reported in this letter serves as a promising candidate for use as a bottom cell with an integrated TJ for low-cost and high-efficiency MJ solar cells.

Conformal P‐N junctions in macroporous silicon for photovoltaic energy conversion

AbstractWe report on the fabrication of a macroporous silicon diode that successfully operates in a photovoltaic mode of energy conversion. Typical device structures are fabricated on 4″, Cz grown, &lt;100&gt;, p‐type, 5 – 30 Ω‐cm, Si substrates and make use of random or pre‐patterned macroporous silicon films up to 100 μm thick with pores ∼1 μm in diameter and a center‐to‐center pore spacing of 2.5 μm. Phosphorous dopants are introduced throughout the porous silicon region with a newly adapted technique based on proximity rapid thermal diffusion. This development effort has enhanced the uniformity of dopant diffusion into the pores and subsequently improved device performance. The resulting p‐n diode within the porous silicon is of a three‐dimensional nature and exhibits an extremely high internal surface area up to ∼6690 cm2/cm3. To our knowledge, this is the first use of such a technique to fabricate conformal, three‐dimensional p‐n junctions for photovoltaic applications. The large internal surface area of this diode makes it applicable to next generation photovoltaics. Moreover, the porous silicon within this device is not simply an antireflection coating; rather it is a light trapping medium that has the ability to become a large surface area diode and can serve as a host matrix for photoactive compounds. (© 2009 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

SiGe Esaki tunnel diodes fabricated by UHV-CVD growth and proximity rapid thermal diffusion

A process for realisation of SiGe Esaki diodes in layers grown by ultra-high vacuum chemical vapour deposition has been developed and the first Esaki diodes are reported for this growth method. Intrinsic SiGe-layers are grown on highly boron-doped p+-Si layers, while post-growth proximity rapid thermal diffusion of phosphorous into the SiGe is employed to form an n+-layer. Tunnel diodes with a depletion layer width of about 6 nm have been realised in Si0.74Ge0.26, showing a peak current density of 0.18 kA/cm2 and a current peak-to-valley ratio of 2.6 at room temperature.

Silicon tunnel diodes formed by proximity rapid thermal diffusion

We demonstrate the first silicon tunnel diodes (TDs) formed using proximity rapid thermal diffusion and spin-on diffusants. Room temperature peak-to-valley current ratio of 2 is obtained at approximately 100 A/cm/sup 2/ peak current density. Secondary ion mass spectroscopy is used to compare proximity rapid thermal diffusion with rapid thermal diffusion from spin-coated diffusants in direct contact with a device wafer. The proximity rapid thermal diffusion approach provides a cleaner wafer surface for subsequent processing and yields TDs with good local uniformity.

Spectroscopic Investigations of Borosilicate Glass and Its Application as a Dopant Source for Shallow Junctions

Borosilicate glass was investigated as a dopant source for proximity rapid thermal diffusion. A borosilicate gel was spun onto a silicon wafer and the layer was rapid thermally processed to convert it to a borosilicate glass. Fourier transform infrared spectroscopy, spectroscopic ellipsometry, and sheet resistance measurements were used to understand and subsequently optimise the conversion of the gel to a borosilicate glass. The optimum conversion step, which avoided any boron loss from the borosilicate glass layer, was a curing step of 900°C for 45 s. Secondary ion mass spectrometry was used to measure the boron dopant profile of a silicon wafer that was doped with the borosilicate glass layer. The wafer had a surface dopant concentration of and a junction depth of 65.5 nm. Junction diodes, which were fabricated using the glass layer as a dopant source, displayed excellent characteristics, with very low leakage currents and a near ideal forward slope. © 2000 The Electrochemical Society. All rights reserved.

Micro-Raman study of stress distribution generated in silicon during proximity rapid thermal diffusion

Micro-Raman spectroscopy has been used for analysing the thermally induced stress distributions in silicon wafers after proximity rapid thermal diffusion (RTD). A compressive stress was found on the whole silicon wafer after 15 s RTD. After 165 s RTD, the distribution of the stress across the wafer was found to be different: compressive at the edge and tensile at the middle. Thermal stress was relieved in the RTD wafers via slip dislocations. These slip dislocations were observed in the product wafers using optical microscopy. Slip lines propagated from the wafer edge to the wafer centre in eight preferred positions of maximum induced stress. The thermally induced stress and the slip dislocation density increased with time spent at the RTD peak temperature.

Boron diffusion from a spin-on source during rapid thermal processing

Proximity rapid (3 min) thermal diffusion has been investigated as a technique for fabricating shallow p-type junctions in submicron metal oxide semiconductor field effect transistors. A layer of spin-on dopant, deposited on a silicon wafer, was used as a dopant source for boron. Sheet resistance measurements, secondary ion mass spectrometry and Fourier transform infrared spectroscopy were used to evaluate the spin-on dopant and rapid thermal diffusion efficiency. Spin-on dopant post-spin baking process was optimised to avoid organic contamination during rapid thermal diffusion. Oxygen content in the rapid thermal diffusion ambient was essential to ensure successful deglazing of the doped oxide and spin-on dopant layers. The oxygen content also affected the doping efficiency of the product and source wafers. For process times less than 2 min, the doping level in the source wafer is less than in the product wafer. For process times greater than or equal to 3 min however, the doping efficiency for both wafers is the same.

Kinetics of phosphorus proximity rapid thermal diffusion using spin-on dopant source for shallow junctions fabrication

Proximity rapid thermal diffusion (RTD) has been investigated using phosphorus spin-on dopants (SOD) as a function of SOD thickness, baking and diffusion temperatures, separation distance between wafers, and ambient. Experimental results, based on sheet resistance measurements, dopant distributions obtained by secondary ion mass spectroscopy, and electron microprobe analyses indicate fast phosphorus out-diffusion from the dopant source. Simplified modelling of phosphorus diffusion within the SOD and evaporation confirms its fast transport and limited evaporation. An analysis of the process kinetics suggest that at high RTD temperatures doping of the processed wafer is controlled by gas phase transport. At low diffusion temperature surface reactions control the process.

Surface Effects in Silicon Doping with Boron During Proximity Rapid Thermal Diffusion

AbstractWe investigated effects of surface preparation in doping silicon wafers using proximity rapid thermal diffusion (RTD). This process uses a spin-on-dopant (SOD) as an evaporating source for doping processed wafers. Various cleaning processes were used to study formation of the dopant glass on the silicon wafers during RTD. Doping was evaluated by sheet resistance measurements, dopant profiling using SIMS analyses, carrier distributions using spreading resistance profiling (SRP) or anodic oxidation, and was complemented by the composition analyses of the SOD deposited on the source wafers and of the dopant glass formed on the target wafers using Fourier Transform Infrared Spectroscopy (FTIR) in the transmission and reflection modes, respectively. It was found that the influence of the cleaning steps is much stronger in low temperature doping processes than at high temperatures. In addition, the temperature effect related to the wafer size was also an important factor in determining the doping efficiency in this RTDs.

Fabrication of submicron junctions-proximity rapid thermal diffusion of phosphorus, boron, and arsenic

Various techniques used in fabrication of deep submicron junctions are reviewed with respect to their advantages and disadvantages in silicon very large scale integration (VLSI) circuits technology. Proximity rapid thermal diffusion is then presented as an alternative process which results in very shallow junctions with high dopant concentrations at the surface. The feasibility of Si doping with B, P, and As for both planar and 3-D structures such as trench capacitors used in high density DRAM memories is shown based on sheet resistance measurements, secondary ion mass spectroscopy and scanning electron micrographs. Retardation effect of arsenic diffusion similar to the well known inhibition of silicon or SiO/sub 2/ deposition in chemical vapor deposition (CVD) processes is identified and discussed. >