Abstract

Low-resistance c-Si Esaki tunnel junctions (TJ) can be applied in two-terminal Si-based tandem solar cells to electrically connect two sub-cells. Proximity rapid thermal diffusion (PRTD) is an economical and facile method to fabricate the Si tunnel junctions with a damage-free surface. The p++/n++ Si TJ on (111)-oriented c-Si wafer produced by combining PRTD and photovoltaic industrial techniques is reported in this work. The adjustment of the n++ emitter by a two-step rapid thermal annealing effectively facilitates the realization of the p++/n++ TJ. The peak current density of a tunnel diode based on this TJ is within the range 140–192 A cm−2 with a peak to valley current ratio of 1.9–3.2. Such a p++/n++ TJ is implemented in III–V nanowires (NWs) on Si tandem solar cells. Despite the defectuosity of the NWs array, we demonstrate that an increase of the open-circuit voltage is observed compared with the sole single-junction Si solar cell. This kind of TJ can also be integrated with other top cell materials such as perovskites and copper indium gallium selenide. Low-cost and high-efficiency c-Si based tandem solar cells might be produced with the application of Si TJs obtained by PRTD.

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