Printed Circuit Board Manufacturing Research Articles

Effect of Electroplating Current on Surface Morphology and Thickness of Plated-Through Hole (PTH) in Multilayer Printed Circuit Board (PCB)

Multilayer printed circuit board (PCB) consists of many layers in PCB. In order to connect one layer to other layers is needed plated-through-hole (PTH). PTH is commonly formed from the copper metal using some methods such as electroplating or electroless plating. Electroplating is method which there is adhering process the copper metal using the electrical current. This method is easy and cheap in PCB manufacture. One of the important part of electroplating result is surface morphology and thickness of PTH in multilayer PCB. The objective of this study is to im the electroplating current in electroplating process to learn more about the effect of electroplating current against the surface morphology and thickness of PTH.. The electroplating current applied in this experiment is at 5 A, 10 A, 15 A, and 20 A. In this research is also used Scanning Electron Microscopy (SEM) and Energy Dispersive X-Ray Spectroscopy (EDS) to characterize the formed PTH in multilayer PCB. The results shows that the PTH was successfully formed in through hole of multilayer PCB. The thickest PTH is about 37.8 μm for the applied current 20A and the smoothest morphology of PTH cross section is at the electroplating current 15 A.

A High-Precision Absolute Angular Position Sensor With Vernier Capacitive Arrays Based on Time Grating

This paper presents a high-precision absolute capacitive angular position sensor based on time grating. The sensor includes two single ring incremental type sensors arranged as outer and inner rings of capacitive arrays forming $N$ and $N-1$ measurement periods, respectively. The outer ring incremental sensor is employed as a fine measurement component to provide high-precision angular displacement values. The phase difference between the two incremental sensors is employed as a coarse measurement component to achieve absolute angular positioning according to a measurement principle similar to that of a vernier caliper. The proposed design is validated and optimized via tests conducted for a prototype sensor with $N\,\,=180$ and a diameter of 154 mm fabricated using standard printed circuit board manufacturing technology. Based on these results, a differential induction electrode structure is proposed to greatly reduce the magnitude of crosstalk interference signals captured by the induction electrodes of one array produced by the lead wires of the excitation electrodes of the other array. The optimized sensor achieves absolute angular position measurements with an original measurement accuracy of ±2” over a full 360° measurement range. The proposed sensor has advantages of low cost, high measurement precision, simple positioning method, and ease of manufacture.

Air-plasma surface modification of epoxy resin substrate to improve electroless copper plating of printed circuit board

In this work, air plasma was employed to modify the surface of epoxy resin substrate for subsequent electroless copper plating. The influence of plasma modification on the interface performance of epoxy resin substrate was analyzed by multiple characterizations including morphological, chemical and surface tension-based measurements. The results show that the wettability and roughness of epoxy resin substrate are substantially increased after air plasma modification. The roughened shape and the oxidized chemical groups at surface are the major causes of modified interface properties of epoxy resin substrate. Subsequent electroless copper plating tests demonstrate that this air plasma treatment significantly improves the quality of copper deposition for printed circuit board manufacture.

Affordable Thin Lens Using Single Polarized Disparate Filter Arrays for Beyond 5G toward 6G.

This paper proposes a novel design approach for a thin lens with the aim of overcoming fineness limits in the commercial millimeter wave printed circuit board (PCB) manufacturing process. The PCB manufacturing process typically does not allow the fabrication of metallic patterns with a gap and width of less than 100 μm. This hampers expanding thin lens technology to 5G commercial applications, especially when such technology is considered for 60 GHz or higher frequency, which requires a finer gap and width of metallic traces. This paper proposes that problematic process conditions can be mitigated when a lens is designed by establishing single-polarized lumped element models where larger capacitance and inductance values can be obtained for the same patch and grid unit cells. While the proposed design technique is more advantageous at higher target frequencies, a 60 GHz application and a wireless backhaul system is selected because of a limited range of frequencies that can be measured by an available vector network analyzer. The required gap or width of metallic traces can be widened significantly by using the proposed single-polarized unit cells to acquire the same in-plane capacitance or inductance. This enables the lens operating at higher-frequency under the process limits in fabricable fine traces. Finally, the effectiveness of the simulated design procedure is demonstrated by fabricating a 60 GHz thin lens that can achieve a gain enhancement of 16 dB for a 4 × 4 patch antenna array with a gain of 16.5 dBi.

Pulse Electrodeposited Copper from Lean Electrolytes Containing Additives

Introduction The standard method to manipulate and control deposit properties during electroplating is through the use of chemical additives. Many of these additives are coming under increased scrutiny due to their impact on the environment. For example, the Printed Circuit Board (PCB) Industry typically requires plated copper to have low electrical resistance coupled with good mechanical properties. Such specific properties are imparted by using bespoke electrodeposition processes where acid concentration and metal ions are prescribed through experience, typically 2.0 M H2SO4, and 0.6 M CuSO4. In addition, small amounts of additives are used to tailor deposit properties. However, new government regulations and green chemistry principles requires the minimisation of both metal ions as well as additives. Some recent work has shown that that micro-scale copper features, such as those required in PCBs, can also be deposited using an acid-free electrolytes containing low concentrations of copper. In such a case, the additive content also needs changing so the deposit produced has the similar properties as that obtained in the standard process. In general, therefore, an examination of the effect of pulse deposition in electrolytes containing low concentration of metal ions and supporting electrolyte; i.e. lean electrolytes, is needed. Although there has been some research of the synergy between pulse deposition and additive action [1-2], few have interrogated if pulse currents or additive actions dominate the microstructural evolution of a plated material. Indeed, these two aspects will become more important for lean electrolytes, where fewer anions from the supporting electrolyte (SO4 2- for the case of copper deposition) adsorb on the electrode surface. From a practical point of view, the amount of additive needed in lean electrolytes needs to be ascertained, and its use needs to be justified as a method of optimization of the plated material. Indeed, pulsing current could play a major role in deposit modification when additive levels are low. Scope of the Presentation This work examines the effect of lowering additives, metal ions and supporting electrolyte on deposited copper. The electrolyte used contained only 0.1 M CuSO4 and varying amounts of additives provided by a standard supplier for PCB manufacturing. Films have been deposited from electrolytes containing different concentrations of additives ranging from 17% to 200% of the levels recommended by the supplier using pulse and direct currents. Copper films of 25 mm thickness have been plated on stainless steel substrates following the recommendations provided by IPC-TM-650 (IPC-TM stands for The Institute for Interconnecting and Packaging Electronic Circuits Testing Methods) standard [3]. Both direct and pulse currents have been used for deposition. Direct currents were fixed at 40% of the maximum plating rate (or limiting current) and pulse current parameters used a pulse on time of 100 ms and a duty cycle of 25%. The grain size and deposit microstructure were examined using electron backscatter diffraction (EBSD) and scanning electron microscopy (SEM), respectively. These parameters were chosen because defect free foils could be produced reproducibly using these conditions. Our results showed that current pulsing produced finer grains in the absence of additives; and as additive levels were increased the effect of current pulsing on deposit properties was less pronounced. The results indicate that foils produced by pulsing currents produced deposits with fewer inclusions or defects at grain boundaries. This could be due to the desorption of additives during the off-time. These results show that current pulsing may become more important when leaner electrolytes are used. References N Imaz, E Garcia-Lecina, C Suarez, JA Diez, J Rodriguez, J Molina, V Garcia-Navas. IMF. (2009) 87(2), 64.A Ibanez, E Fatas: Surf. Coat. Technol. (2005) 191, 7.ASTM E-345 Standard Test Methods of Tension Testing of Metallic Foil.

Label-Free Electrochemical Detection of S. mutans Exploiting Commercially Fabricated Printed Circuit Board Sensing Electrodes.

This paper reports for the first time printed-circuit-board (PCB)-based label-free electrochemical detection of bacteria. The demonstrated immunosensor was implemented on a PCB sensing platform which was designed and fabricated in a standard PCB manufacturing facility. Bacteria were directly captured on the PCB sensing surface using a specific, pre-immobilized antibody. Electrochemical impedance spectra (EIS) were recorded and used to extract the charge transfer resistance (Rct) value for the different bacteria concentrations under investigation. As a proof-of-concept, Streptococcus mutans (S. mutans) bacteria were quantified in a phosphate buffered saline (PBS) buffer, achieving a limit of detection of 103 CFU/mL. Therefore, the proposed biosensor is an attractive candidate for the development of a simple and robust point-of-care diagnostic platform for bacteria identification, exhibiting good sensitivity, high selectivity, and excellent reproducibility.

Design of UV LED illumination system for direct imaging lithography

UV LED, which can be used as the illumination source in the direct imaging (DI) exposure equipment, has the advantages of rich wavelengths and low cost. It has a good application prospect in the field of printed circuit board (PCB) manufacturing. In practical application, there are high requirements for output power density, stray light control, and luminance uniformity of DI system to improve the productivity and exposure performance. We present an optical structure of the illumination system for DI lithography to provide uniform illumination low stray light for digital micromirror device (DMD), which combines Kohler illumination and double telecentric imaging. In this design, the high luminance illumination can be obtained by LED etendue analysis, fly’s eye condenser is not needed, and the stray light on the DMD caused by light outside the effective angle of the LED can be mostly filtered out. Based on this idea, a lithographic illumination system with the numerical aperture of 0.1 is designed and fabricated for 0.95-in. DMD. According to experimental measurements, the effective illumination power is up to 10 W, the stray light accounts for 10.7%, and the illuminance uniformity is about 90%, which meet the requirements of DI lithography equipment used in PCB manufacturing.

Improvements of the Epoxy–Copper Adhesion for Microelectronic Applications

Upcoming electronic devices are required to be further miniaturized. The microelectronics industry and packaging technology focus efforts on optimizing adhesion between plated copper and printed circuit board (PCB) substrate (here epoxy/glass buildup composite), while keeping smooth surfaces for high-frequency application. We propose herein to review and deepen the basic understanding of the sequential buildup process employed worldwide for the past several decades for multilayered PCB manufacturing. This multiscale and interdisciplinary study aims to establish the relationships between degrees of precuring (α), oxidative etching (permanganate desmear wet treatment), and copper adhesion. The epoxy curing states on industrial coupons were evaluated by diffuse-reflectance infrared Fourier transform spectroscopy. Then, atomic force microscopy (AFM) described the desmear performances through topography evolution with α between the different sequence steps. Finally, polymer–copper adhesions were investigated b...

Influence of the PCB Manufacturing Process on the Measurement Error of Planar Relative Permittivity Sensors Up To 100 GHz

Accurate and precise knowledge of the relative permittivity of printed circuit board (PCB) materials is essential for the reliable design of high-frequency circuits. For simplicity reasons, planar, resonant permittivity sensors, which are directly integrated on the unknown PCB material, are widely used. However, the sensors are affected by the nonidealities of the copper-clad laminate and PCB manufacturing process, e.g., the difference in roughness between the top and bottom sides of each metal layer. This paper analyzes the influence of these nonidealities on the extracted relative permittivity values of different sensor geometries in microstrip and substrate integrated waveguide (SIW) technology up to 100 GHz. Microstrip resonators are very sensitive against the investigated nonidealities. Additional roughness measurements and more detailed simulation models cannot noticeably reduce the uncertainties. SIW cavity sensors are more robust, and simple modeling approaches lead to low uncertainties smaller than 0.05 for the whole frequency range from 10 to 100 GHz.

A Full 360° Measurement Range Liquid Capacitive Inclinometer With a Triple- Eccentric-Ring Sensing Element and Differential Detection Scheme

This paper proposes a low-cost and full 360° measurement range inclinometer based on fluidic motion. The inclinometer is fabricated using printed circuit board manufacturing techniques. The principle is via measuring two channels of capacitance changes between three plates, which are partially filled with nonconductive liquid to obtain two amplitude modulation quadrature signals as the resolver. In this inclinometer, the electrode subdivision is changed from the traditional radial direction to a circumferential direction by a triple-eccentric-ring sensing element to achieve full-range measurement capability from 0° to 360°. In addition, the application of a differential detection scheme leads to the dc capacitance C 0 being eliminated in the measurement, resulting a high voltage-to-capacitance ratio in a low voltage source requirement. Both analytical calculation and finite-element analysis verified the feasibility of the principle. Furthermore, nonlinear error simulation is conducted and the main effected reason is figured out. Finally, a prototype is fabricated and assembled. Experimental results show that sensor can measure the tilt angle in a range of 360°, with an accuracy of 0.1° and a resolution better than 0.01°.

Optimizing acid leaching of copper from the wastewater treatment sludge of a printed circuit board industry using factorial experimental design

Heavy metal containing sludge from printed circuit board production (PCB) is not only classified as hazardous waste, but also as a potentially valuable raw material for copper recovery. Since sludge leaching is a significant first step in copper extraction yield via hydrometallurgy, we assessed the optimum copper acid-leaching conditions using a Design of Experiment (DOE) approach (33 full factorial design) and the multiple response method called the desirability (D) function. The effects of acid concentration, the ratio of acid volume to sludge quantity (“L/S ratio”), and leaching time on copper-leaching efficiency were evaluated. The model equation derived using Minitab 17.0 predicts that copper-leaching efficiency can reach 97.0% at optimal values of 0.84 M sulfuric acid, L/S ratio of 100:1, and a leaching time of 80 min. Experiments verified a 96.8% ( $$\sigma = 0.4\% )$$ copper-leaching efficiency. The small discrepancy between predicted and experimental data showed that the DOE approach was a suitable tool for predicting leaching efficiency from PCB sludge by sulfuric acid.

Design chip position of printed circuit board based on particle swarm optimization

Printed Circuit Board (PCB) is a critical component in the IC packaging process. Manufactured PCBs are typically designed for use by a specific kind of chip and cannot be used for multiple chip types. However, allowing different kinds of chips to be served by a single PCB would greatly improve material preparation and production processes. However, the design and manufacturing of PCB for use in multiple chip types raises issues related to minimizing the use of gold wire. Traditional manual methods rely extensively on experience. This paper applies Particle Swarm Optimization (PSO) methods to identify optimal positioning with experimental results showing a 20% reduction of gold wire in multi-use PCB.

Direct Plating in Printed Circuit Board Manufacturing

Direct Plating in Printed Circuit Board Manufacturing

Improving the film-forming ability of BaTiO3/epoxy resin suspension by adjusting the solvent composition for the fabrication of embedded capacitance materials

Embedded capacitance materials (ECMs) are gradually taking the place of traditional discrete capacitors in the fabrication of high-end electronic devices. However, the exploration of suspensions with simple compositions and improved performance remains an important topic for the further development of ECMs. In this work, commonly used auxiliaries are not employed, and ethanol is added to a BaTiO3/epoxy resin ethyl acetate suspension, which improves the film-forming ability. The corresponding ECMs show increased mechanical and electrical performance due to the better dispersion of the BaTiO3 nanoparticles. The fabricated embedded capacitors have low tolerances and can pass reliability tests, which verifies their applicability in printed circuit board manufacturing.

Automated insertion of package dies onto wire and into a textile yarn sheath

Wider adoption of electronic textiles requires integration of small electronic components into textile fabrics, without comprising the textile qualities. A solution is to create a flexible yarn that incorporates electronic components within the fibres of the yarn (E-yarn). The production of these novel E-yarns was initially a craft skill, with the inclusion of package dies within the fibres of the yarn taking about 90 min. The research described here demonstrated that it is possible to produce E-yarns on an industrial scale by automating the manufacturing process. This involved adapting printed circuit board manufacturing technology and textile yarn covering machinery. The production process started with re-flow soldering of package dies onto fine multi-strand copper wire. A carrier yarn was then placed in parallel with the copper wire to provide tensile strength. The package die and adjacent carrier yarn were then encapsulated in a polymer micro-pod to provide protection from moisture ingress and from mechanical strain on the die and solder joints. The process was then completed by surrounding the micro-pod and copper interconnects with additional fibres, held tightly together with a knitted fibre-sheath. This prototype, automated production process reduced the time for embedding one micro-device within a yarn to 6 min, thus increasing the production speed, demonstrating that automation of the E-yarn production process is feasible. Prototype garments have been created using E- yarns. Further developments can include automated transfer of the yarn components from one stage of production to the next, enabling greater increases in speed of manufacture of E yarns.

Copper/Epoxy Joints in Printed Circuit Boards: Manufacturing and Interfacial Failure Mechanisms

Printed circuit boards (PCBs) have a wide range of applications in electronics where they are used for electric signal transfer. For a multilayer build-up, thin copper foils are alternated with epoxy-based prepregs and laminated to each other. Adhesion between copper and epoxy composites is achieved by technologies based on mechanical interlocking or chemical bonding, however for future development, the understanding of failure mechanisms between these materials is of high importance. In literature, various interfacial failures are reported which lead to adhesion loss between copper and epoxy resins. This review aims to give an overview on common coupling technologies and possible failure mechanisms. The information reviewed can in turn lead to the development of new strategies, enhancing the adhesion strength of copper/epoxy joints and, therefore, establishing a basis for future PCB manufacturing.

Metallographic Analysis during Multilayer Printed Circuit Board Production Quality Assurance with Interlayer Connections Composed of Radio-Electronic Systems

The current state of the high-tech radio-electronic industry, including special and dual-purpose products, is considered. The main causes of space electronics failures are revealed. The estimation of modern manufacturing technical requirements for printed circuit boards is given as one of the main reasons for failure. The combined method of defect study and production quality assurance of multilayer printed circuit boards with interlayer connections composed of complex radio-electronic systems is proposed.

Novel Formaldehyde-Free Electroless Copper for Plating on Next Generation Substrates

The deposition of electroless Copper on dielectric substrates and the subsequent electrolytic build-up of a thicker Copper layer are widely used steps within the production of modern Printed Circuit Boards (PCB), and while there have been numerous developments within PCB production, the current manufacturing technologies continue to be reliant on the autocatalytic deposition of Copper from a solution containing formaldehyde as the reducing agent, even though the chemistry is known to pose a risk to human health. Further, as the high volatility of formaldehyde generally increases the exposure to the hazard, it is understood that critical air concentrations can easily be exceeded. With this in mind it is clear that the development of environmental and user friendly electroless Copper baths has become a subject of importance. Nevertheless, the introduction of “green” plating chemistry into the market remains a challenge due to high industrial standards in terms of performance and cost-efficiency, which have been established by the conventional plating products and limit their replacement. In the case of the electroless Copper baths, formaldehyde-free alternatives have to show excellent substrate coverage with metal, provide coatings with high conductivity and uniformity and should lead to very good reliability results. Moreover, the solution, and final Copper layer have to function with the diverse range of dielectric materials that are currently employed. Due to application needs, there has been a shift within PCB design towards the use of very smooth substrate materials with low coefficients of thermal expansion. Such materials offer the opportunity for further miniaturization of circuits and are optimal for adoption within packaged die components (IC substrates). However, smooth substrate topographies typically lead to a limited adhesion of the electroless Copper layer, and increases the risk of delamination or blister formation. To prevent this, the properties of the metal film itself, as well as the chemical properties of the Copper bath, from which it is deposited, are critical, with a key factor being that the deposited layer is generated under internal tensile stress, as this has been shown to be of importance in reducing blister occurrence. While formaldehyde based plating solutions have been modified to satisfy this requirement through the adoption of additives and organic substances, there is still very little experience available regarding chemical approaches utilizing other reducing agents. Changing the reducing agent generally requires a complete redesign of the electroless system, including careful selection of the complexing agents and additives, readjustment of the chemical concentrations and optimization of the baths physical operating conditions. In this work we describe a new type of formaldehyde-free electroless Copper solution suitable for a broad set of applications and materials, and specifically the processing of next-generation substrates. This new plating solution has been successfully applied in both laboratory and production-scale environments, with its performance being evaluated and benchmarked against an existing formaldehyde-containing reference. The obtained metal layer has been characterized through a number of analytical techniques, including microscopy, XRF, SEM, adhesion tests as well as non-blister performance. Based on the data obtained we believe that the newly developed solution utilizing a non-formaldehyde reducing agent provides a suitable technology for PCB production without a loss of process performance, and thus provide a sustainable “green” alternative to the industry.

Multi-Level Planning and Scheduling for Parallel PCB Assembly Lines Using Hybrid Spider Monkey Optimization Approach

Printed circuit board (PCB) assembly lines are significant to produce a variety of electronic products. PCB manufacturing industries tend to move towards automated and complex manufacturing system due to an increase in the customer demand for more sophisticated products. PCB assembly process involves highly interrelated levels of planning and scheduling problems. Therefore, the current research investigates multi-level planning and scheduling of PCB assembly lines, which include line assignment to the PCB models, component allocations to machines, and component placement sequencing by machines on PCB boards. A mixed integer-programming model is developed to integrate the planning and scheduling problem of parallel PCB assembly lines to maximize the net profit. A hybrid spider monkey optimization (HSMO) algorithm is proposed to solve the multi-level planning and scheduling problem. The performance of the proposed HSMO algorithm is compared to artificial bee colonial (ABC), genetic algorithm (GA), particle swarm optimization (PSO), and simulated annealing (SA) algorithms. Moreover, the proposed HSMO algorithm is validated against ABC, GA, PSO, and SA algorithms with the case problem taken from well-reputed PCB manufacturing industry in China. The computation experiments indicate that the proposed HSMO algorithm can achieve good near-optimal solutions when compared with the other-mentioned four algorithms based on performance and efficiency for benchmark problems and real case problem.

The Printed-Circuit-Board Electroplating Parallel-Tank Scheduling With Hoist and Group Constraints Using a Hybrid Guided Tabu Search Algorithm

Current research investigates a parallel-tank scheduling problem with hoist and group constraints in printed-circuit-board (PCB) electroplating environment, where the hoist is used as a material handling device and PCBs need to be grouped for further processing. The purpose of the current research is to minimize the makespan and total weighted tardiness of PCB products. The weighted ideal point method is used to combine these two objectives into a single optimization objective. Moreover, a mixed integer programming model is developed to formulate the problem. Since the problem is proved to be NP-hard, a hybrid guided tabu search (HGTS) algorithm is proposed to optimize the objectives. A heuristic method based on small combination sequences called SCS is applied to search the better initial solution. Moreover, a problem-oriented guided neighborhood move strategy is adopted to improve the search efficiency in the proposed HGTS algorithm. The experiments are conducted on different size of problem instances. The performance of the proposed HGTS algorithm is investigated and compared with other existing algorithms. The detailed results indicate that the proposed HGTS algorithm performs better both in objective value and convergence speed. Finally, a real-world case is solved by the proposed HGTS, which validates that the proposed algorithm is effective and useful in solving the practical electroplating scheduling problem.