Polysilicon TFT Research Articles

Characteristics of high mobility polysilicon thin-film transistors using very thin sputter-deposited SiO/sub 2/ films

Polysilicon thin-film transistors with various gate oxide thicknesses ranging from 94 to 7 nm using sputter-deposited SiO/sub 2/ films were fabricated and their electrical characteristics were studied to explore the possibilities of enhancing the TFT characteristics by scaling down the gate oxide thickness. It was found that the threshold voltage and the subthreshold slope decrease linearly as the gate oxide thickness is reduced while the field effect mobilities stay constant. The breakdown electric field of the gate oxide increases as the gate oxide thickness decreases and is over 10 MV/cm when the thickness is less than 20 nm. The polysilicon TFT with the 7-nm gate oxide, the thinnest in this work, showed excellent characteristics: threshold voltage of 0.44 V, subthreshold slope of 110 mV/dec, field effect mobility of 97 cm/sup 2//Vs.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

The Low Temperature Polysilicon TFT Technology for Manufacturing of Active Matrix Liquid Crystal Displays

AbstractThe amorphous silicon thin transistor (a-Si TIFT) has successfully industrialized the active matrix liquid crystal displays (AMLCDs), which would get a vast market on the basis of their wide potential use for displays. Whereas, the polysilicon TFT (p-Si TFT) also has been intensely investigated and intended to realize smarter AMLCDs, with monolithic peripheral circuits.In this paper, we will discuss the applicable range of low temperature p-Si TFTs compared with high temperature p-Si TFTs. After reviewing the materials which comprise low temperature p-Si TFTs, we will introduce our self aligned aluminum gate process which could allow fast addressing even in enlarged AMLCDs in the future.

Signal readout in a-Si:H pixel detectors

A switch consisting of two a-Si:H p-i-n diodes was studied to read out signals from pixels for the imaging of X-ray or gamma ray distributions. A charge storage time of 20 ms and a readout time of 0.7 mu s were achieved. For the detection of single ionizing particles, polysilicon thin-film-transistor amplifiers can be integrated to amplify the small signals at the pixel level before readout. Prototype polysilicon TFT amplifiers were designed and fabricated. The measured gain-bandwidth product was approximately 300 MHz, and the input equivalent noise charge was approximately 1000 electrons for a 1- mu s shaping time.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A 10-s doping technology for the application of low-temperature polysilicon TFTs to giant microelectronics

A bucket-type high-density (0.25-1.2-mA/cm/sup 2/) low-energy (500-2000 V) ion source was utilized for high-speed phosphorus doping directly into a thin polysilicon layer without cap SiO/sub 2/. Doping gas with He dilution was selected to reduce etching of polysilicon film. Excimer laser (XeCl, 8 mm*8 mm) pulse annealing was introduced to activate effectively the doped impurity. The combination of these techniques provided a practically low sheet resistance for the TFT source, drain, and gate with a short time doping. The low-temperature polysilicon TFT fabricated with a doping time of 10 s had characteristics comparable to those of that fabricated by a longer time doping or conventional ion implantation, showing the practicality of this technology and its promise for giant microelectronics. >

Circuit performance of low temperature CMOS polysilicon TFT operational amplifiers

CMOS polysilicon TFT opamps have been designed and fabricated on glass by a low temperature (620°C) process. A poly-Si SPICE circuit model is employed to optimise bias conditions. Results of tested opamps are presented.

Polysilicon TFT circuit design and performance

Both n- and p-channel polysilicon TFTs can be fabricated, allowing CMOS circuit techniques to be used. However, TFT characteristics are poor in comparison to conventional single-crystal MOSFETs, and relatively coarse design rules must be used to be compatible with processing on large-area glass plates. The authors examine these issues and describe the performance of a range of digital and analog circuit elements built using polysilicon TFTs. Digital circuit speeds in excess of 20 MHz are reported, along with operational amplifiers with over 80 dB of gain and more than 1-MHz unity-gain frequency. Several polysilicon TFT switched-capacitor circuits are also reported and shown to have adequate linearity, output swing, and settling time to form integrated data line drivers on an active-matrix liquid crystal display. >

Polysilicon thin Films and Devices Produced by Low-Temperature (600°C) Furnace Crystallisation of Hydrogenated Amorphous Silicon (a-Si:H)

ABSTRACTIn this work, we report on the electronic properties of polysilicon thin films and devices realised via furnace crystallisation of undoped a-Si: H. The onset of crystallisation, degree of amorphisation and average grain size are determined by UV reflectivity and electron microscopy. Grain size is found to increase with decreasing a-Si:H substrate temperature, and a maximum areal grain size of 0.4μm2 is obtained. Optical absorption, DC conductivity and transient photoconductivity measurements are employed to examine carrier transport mechanisms. We observe a Meyer-Neldel relationship between the DC conductivity prefactor σ0 and activation energy Eσ. A plasma hydrogenation treatment of the as-crystallised films results in an order of magnitude increase in the DC conductivity and a similar increase in photoconductivity. This is consistent with a shift of the Fermi level position 0.06 eV towards the conduction band. Additionally, analysis of the transient photoconductivity infers a reduced density of states. We discuss the implications of our results for polysilicon TFT optimisation.

Passivation kinetics of two types of defects in polysilicon TFT by plasma hydrogenation

The effects and kinetics of hydrogen passivation on polycrystalline-silicon thin-film transistors (poly-TFTs) are investigated. Based on the response of device parameters with the progress of hydrogenation, two types of defects can be distinguished from the difference in passivation rate. The threshold voltage and subthreshold slope, which are strongly influenced by the density of dangling bond midgap states, have a faster response to hydrogenation. The off-state leakage current and field-effect mobility, related to stain-bond tail states, respond more slowly to hydrogenation, with an onset period of approximately 4 to 12 h depending on the grain size. Since the larger-grain-size samples showed a longer onset period, the contribution of intragranular defects to the strain-bond tail states appears to be significant.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A simpler 100-V polysilicon TFT with improved turn-on characteristics

An improved polysilicon high-voltage thin-film transistor (HVTFT) structure for eliminating the current-pinching phenomenon often observed in the conventional offset-gate polysilicon HVTFTs is discussed. The device employs, in lieu of implantation, a metal field plate overlapping the entire offset region to control the conductivity of the offset region. By properly biasing the field plate to distribute the drain electric field at both ends, high-voltage operation of up to 100 V, suitable for many large-area applications, is achieved. Good turn-on characteristics without current pinching effects are consistently obtained. The structure also eliminates the lightly doped drain implant required in conventional offset-gate HVTFTs, resulting in a simpler and more reproducible process. >

Effects of trap-state density reduction by plasma hydrogenation in low-temperature polysilicon TFT

The reduction of trap-state densities by plasma hydrogenation in n-channel polysilicon thin-film transistors (poly-TFTs) fabricated using a maximum temperature of 600 degrees C has been studied. Hydrogenated devices have a mobility of approximately 40 cm/sup 2//V*5, a threshold voltage of approximately 2 V, an inverse subthreshold of approximately 0.55 V/decade, and a maximum on/off current ratio of 5*10/sup 8/. The effective channel length decreases by approximately 0.85 mu m after a short hydrogenation which may be attributed to the activation of donors at trap states near the source/drain junctions. Trap-state densities decrease from 1.6*10/sup 12/ to 3.5*10/sup 11/ cm/sup -2/ after hydrogenation, concomitant with the reduction of threshold voltage. Using the gate lengths at which the trap-state densities deviate from the long-channel values as markets for the leading edge of passivation, the apparent hydrogen diffusivity is found to be 1.2*10/sup -11/ cm/sup 2//s at 350 degrees C in the TFT structure. >

Polysilicon Super Thin Film Transistor Technology

ABSTRACTAdvanced super thin(of less than 800Å) polysilicon films with the grain size of more than lum were developed by applying the Si+implanted amorphization and subsequent annealing. With this film, TFT with superior characteristics could have been fabricated on quartz or SiO2/c-Si substrate. At the process of 600°C, field effect electron mobility as large as 60cm 2/V.s. was obtained. Furthermore, using the high temperature process of 1000°C, electron and hole mobility increased to the value of 120 and 80cm2/V.s, respectively. The values of field effect electron mobility were almost constant over a wide temperature range. The CMOS scanner was fabricated and operated faster than 5MHz. These advanced polysilicon TFT's have a great impact on large size LSI.

Hydrogenation of Polysilicon TFT's by Silicon Nitride

Hydrogenation of Polysilicon TFT's by Silicon Nitride

Fabrication of High Voltage Polysilicon TFT's on an Insulator

Using thin film transistors in active‐matrixed addressed large area displays has recently become important in display development. Specifically, a PLZT ceramic dot‐matrix display requires high voltage TFT pixel switching. To meet the need, a process has been developed utilizing polysilicon and temperatures less than 850°C, which yields MOSFET's capable of operating at voltages in excess of 50V with high ratios. High mobilities are obtained by fabricating n‐channel, accumulation‐mode devices in silicon deposited in the amorphous state and later annealed to the final polycrystalline condition.

(Invited) Silicon TFTs for Flat Panel Displays

A general investigation of flat panel displays, leads to the conclusion that an electrooptic transducer (liquid crystal for instance) operates in optimized conditions when directly driven by an active matrix system. Such a matrix can be fabricated by different procedures, but one of the most promising is the a-Si TFT technology. a-Si TFT seems quite suitable for LC driving, nevertheless polysilicon TFT should be preferred for fast peripheral addressing circuits. Two basic TFT processes are proposed, using a-Si and SiO2 films deposited on glass by the glow discharge technique. In the first process, silicon was deposited at 300°C instead of 500°C in the second. Only in this last case silicon could be easily recrystallized to get polysilicon TFT on glass. In this paper, the major attention was focused on amorphous Si TFT. Static and dynamic characteristics are presented putting forward the predominant role of traps, and a LC switching simulation is shown. Finally a large area circuit is proposed and the relevant problems discussed.

Silicon TFTs for flat panel displays

Liquid crystal displays work best when directly driven by an active matrix system. Such matrices can be made in different ways, but one of the most promising is the amorphous silicon thin film transistor (a-Si TFT) technology. Although an a-Si TFT technique seems quite suitable for LCD drives, polysilicon TFTs should be preferred for fast peripheral addressing circuits. Two basic TFT processes are proposed, using a-Si and SiO 2 films deposited on glass by the glow discharge technique. Silicon was deposited at 300°C in the first process and at 500°C in the second. Only in this latter case could silicon be easily recrystallized to give a polysilicon TFT on glass. This paper devotes most of its attention to the amorphous Si TFT. Static and dynamic characteristics are presented emphasizing the predominant role of traps, and a LC switching simulation is demonstrated. Finally a large area circuit is proposed and its problems discussed.