Plasma Nitrided Oxide Research Articles

Reduction of Random Noise in Complementary Metal Oxide Semiconductor Image Sensors by Gate Oxide Interface Control

Techniques to reduce random noise in complementary metal oxide semiconductor (CMOS) image sensor chips with pixel sizes as small as 2.2 ×2.2 µm2 are addressed. By applying dummy heat annealing and plasma nitrided (PN) oxide, random noise can be reduced by more than 40%. Measured results indicate that the gate oxide–Si interface is improved by a dummy heat treatment, and PN oxide is a good choice as a gate oxide for image sensors, since it has an optimal nitrogen profile as a gate oxide while it effectively suppresses boron penetration. The results show the importance of nitrogen profile control in gate oxides and of oxide curing for low noise characteristics in CMOS image sensors.

Reliability Scaling Limit of 14-Å Oxynitride Gate Dielectrics by Different Processing Treatments

Various ultrathin oxynitride gate dielectrics of similar thickness processed by a rapid thermal NO-nitrided oxide (RTNO), a remote plasma nitrided oxide (RPN), a remote plasma nitridation of oxide with rapid thermal NO annealing , and a rapid thermal reoxidation of remote plasma nitrided oxide (ReoxRPN) are reported for the first time as a means to extend the reliability scaling limit of /oxynitride-based gate dielectrics. The gate dielectric films show superior interface properties, significantly reduced leakage current, and improved reliability compared to other gate dielectrics fabricated by different processes.

Comparison of electric properties of ultra-thin thermal and plasma nitrided silicon oxides with different post-deposition treatments using C-AFM

The electrical quality of ultra-thin (∼1nm) Plasma and Thermal nitrided silicon oxide layers was investigated with Conductive AFM and a macroscopic I-V measurement setup. PN layers were found to be superior to TN layers. A longer nitridation time resulted in a better quality of the layer. Annealing in N2 was not beneficial and re-oxidation resulted in a lower leakage due to a significant increase in the physical thickness. A trap-assisted kind of tunneling was observed in these layers. The exact role of nitrogen herein is not yet well understood.

Plasma-nitrided silicon-rich oxide as an extension to ultrathin nitrided oxide gate dielectrics

We have investigated the mechanism of N incorporation, during plasma nitridation, in thermally grown ultrathin (<2nm)SiO2 films and deposited silicon-rich oxide films. X-ray photoelectron spectroscopy analysis indicates that N atoms exchange mainly with O to bond with Si atoms in ultrathin plasma-nitrided oxides. Based on this understanding, we were able to increase the amount of N that can be incorporated in plasma-nitrided silicon oxides by increasing the silicon content in these films. This was achieved by depositing ultrathin substoichiometric silicon-rich oxide films. We demonstrate an increase of almost twice as much N in these ultrathin plasma-nitrided silicon-rich oxide films yielding lower gate leakage current for a given thickness.

Direct observation of interstitial molecular N2 in Si oxynitrides

High-resolution near edge x-ray absorption spectroscopy and x-ray photoelectron spectroscopy were used to characterize ultrathin plasma-nitrided silicon oxides. The direct observation of interstitial molecular N2 was made by vibrationally resolved N K-edge absorption spectroscopy. The N2 molecules were trapped during the plasma nitridation at the near surface and could be eliminated by annealing via molecular out-diffusion.

A Unique Dual-Poly Gate Technology for 1.2-V Mobile DRAM with Simple In situ n<tex>$^+$</tex>-Doped Polysilicon

Highly manufacturable sub-100-nm 1.2-V mobile dynamic random access memory (DRAM) having full functionality and excellent reliability have been successfully developed. A unique and simple DRAM technology with dual-gate CMOSFET was realized using plasma-nitrided thin gate oxide and p/sup +/ poly gate formed by BF/sub 2/ ion implanted compensation of in situ phosphorus (n/sup +/) doped amorphous silicon gate. Using this technology, boron penetration into the channel, gate poly depletion, and dopant interdiffusion between n/sup +/- and p/sup +/-doped WSi/sub x/-polycide gates were successfully suppressed. In addition, a negatively biased word line scheme and a storage capacitor with laminated high-/spl kappa/ Al/sub 2/O/sub 3/ and HfO/sub 2/ dielectrics were also developed to achieve mobile DRAM operating at 1.2 V with excellent performance and reliability.

Effects of plasma nitridation on ultra-thin gate oxide electrical and reliability characteristics

The gate leakage current and reliability concern become more serious due to the aggressive scaling-down of the gate oxide thickness. In this paper, the gate leakage current reduction and reliability optimization with an EOT 15A plasma nitrided gate oxide were explored. The plasma nitrided oxide fabricated by plasma nitridation process demonstrated good gate leakage reduction and high carrier mobility without sacrificing the reliability performance. The optimization of nitrogen profile and post nitridation annealing has been also discussed.

Anticipation of nitrided oxides electrical thickness based on XPS measurement

Plasma nitridation of thermally grown oxide films has proven to be an excellent gate dielectric in meeting the electrical requirements of the 65 nm node. As the 65 nm device performance is very sensitive to both physical thickness and nitrogen dose of these dielectric films, it is highly desirable to predict the electrical properties of such films. We present a simple physical model to forecast the capacitance-equivalent thickness (CET) of nMOS devices for 65 nm technology. The model is based on the total nitrogen dose and the dielectric physical thickness, both given by in-line X-ray photoelectron spectroscopy (XPS) measurement of the plasma nitrided gate dielectric. This model uses an estimated gate oxide dielectric constant, the gate depletion capacitance and the inversion layer capacitance. A good correlation is obtained between calculated and measured CET for plasma nitrided oxides from 19 to 30 Å CET and for a large range of incorporated nitrogen doses.

Thermal stability of plasma-nitrided aluminum oxide films on Si

The effect of post-deposition rapid thermal annealing in vacuum and in dry O2 on the stability of remote plasma-assisted nitrided aluminum oxide films on silicon is investigated. The areal densities of Al, O, N, and Si were determined by nuclear reaction analysis and their concentration versus depth distributions by narrow nuclear reaction resonance profiling, with subnanometric depth resolution. Annealing in both vacuum and O2 atmospheres produced partial loss of N from the near-surface regions of the films and its transport into near-interface regions of the Si substrate. Oxygen from the gas phase was incorporated in the AlON films in exchange for O and N previously existing therein, as well as in the near-interface regions of the Si substrate, leading to oxynitridation of the substrate. Al and Si remained essentially immobile under rapid thermal processing, confirming that the presence of nitrogen improves the thermal stability characteristics of the AlON/Si structures in comparison with non-nitrided Al2O3/Si.

Enhanced negative substrate bias degradation in nMOSFETs with ultrathin plasma nitrided oxide

The degradation induced by substrate hot electron (SHE) injection in 0.13-/spl mu/m nMOSFETs with ultrathin (/spl sim/2.0 nm) plasma nitrided gate dielectric was studied. Compared to the conventional thermal oxide, the ultrathin nitrided gate dielectric is found to be more vulnerable to SHE stress, resulting in enhanced threshold voltage (V/sub t/) shift and transconductance (G/sub m/) reduction. The severity of the enhanced degradation increases with increasing nitrogen content in gate dielectric with prolonged nitridation time. While the SHE-induced degradation is found to be strongly related to the injected electron energy for both conventional oxide , and plasma-nitrided oxide, dramatic degradation in threshold voltage shift for nitrided oxide is found to occur at a lower substrate bias magnitude (/spl sim/-1 V), compared to thermal oxide (/spl sim/-1.5 V). This enhanced degradation by negative substrate bias in nMOSFETs with plasma-nitrided gate dielectric is attributed to a higher concentration of paramagnetic electron trap precursors introduced during plasma nitridation.

Investigation of boron penetration through decoupled plasma nitrided gate oxide using backside secondary ion mass spectrometry depth profiling

High drive-in temperature during dopant activation of p+-poly metal-oxide-semiconductor field effect transistors causes boron penetration through the thin gate oxide, which degrades the device performance. Conventional secondary ion mass spectrometry (SIMS) depth profiling is unable to accurately analyze boron penetration under rapid thermal annealing conditions due to ion knock-on and mixing effects. With the development of backside SIMS depth profiling technique using SOI wafers [Yeo et al., Surf. Interface Anal. 33, 373 (2002); Runsheim et al., J. Vac. Sci. Technol. B 20, 448 (2002)], quantification of the amount of boron penetration becomes possible. In this article, boron penetration through decoupled plasma nitridation silicon dioxide was studied by performing both front and backside depth profiling using 0.5 keV O2+ with oxygen flooding and 2 keV Cs+ primary ions at oblique incidence in a Cameca IMS-6f SIMS instrument.

Suppression of Nitridation-Induced Interface Traps and Hole Mobility Degradation by Nitrogen Plasma Nitridation

The impact of nitrogen plasma nitridation on the interfacial quality of ultrathin oxides (1.8 and 2.6 nm) have been investigated and compared with NO nitridation. It is found that plasma-nitrided oxides are more immune to nitridation-induced degradation of channel hole mobility, and have lower intrinsic interface-trap density as compared to NO-nitrided oxides. In addition, plasma-nitrided oxides can further suppress hole mobility degradation induced by boron penetration. The superior performance of nitrogen plasma nitridation is attributed to its capability of incorporating a high level of nitrogen at the top oxide surface, while keeping the interface intact. © 2002 The Electrochemical Society. All rights reserved.

Origins and effects of radical-inducedre-oxidation in ultra-thin remote plasma nitrided oxides

The physical and electrical properties of ultra-thin remote plasma nitrided oxides (RPNO) in the 10 to 30 /spl Aring/ range were extensively investigated. Experimental results show that a significant physical thickness increase is observed in RPNO with base oxide less than 20 /spl Aring/ owing to the penetration of nitrogen radicals. Thinner base oxides result in worse equivalent oxide thickness (EOT) scalability, thus leading to /spl sim/14 /spl Aring/ manufacturability EOT limit for RPN gate dielectrics.

Thermally-enhanced remote plasma nitrided ultrathin (1.65 nm) gate oxide with excellent performances in reduction of leakage current and boron diffusion

Ultrathin thermally enhanced remote plasma nitrided oxides (TE-RPNO) with equivalent oxide thickness down to 1.65 nm are fabricated to investigate their leakage current reduction and boron diffusion barrier performances. A PMOSFET with TE-RPNO, compared to its conventional oxide counter-part, yields almost one order magnitude lower gate leakage current, less flatband voltage changes in high boron implantation dose or activation temperature, and shows broader process windows in the tradeoff between boron penetration and dopant activation.

Electrical characterization of metal–oxide–semiconductor capacitors with anodic and plasma-nitrided oxides

We have studied two novel techniques that should inherently be more uniform than current mainstream processes used to produce silicon dioxide or nitrided-oxide gate insulators. Anodic films were fabricated by anodizing Si wafers in HCl solutions, and thermal oxide films were nitrided in N2O plasmas produced with an electron-cyclotron resonance source. Using typical polysilicon-gate test structures, the electrical characteristics are obtained and compared to thermal oxides. Both techniques can produce thin films (<15 nm thick) with interface state densities and leakage currents initially comparable to their thermal oxide counterparts, if the films are subjected to rapid thermal annealing at temperatures of 950 °C. The annealed films are subjected to high-field (⩾8 MV/cm) Fowler–Nordheim stress and the buildup of trapped charge is monitored as a function of time. Anodic films are found to have moderately higher bulk and interface trap generation rates than the thermal control. Thinner anodic oxides, which were grown at slower rates, had better properties than thicker anodic oxides, suggesting that even slower growth rates could yield anodic oxides with improved electrical properties.

Remote Plasma Nitridation of In-Situ Steam Generated (ISSG) Oxide

ABSTRACTElectrical performance of in-situ steam generated (ISSG) oxide nitrided using remote plasma nitridation (RPN) has been evaluated. An equivalent oxide thickness (EOT) of 1.6 nm with gate leakage current around 5×10−3 A/cm2 (at −1.5V) has been achieved. The leakage current of remote plasma nitrided ISSG oxide is lower than that of ISSG only, where more than one order of magnitude leakage current reduction (at the same EOT) has been achieved for some RPN conditions. Moreover, it is observed that the extent to which the RPN process conditions modify device parameters such as EOT, flatband voltage (VFB), and time-to-breakdown (tbd) increases with decreasing ISSG thickness. The thinner ISSG oxides appear to be more susceptible to plasma damage and accumulation of positively charged nitrogen atoms at the oxide/Si interface. Therefore, RPN processes that use lower temperature and shorter time are preferred for very thin oxides. The nitrogen content and profile in the samples evaluated using SIMS analysis, indicate that RPN offers higher nitrogen content and better nitrogen profile compared to conventional nitrogen incorporation methods such as NO annealing [1].

Remote plasma nitridation, deuterium anneal and pocket implant effects on NMOS hot carrier reliability

Abstract There are several advanced processes which are being actively studied as candidates for sub-0.25 μm technology. This paper studies the effects on NMOS hot carrier reliability from remote plasma nitrided oxide (RPNO), deuterium anneal and pocket implant. It is found that RPNO will not affect the SiO 2 /Si interface. The hot carrier reliability is better for the same device channel current. This is due to making the effective oxide thickness thinner and achieving the same drive current with longer channel length. The deuterium anneal can improve the hot carrier reliability, even with nitride sidewall, if proper annealing is done. While the pocket implant can reduce short channel effects, the hot carrier lifetime is degraded unless optimization is done.

A comparison of SiSiO 2 interface trap properties in thin-film transistors with thermal and plasma nitrided oxides

In this work, electrical properties of the SiSiO 2 interface have been investigated in terms of interface-trap parameters (emission time, capture cross-section, state density) by standard and three-level charge pumping techniques in n-channel thin-film (8 nm) metal-oxide-semiconductor field-effect transistors. Some of the devices have been nitrided in an ammonia plasma reactor and reoxidized in oxygen. For nitrided devices, a significant decrease of interface state density, D it, has been observed as compared with pure oxide devices. This reduction clearly corresponds to both an uniform decrease of D it over the silicon band gap and a decrease of a D it peak in the upper part of the band gap. The evolution of capture cross-sections has been also monitored and found to significantly vary for electron traps. This substantial change in electron interface-trap properties could be at the origin of the augmentation of the high field transconductance observed for these n-channel devices after such a nitridation process.

Effect of 60Co irradiation and Fowler-Nordheim injection on MOS capacitors with thin plasma nitrided gate oxides

We have investigated the generation of interface traps during 60Co irradiation and Fowler-Nordheim (FN) injection in MOS structures with thin plasma nitrided gate oxides. By using deep level transient spectroscopy and capacitance-voltage measurements, we have studied the impact of nitridation time on the creation of fast and slow states in the silicon bandgap. After FN injection, electrical relaxation of the interface has been interpreted as the superposition of two mechanisms: an irreversible physico-chemical time-dependent transformation and a reversible bias-dependent neutralization.

Generation of electronic states at the silicon oxynitride-silicon interface in MOS structures

The energy distribution of interface states at the insulator-silicon interface has been investigated as a function of the injected charge for standard SiO2 and plasma nitrided oxides in MOS structures. For the nitrided samples, a lower rate of surface state generation and the absence of the midgap peak known in standard oxides was observed.