Phase-locked Loop Research Articles

Paired-subcarrier equalization for phase noise and transmitter IQ skew in digital subcarrier multiplexing system

The digital subcarrier multiplexing (DSCM) transmission scheme is expected for future ultra-large baud rate transmission. However, the phase noise and transmitter (Tx) IQ skew tolerance are decreased due to the narrow sub-band transmission and conjugated interference from symmetric subcarrier. In this paper, we propose a paired-subcarrier equalization scheme to jointly mitigate the phase noise and Tx IQ skew. We use a phase locking loop (PLL) embedded 4 × 4 MIMO equalizer to simultaneously realize polarization demultiplexing, phase noise and Tx IQ skew compensation. The 4 × 4 MIMO can deal with the paired-subcarrier interference in the DSCM transmission. Besides, since the inner subcarrier suffers smaller interference from its symmetric subcarrier, we estimate the phase noise by inner subcarriers and share the phase noise information with other subcarriers to reduce the overall complexity. Through simulations of 100-GBaud 64-QAM DSCM coherent optical fiber transmission consisting of eight 12.5-Gbaud subcarriers and experiment of 10-GBaud four-subcarriers PM-16QAM transmission, we find that the PLL embedded equalizer for DSCM scheme exhibits better skew and phase noise compensation ability compared with other equalizers. Additionally, we compare the performance of single-carrier and DSCM schemes with the proposed equalizers in simulation. The influence of phase noise and Tx IQ skew on DSCM transmission can be largely relaxed.

Grid integrated multifunctional EV charging infrastructure with improved power quality

This paper presents a grid integrated multifunctional electric vehicle (EV) charging infrastructure to power the EV batteries and simultaneously improve grid power quality. The EV charger control function is designed to operate the charger in grid-to-vehicle (G2V), vehicle-to-grid (V2G), and proposed active-filtering-mode (AFM) operating modes. In AFM mode, the proposed self-tuning filter (STF) based control algorithm effectively compensates the grid current harmonic distortions arising from nonlinear charging station load. Furthermore, the charger controller uses STF to estimate the synchronizing voltage templates for reference current generation instead of conventional phase-locked-loop (PLL) and second-order generalized integrator (SOGI) to address the nonideal grid voltage conditions. The charger controller is designed to operate in AFM operating mode simultaneously with G2V and V2G operating modes. Furthermore, to achieve these multifunctional operations in a single charger, the power electronics circuitry of the charger is developed by using an AC/DC voltage source converter and a DC/DC dual active bridge (DAB) converter. The embedded isolation in the DAB converter ensures the safety of the EV batteries from the disturbance in the AC and DC side of the charger. Furthermore, a 3.6 kVA EV charger prototype is developed in the laboratory to show the effectiveness of the control techniques.

Impedance-Based Stability Analysis of Grid-Connected Inverters under the Unbalanced Grid Condition

As a common interface circuit for renewable energy integrated into the power grid, the inverter is prone to work under a three-phase unbalanced weak grid. In this paper, the instability of grid-connected inverters under the unbalanced grid condition is investigated. First, a dual second-order generalized integrator phase-locked loop (DSOGI-PLL)-based inverter under balanced and unbalanced conditions is modeled. A fourth-order impedance model is established to describe its impedance characteristics under the unbalanced grid condition. To analyze this multi-input multi-output system, a simplified stability analysis method based on the generalized Nyquist stability criterion and matrix theory is proposed. Then, the influences of circuit and control parameters on the stability of the grid-connected inverter system under the unbalanced grid condition are investigated. Finally, the accuracy of the derived frequency-coupled impedance model is verified via simulations, and the effectiveness of the proposed simplified stability analysis method on the system stability analysis is verified via both simulations and hardware experiments.

A fast-locking low-reference spur cascaded PLL with gate-diffusion input-based phase detector and pulse width amplifier

ABSTRACT This paper presents a newly proposed high-order cascaded phase-locked loop using a type-I phase-locked loop in the second stage. The type-I phase-locked loop includes a gate-diffusion-input-based phase detector and pulse width amplifier that leads to breaking the trade-off between reference spur and locking time. Moreover, a type-I phase-locked loop deploys a pulse width amplifier after a gate-diffusion-input-based phase detector with variable gain to amplify the phase error between the reference clock and the output of the voltage-controlled oscillator. The proposed architecture has been implemented in a 180-nm semiconductor laboratory CMOS technology. The proposed fifth-order cascaded phase-locked loop achieves the reference spur of −77 dBc, while the conventional first-stage charge-pump-based phase-locked loop achieves −59.7 dBc. It measures the 1.2 s settling time, whereas conventional first stage charge-pump-based phase-locked loop measures 2.4 s settling time. The cascaded phase-locked loop operates at 2.4 GHz output frequency, and the simulated phase noise at 1 MHz offset frequency is −105.4 dBc/Hz. It consumes 5.8 mW from a 1.8 V power supply.

Analysis of the transient dose rate effect on clock resources of JXCV5SX95T FPGA

This paper qualitatively investigates the transient dose rate effect (TDRE) on clock resources of the JXCV5SX95T FPGA, including DLL (Delay Locked Loop), PLL (Phase Locked Loop), and GCB (General Clock Buffer). Our previous experimental results showed that the sensitivity of different clock resources in the JXCV5SX95T FPGA presents prominent discrepancies. In particular, all input/outputs (IOs) present a simultaneous glitch during irradiations. And, the DLL and PLL would appear special short interrupt failures in some cases. However, the experimental results lack a mechanism analysis. In order to investigate the intrinsic mechanisms and in particular to compare the sensitivity differences between the PLL and DLL circuits, corresponding TCAD and SPICE simulations are performed. Both relevant DLL and PLL circuits are established in the SPICE simulator. The radiation-induced photocurrents are calculated by TCAD, and introduced into SPICE simulations. First, with an ideal power supply, the radiation performances of the DLL and PLL are simulated, and the influence of two factors are analyzed, including the substrate size of the TCAD model and the charge pump type of the DLL and PLL. Second, typical non-ideal power supply and IO models are used in the simulations. Simulation results indicate that the short interrupt of the PLL and DLL in experiments should result from the relevant power regulators in the FPGA. Last, piecewise linear voltage sources are applied to simulate the noise on the power supply in experiments, and their influence on the PLL, DLL, IOs are analyzed. Simulation results show that the simultaneous glitch in experiments may be mainly from the power supply noise, and the radiation effect of IOs would also contribute to this failure to some degree.

Decentralized Control for Multiple Network-Forming Inverters in a Solar PV-BESS Based Standalone Microgrid System

—This research paper focuses on decentralized control of an AC microgrid in standalone mode. The microgrid includes three solar PV arrays accompanied by three battery energy storage systems (BESS), utilizing renewable distributed energy resources (DERs). The connection between each DER system and the microgrid is established through a network-forming three-phase voltage source inverter (VSI). The microgrid’s operation is regulated using modified droop control, incorporating virtual impedance and feed-forward derivative in primary control, along with a phase-locked loop (PLL) system for inverter synchronization. A master-slave control configuration is employed between the VSIs to mitigate voltage amplitude and frequency deviations induced by primary control. These enhancements ensure smooth power distribution and maintain voltage amplitude and frequency within specified limits across different operational scenarios. Control operations are performed in a stationary frame ( frame) using Clarke’s transformation, and PR controllers regulate VSI’s output voltage and current. The research paper shows the effectiveness of controlled microgrid operations using MATLAB/Simulink software in various conditions including intermittent PV system behavior, load dynamics, and DER connection/disconnection challenges. Simulation results show that the proposed approach enhances stability and performance of the microgrid system, especially in managing power fluctuations and maintaining a constant frequency response.

Research on an Active Hydrogen Maser Digital Circuit Control System Based on FPGA.

A hydrogen maser is a high-precision time measurement instrument with high frequency stability and low frequency drift, which is widely used in satellite navigation, ground time keeping, frequency measurement, and other fields. An active hydrogen maser (AHM) is better than the current space passive hydrogen maser (PHM) in orbit in terms of its frequency stability and drift rate, but it has the disadvantages of large volume and weight. To further reduce the volume and weight of the circuit, this paper demonstrates a digital circuit control system based on a field-programmable gate array (FPGA). It uses digital temperature control, digital detectors, digital down-conversion, digital phase-locked loops, and other digital methods for temperature control, cavity auto-tuning, and crystal phase locking, which improve the integration and flexibility of the circuit system. Meanwhile, a tuning method based on hydrogen flow is proposed, which effectively solves the problem of fluctuations in hydrogen maser resonance frequency with changes in the external environment. Our experimental results show that the designed digital circuit control system meets the requirements of an oven-controlled crystal oscillator (OCXO) loop and a cavity loop. Its frequency stability can reach 2.6×10-13/1 s and 1.4×10-15/10,000 s, which is close to the stability index of ground active hydrogen maser. This scheme has certain practical engineering value, and can be used in the design of hydrogen masers for next-generation space navigation satellites, deep space exploration, and space stations.

Distributed cooperative grid synchronization strategy for multiple parallel grid-supporting inverters in AC microgrid

In an AC microgrid (MG), the grid-supporting inverters (GSIs) are crucial components, which can regulate the frequency and voltage and enhance power supply reliability. To provide a reliable utilization of distributed generation (DG) and ensure uninterrupted operation of critical loads, a seamless handover between islanded and grid-connected modes is required for an AC MG with multiple parallel operating GSIs. Traditionally, the phase angle and frequency are usually detected by the phase-locked loop (PLL) units. Furthermore, the centralized control structure is widely used to obtain the global information of the system for grid synchronization, which will reduce the system reliability and flexibility. In this paper, a distributed cooperative grid synchronization strategy is proposed for multiple parallel GSIs. A seamless handover can be performed under the proposed control strategy that only needs to transmit the synchronization information to the leader DG without using any PLL units, which is more simple, effective, and flexible. The results of the simulation and StarSim Hardware-in-the-loop experiment are presented to confirm the effectiveness of the proposed control strategy.

A low-jitter and low-phase noise switched-loop filter PLL using fast phase-error correction and dual-edge phase comparison technique

This paper presents a low-jitter and low-phase noise type-II charge pump and switched-loop filter-based (SLF) phase-locked loop (PLL) with a fast phase error correction technique (FPEC) and a newly proposed dual-edge phase comparator (DEPC). To improve the phase noise, the bandwidth of the proposed PLL is extended to fREF/5 using the proposed DEPC. It consists of four D flip-flops in true single-phase clock (TSPC) logic, four current-mode logic-based inverters, and two logic OR gates. Unlike conventional DEPCs, the proposed DEPC has a small reset pulse width duration and negligible blind zone, and due to this, it can perform at higher frequencies along with an increased phase detection range. The proposed architecture is implemented for a 2.4 GHz output frequency that embodies DEPC and SLF using the FPEC technique in an 180-nm Semi-Conductor Laboratory (SCL) CMOS process. The proposed DEPC can work up to a maximum of 3.45 GHz frequency with 145 ps of reset delay. The proposed PLL accomplishes the 40 MHz bandwidth with a 200 MHz reference clock. The simulated rms jitter integrated from 10 kHz to 100 MHz and the phase noise of the output signal at an offset of 1 MHz are 860 fs and −122 dBc/Hz respectively. The proposed architecture occupies an area of 0.032 mm2 and consumes 8.2 mW from 1.8 V power supply.

Design and Performance Analysis of a Neural Network Sliding Mode based Hybrid Controlled Islanded Micro-Grid

The micro-grid fed shunt voltage source converter, also known as a smart Artificial neural network and sliding mode controller (ANN-SMC) based hybrid system, is developed during this research for solar system, wind and battery storage connected shunt filter. Here, phased locked loop utilization is avoided by the self-tuning filter (STF). Move over, apart from producing phase synchronization, STF also distinguishes between the fundamental and harmonic components. Total harmonic distortion (THD) reduction and steady voltage across dc link during load variations with short settling times under both grid and island settings are the key goals of the recommended approach. Four scenarios with various combinations of loads, solar radiation, and wind speeds under islanding conditions are used to illustrate the effectiveness of the study.

Quadrature Sinusoidal Signals Correction of Magnetic Encoders via Radial Basis Function Neural Network and Adaptive Loop Shaping

Magnetic encoders are widely used in industrial motion control, due to their low-cost, simple structures and low environmental requirements. However, the obtained quadrature sinusoidal signals suffer from various disturbances, which affects the accuracy of the magnetic encoders. The current methods which combine the neural network with phase-locked loop (PLL) typically require the knowledge of harmonic orders in advance and use a proportional-integral controller as loop filter of the PLL. In this paper, we propose a new method, in which a radial basis function neural network (RBFNN)-based PLL is combined with adaptive loop shaping. In this method, with the incorporation of RBFNN into PLL, the disturbances could be readily eliminated, thus avoiding additional parameter identification. Furthermore, the adaptive loop shaping served to redesign the PLL's loop filter, aiming to strengthen the high-frequency noise attenuation capability. The method has been validated both theoretically and experimentally, confirming that it is an effective method to improve the accuracy of the magnetic encoders.

Constant-Coupling-Effect-Based PLL for Synchronization Stability Enhancement of Grid-Connected Converter Under Weak Grids

The Phase-Locked Loop (PLL)-caused couplings on the grid-connected converter (GCC) are strengthened by increasing its bandwidth and then incur synchronization instability. This paper proposes a constant coupling effect-based PLL (CCE-PLL) to resolve the aforementioned issues. Initially, the feature of the PLL-caused couplings on GCC is explored. It exhibits that the couplings are varied along with the PLL bandwidth hence jeopardizing the system's stability. Subsequently, the CCE-PLL with a constant and low coupling regardless of its bandwidth on the GCC is proposed. It illustrates that the CCE-PLL bandwidth does not influence the GCC's impedance response, bringing the GCC and CCE-PLL can be designed separately. Lastly, the experiments confirm that using CCE-PLL, the system has high robustness against grid impedance variation, and the GCC is capable of injecting/absorbing 1.0 per unit active power in a very weak grid. Moreover, the system attains good anti-interference ability and transient performance under system disturbances thanks to the permission usage of the high CCE-PLL bandwidth.

Impact of LVRT Control on Transient Synchronizing Stability of PLL-Based Wind Turbine Converter Connected to High Impedance AC Grid

With large scale of wind turbines connected to high impedance AC grid, transient synchronizing stability of PLL (phase locked loop) based WTC (wind turbine converter) during LVRT (low voltage ride through) is increasing concerned. However, the existing research is usually carried out at the assumption of constant current injection. The influence of dynamic current injection adjusted by LVRT control is neglected. Yet, in high impedance AC grid, the dynamic current injection significantly affects the terminal voltage tracked by PLL. Then LVRT control has much impact on the transient synchronizing stability, which is concerned especially in this paper. First, an novel equivalent motion model is developed, in which PLL is modelled in the form of rotor motion and LVRT control adjusts its equivalent driving force similar as governor in synchronous generator. Then based on the developed model, accelerating-decelerating area method is employed to reveal the transient stability mechanism from energy's transformation and dissipation. Transient stability region method is employed to present the visualized stability region. Furtherly, the influence of K-factor, grid impedance and grid voltage sag are studied from the influence of them on accelerating-decelerating area and stability region. Finally, simulated results are presented to verify the analytical results.

A Tunable Dielectric Resonator Oscillator with Phase-Locked Loop Stabilization for THz Time Domain Spectroscopy Systems

Precision microwave measurement systems require highly stable oscillators with both excellent long-term and short-term stability. Compared to components used in laboratory instruments, dielectric resonator oscillators (DRO) offer low phase noise with greatly reduced mechanical complexity. To further enhance performance, phase-locked loop (PLL) stabilization can be used to eliminate drift and provide precise frequency control. In this work, the design of a low-cost DRO concept is presented and its performance is evaluated through simulations and measurements. An open-loop phase noise of −107.2 dBc/Hz at 10 kHz offset frequency and 12.8 GHz output frequency is demonstrated. Drift and phase noise are reduced by a PLL, so that a very low jitter of under 29.6 fs is achieved over the entire operating bandwidth.

Enhanced Position Estimation Based on Frequency Adaptive Generalized Comb Filter for Interior Permanent Magnet Synchronous Motor Drives

Accurate rotor position estimation is critical to ensure the high-performance operation of position sensorless interior permanent magnet synchronous motor (IPMSM) drives. However, the back electromotive force (BEMF) estimated by the model-based observers is usually nonideal, which may further degrade the position estimation accuracy. In this paper, a frequency adaptive generalized comb filter (FAGCF) with a quadrature phase-locked loop (PLL) is adopted to suppress the rotor position estimation errors by filtering out the dominant distortions in the BEMF, including the (6k±1)th harmonics caused by inverter nonlinearity and flux spatial harmonics, as well as the DC offset from the inaccurate current measurements. This proposed filter is constructed by multiple digital delay blocks and therefore has the advantage of easy implementation with less online parameters tuning effort. Meanwhile, a linearized model is derived for PLL parameter design, with which the stability of the FAGCF-PLL position estimation system can also be analyzed theoretically. The effectiveness of the proposed sensorless control strategy has been validated with the experimental results on a 1.5-kW IPMSM drive.

Synchronization Stability of Grid-Following VSC Considering Interactions of Inner Current Loop and Parallel-Connected Converters

In the grid-following (GFL) voltage source converter (VSC), the synchronization process of phase-locked loop (PLL) can be seriously affected by the interactions from the inner current loop and other parallel-connected VSCs. In this paper, we focus on the influences of these interactions on the synchronization stability of GFL-VSC. Firstly, these interactions are classified into static and dynamic interactions by the mechanism of how they affect the dynamic of PLL. Then, their influence on the synchronization stability is estimated based on a novel Lyapunov stability criterion, which is derived from the extended invariance principle. On this basis, in terms of the physical mechanism, we reveal how the VSC exhibits the non-asymptotic synchronization (i.e., limit cycles) and cascading synchronization instability. In addition, we get the maximum range of static and dynamic interactions that the VSC endure, which can provide the practical design guidance for the VSC. Finally, simulations and experiments are performed to verify the theoretical findings.

Minimally Invasive Hypoglossal Nerve Stimulator Enabled by ECG Sensor and WPT to Manage Obstructive Sleep Apnea

A hypoglossal nerve stimulator (HGNS) is an invasive device that is used to treat obstructive sleep apnea (OSA) through electrical stimulation. The conventional implantable HGNS device consists of a stimuli generator, a breathing sensor, and electrodes connected to the hypoglossal nerve via leads. However, this implant is bulky and causes significant trauma. In this paper, we propose a minimally invasive HGNS based on an electrocardiogram (ECG) sensor and wireless power transfer (WPT), consisting of a wearable breathing monitor and an implantable stimulator. The breathing external monitor utilizes an ECG sensor to identify abnormal breathing patterns associated with OSA with 88.68% accuracy, achieved through the utilization of a convolutional neural network (CNN) algorithm. With a skin thickness of 5 mm and a receiving coil diameter of 9 mm, the power conversion efficiency was measured as 31.8%. The implantable device, on the other hand, is composed of a front-end CMOS power management module (PMM), a binary-phase-shift-keying (BPSK)-based data demodulator, and a bipolar biphasic current stimuli generator. The PMM, with a silicon area of 0.06 mm2 (excluding PADs), demonstrated a power conversion efficiency of 77.5% when operating at a receiving frequency of 2 MHz. Furthermore, it offers three-voltage options (1.2 V, 1.8 V, and 3.1 V). Within the data receiver component, a low-power BPSK demodulator was ingeniously incorporated, consuming only 42 μW when supplied with a voltage of 0.7 V. The performance was achieved through the implementation of the self-biased phase-locked-loop (PLL) technique. The stimuli generator delivers biphasic constant currents, providing a 5 bit programmable range spanning from 0 to 2.4 mA. The functionality of the proposed ECG- and WPT-based HGNS was validated, representing a highly promising solution for the effective management of OSA, all while minimizing the trauma and space requirements.

A Novel Phase-Locked Loop Structure to Enhance Converter Stability in Weak Grids

A Novel Phase-Locked Loop Structure to Enhance Converter Stability in Weak Grids

Alleviation of Power Quality Issues in MVF-DEANF-PLL Based Solar PV Systems under Polluted Grid Conditions

Solar energy is a sustainable and environmentally safe power source due to its widespread availability and cleanliness. Nowadays, the grid-integrated solar photovoltaic system (SPVS) has to work with a polluted grid, an imbalanced load, and changing solar irradiation. When the grid is polluted, it is also crucial to enhance power quality (PQ) at a common coupling point (CCP) while supplying significantly distorted and unreliable loads. For effective synchronization and the production of unit templates, it is necessary to retrieve positive sequence components (PSCs) from distorted/imbalanced grid voltages. In this study, a control algorithm for a grid-integrated SPVS is developed using a multi-variable filter dual-enhanced adaptive notch filter phase-locked loop (MVF-DEANF-PLL) which offers seamless grid synchronization and PQ issue alleviation. In a polluted grid environment, the proposed control approach aids in the reduction in current/voltage harmonics, DC offset, unity power factor (UPF) operation, and rapid estimation of sequence components. Even in unbalanced grid conditions, the proposed control approach efficiently extracts PSCs of both unbalanced load current and polluted CCP grid voltages. These PSCs are utilized to generate unit templates and reference source currents. By using a flexible step-size incremental conductance (FSSINC) maximum power point tracking (MPPT) technique, the highest available power of SPVS is gathered. MATLAB/Simulink is utilized for modelling a 7.22 kW SPV system, and results from simulations which depict that the proposed algorithm efficiently resolves PQ concerns in distribution networks with a polluted grid. Test observations of a 1 kW laboratory-developed SPVS prototype were recorded in compliance with the IEEE-519 standard. The suggested control technique complies with the aforementioned standards by providing a sinusoidal balanced source current that has a THD of 2.5%. Comparisons between the proposed control’s performance and that of a conventional SRF-PLL-based control technique were also performed.

Digitalized Control Algorithm of Bridgeless Totem-Pole PFC with a Simple Control Structure Based on the Phase Angle

Compared to the conventional boost power factor correction (PFC) converter, a totem-pole bridgeless PFC has high efficiency because it does not have an input diode rectifier stage, but a current spike may occur when the polarity of the grid voltage changes. This paper proposes a digital control algorithm for bridgeless totem-pole PFC with a simple control structure based on the phase angle of grid voltage. The proposed algorithm has a PI-based double-loop control structure and performs DC-link voltage and input inductor current control. Rectifying switches operate based on the proposed rectification algorithm using phase angle information calculated through a single-phase phase-locked loop (PLL) to prevent current spikes. The feed-forward duty ratio value is calculated according to the polarity of the grid voltage and added to the double-loop controller to perform appropriate power factor control. The performance and feasibility of the proposed control algorithm are verified through a 3 kW hardware prototype.