Phase Disposition Pulse Width Modulation Research Articles

Circuit Configuration and Modulation of a Seven-Level Switched-Capacitor Inverter

In this article, a step-up seven-level inverter supplied by a single dc source suitable for renewable energy application is presented. Forming the desired output is realized by charging capacitors and synthesizing them based on a switched-capacitor concept. This structure is praised for the ability of sensorless voltage balancing of the capacitors, reducing control complexity to produce a bipolar staircase waveform. It also benefits from regenerative performance, avoiding unwanted capacitors overvoltage. A phase disposition pulsewidth modulation (PD-PWM) technique is utilized to control the circuit operation. Furthermore, a comparison with other recent topologies reveals that losses, number of semiconductor devices, and gate driver circuits are reduced. Theoretical analysis is verified through a laboratory prototype implementation. Experimental results under various types of loads approve the performance of the proposed inverter and validity of the design. Finally, maximum experimental efficiency of 94.3% (115 V, 250 W load) was reached.

A Review of Modular Multilevel Converters for Stationary Applications

A modular multilevel converter (MMC) is an advanced voltage source converter applicable to a wide range of medium and high-voltage applications. It has competitive advantages such as quality output performance, high modularity, simple scalability, and low voltage and current rating demand for the power switches. Remarkable studies have been carried out regarding its topology, control, and operation. The main purpose of this review is to present the current state of the art of the MMC technology and to offer a better understanding of its operation and control for stationary applications. In this study, the MMC configuration is presented regarding its conventional and advanced submodule (SM) and overall topologies. The mathematical modeling, output voltage, and current control under different grid conditions, submodule balancing control, circulating current control, and modulation methods are discussed to provide the state of the MMC technology. The challenges linked to the MMC are associated with submodule balancing control, circulating current control, control complexity, and transient performance. Advanced nonlinear and predictable control strategies are expected to improve the MMC control and performance in comparison with conventional control methods. Finally, the power losses associated with the advanced wide bandgap (WBG) power devices (such as SiC, GaN) are explored by using different modulation schemes and switching frequencies. The results indicate that although the phase-shifted carrier-based pulse width modulation (PSC-PWM) has higher power losses, it outputs a better quality voltage with lower total harmonic distortion (THD) in comparison with phase-disposition pulse width modulation (PD-PWM) and sampled average modulation pulse width modulation (SAM-PWM). In addition, WBG switches such as silicon carbide (SiC) and gallium nitride (GaN) devices have lower power losses and higher efficiency, especially at high switching frequency in the MMC applications.

Suppressing Leakage Current for Cascaded H-Bridge Inverters in Renewable Energy and Storage Systems

Leakage current in a transformerless cascaded H-bridge (CHB) inverter is a problem that deteriorates the system performance and causes safety concerns. In this article, a common-mode equivalent circuit is established for analyzing the occurrence of leakage current in an m-level CHB inverter with either asymmetrical or symmetrical inductance output filter configurations. The analysis provides a comparison between traditional phase shifted pulsewidth modulation, phase disposition pulsewidth modulation, and the proposed leakage current reduction pulsewidth modulation. It is reported that grid leakage current cannot be suppressed in an asymmetrical inductance filter configuration solely based on modulation methods. The proposed leakage current reduction pulsewidth modulation pulsewidth modulation can effectively reduce the grid leakage current in a symmetrical filter configuration nine-level CHB inverter. Simulation and experimental studies for aforementioned methods are provided and their performances are evaluated.

RETRACTED: A hybrid technique used in grid integration of photovoltaic system for maximum power point tracking with multilevel inverter

A new hybrid technique for grid integration of solar photovoltaic system using modified incremental conductance maximum power point tracking algorithm with multi-output converter and multilevel inverter is proposed in the paper. The proposed hybrid technique is the joint execution of improved dolphin echolocation algorithm and gradient boosting decision trees and this way the proposed technique is named as IDE-GBDT technique. The novelty of the proposed work is the dolphin echolocation algorithm, which is integrated by the crossover and the mutation function so it is named as IDE. In the proposed technique, the multi-output converter is the combination of boost converter and switched capacitor function to generate different self-balanced output voltages. The utilization of multilevel inverter in the proposed system provides better quality of output voltage and current waveform thereby reducing the size of passive filters. Also, eliminates the requirement of bulky transformers for grid integration. Multicarrier unipolar phase disposition pulse width modulation technique is employed for triggering the switches of the multilevel inverter. The maximum power point tracking algorithm uses the estimated active power output of the generator as its input and generates command speed so that maximum power is transferred to the dc link. This control system also incorporates a loss minimization approach to minimize the losses in the generator and hence to improve the efficiency of the photovoltaic system. Finally, the performance of the proposed maximum power point tracking control of wind and photovoltaic power generation schemes is executed in Matrix Laboratory/Simulink working platform and the execution is assessed with the existing techniques. The proposed technique is compared with the existing techniques and the observed total harmonic distortion of the proposed technique in all the cases is 0.67%, 0.51%, 0.58%, 0.63%, 0.92%, and 1.03% and the total harmonic distortion is found to be very less compared with existing techniques.

Circulating Current Control of Modular Multilevel Converter With Reduced Conduction Loss for Medium-Voltage Applications

The modular multilevel converter (MMC) has become popular for medium-voltage applications. During MMC operation, unavoidable circulating currents flow through its arms and cause extra losses in the converter system. To generate a reference for circulating current, different current injection methods to control the circulating current have been reported. The conventional current injection techniques used so far relies on a mathematical model that excludes the effect of arm inductor voltages in its design. For high-voltage applications with many submodules (SMs), the above exclusion does not make much difference. But for medium-voltage applications with few SMs, the applied arm inductor voltages may be significant for a given dc-link voltage. In this article, inductor voltages are included in the proposed circulating current model, and a new reference for circulating current is obtained resulting in reduced circulating current through MMC arms. The proposed method is analyzed in detail on both seven-level and nine-level three-phase MMC, where advantages of the 2 <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> + 1 level phase disposition pulsewidth modulation (PD-PWM) scheme are retained. The simulation study is carried out in PLECS blockset to show the reduction in the rms magnitude of circulating current. The validation of the proposed technique in a lab-scale hardware prototype shows the effectiveness of the proposed method.

Three Phase Eleven Level Modular Multilevel Inverter with PD-PWM for Grid Connected System

The prominence of Modular Multilevel Inverters (MMI) is rising owing their merits of simple mechanical construction and good voltage sharing for semiconductor devices. Mostly Multilevel Inverters use more than one source; however, the effective use of all the sources at all levels is rare. Conventional Multilevel Inverters will diminish the energy efficiency of the conversion system. When compared to conventional multilevel inverter, Modular Multilevel Inverter with a high numbers of voltage levels seem to be the most suitable because of the use of an isolated dc source. This paper explores a three-phase eleven level modular multilevel inverter with phase disposition pulse width modulation technique (PD-PWM) that can extract power from all the sources at all the levels. Besides, this paper develops a synchronous d-q reference frame controller to control the current of 11kV. When compared with Reduced Switch Count based Multilevel Inverter Series/Parallel switching topologies, the Modular Multilevel Inverter provides better Total Harmonic Distortion (THD) of output voltage and utilization factor.

Multicarrier PWM Strategies for Hybrid Symmetrical Multilevel Inverter with Reduced Switch Count

Multilevel inverters are widely used for high power and high voltage applications. The performance of multilevel inverters are superior to conventional two level inverters in terms of reduced total harmonic distortion, higher dc link voltages, lower electromagnetic interference and increased quality in the output voltage waveform. This paper presents a single phase hybrid eleven level multilevel inverter topology with reduced switch count to compensate the above mentioned disadvantages. This paper also presents various high switching frequency based multi carrier pulse width modulation strategies such as Phase Disposition PWM Strategy (PDPWM), Phase Opposition and Disposition PWM Strategy (PODPWM), Alternate Phase opposition Disposition PWM (APODPWM), Carrier Overlapping PWM (COPWM), Variable frequency carrier PWM (VFPWM), Third Harmonic Injection PWM (TFIPWM) applied to the proposed eleven level multilevel inverter and is analyzed for RL load. FFT analysis is carried out and total harmonic distortion, fundamental output voltage are calculated. Simulation is carried out in MATLAB/SMULINK.

Asymmetric hybrid multilevel inverter with reduced harmonic using hybrid modulation technique

&lt;span&gt;This paper studies the Asymmetric cascaded three phase multilevel inverter developed with hybrid modulation technique applied for an industrial application. The aim of this paper to reduce the Total harmonics distortion in the cascaded multi level inverter by introducing the new concept to develop the three phase CMLI. This inverter has two segments, one segment has H-bridge inverter and another segment has sequential arrangement of power semi conductor switches with asymmetrical voltage source in the ratio of 1:2. Similarly develop the segments for other phases. This new topology is called as Hybrid MLI. This hybrid MLI is used to reduce the no of semiconductor device requirement and the Total harmonics distortion. The inverter is controlled by Phase disposition (PD) and alternative phase opposition disposition PWM technique (APOD). This control technique is used to minimize the current harmonic and increase the system performance. The circuit is simulated using Matlab circuit and its performance is compared using PD and APOD PWM techniques and verified with simulation results.&lt;/span&gt;&lt;p&gt; &lt;/p&gt;

New switched-capacitor-based boost inverter topology with reduced switch count

The boosting feature of switched capacitor-based multilevel inverter topologies has been highly recommended for photovoltaic-based applications. However, the main concern with these topologies is the voltage stress across the switches along with the power component count for a higher number of levels. In this paper, a new single-stage boost nine-level boost inverter (9LBI) topology has been proposed with a single floating capacitor unit that pertains to all of the mentioned concern. The proposed topology gives a voltage gain of two, while the voltage stresses across switches have been maintained to be equal to or less than the dc input supply. Phase disposition pulse width modulation (PD-PWM) and nearest level control pulse width modulation (NLC-PWM) techniques have been used for the control of the switches in the proposed topology. A comparative study of different similar topologies in terms of cost, efficiency, voltage stress, and component count sets the standard for the proposed topology. Different simulation and experimental results have been obtained to determine the workability of the proposed topology in different environments and operating conditions.

A transformerless single-phase multilevel converter for grid-tie renewable energy systems

A multilevel converter produces a high quality output voltage waveform therefore requires less filtering in grid-tie systems. Cascaded H-bridge converter is a favourable topology for a hybrid renewable and storage system due to isolated DC source requirement. This converter is designed to interface a hybrid photovoltaic and battery system to the utility grid, making DC sources more accessible. In this study, a nine-level cascaded H-bridge converter is presented. A closed loop controller implemented in synchronous rotating frame is used to control active and reactive power independently. The control strategy is implemented in a simulation environment and then validated with experimental results. The generated output current waveforms are analysed when operated with various sinusoidal pulse width modulation techniques such as phase disposition pulse width modulation. It is found that the converter has a low total harmonic distortion that conforms to IEEE 1547 standard.

Design and implementation of cascaded H-Bridge multilevel inverter using FPGA with multiple carrier phase disposition modulation scheme

The paper deals with design of Cascaded H-Bridge Multilevel Inverter (CHB-MLI) with separate DC source to each inverter using multiple carrier Phase Disposition PWM such as symmetric disposition, phase opposition disposition and alternative phase opposition disposition to reduce the Total Harmonic Distortion (THD) and to improve the power quality of the supply voltage and current. In early days, the multilevel inverters are controlled with high frequency PWM method. This is not suitable for high power applications due to the high switching losses. With the help of multiple carrier PWM switching losses in the inverter circuit are reduced, so it can be used for high switchi ng frequency applications. The simulation of proposed system is developed using MATLAB Simulink software. The Performance simulation results are validated through experimental test setup using SPARTAN - 6 FPGA. Simulation results and effectiveness of the proposed method is proved and validated by experimental data.

A Composite Voltage-Balancing Method for Four-Level NPC Inverters

Four-level neutral-point-clamped (NPC) inverter suffers from the neutral-point (NP) voltage-balancing problem, which seriously hinders its application in the industry. Carrier-overlapped pulsewidth modulation (COPWM) is a newly proposed carrier-based modulation method which can solve this problem. However, the total switching transitions under this modulation method are doubled, and hence the switching losses are increased. In order to alleviate this problem, a composite modulation and voltage-balancing method is proposed in this article. For a low modulation index range under 0.5, phase-disposition pulsewidth modulation (PDPWM) is utilized and the relationship between the NP currents and the reference phase voltage is derived. A zero-sequence voltage injection-based NP voltage balancing method is proposed. For a high modulation index range more than 0.5, a decoupled voltage-balancing method based on COPWM is used. By combining the two modulations and voltage-balancing methods, the NP voltages can be balanced under the full modulation index range with reduced switching losses. Simulation and experimental results are presented to confirm the validity of this method.

A Seven-Level Inverter With Self-Balancing and Low-Voltage Stress

Based on the switched-capacitor (SC) principle, a seven-level inverter is proposed, which can synthesize seven levels containing a single dc source. Moreover, it can further generate more levels by a cascaded extension. Meanwhile, the proposed topology does not require any sensor due to the use of SC technology. Furthermore, the capacitor voltage is self-balanced without utilizing the complicated control strategy and additional control circuits. The phase disposition pulsewidth modulation is adopted to reduce the total harmonic distortion. The topology can generate different levels with a wide range of modulation index. In addition, the topology can also work in overmodulation. Compared with the traditional SC multilevel inverter, the absence of H-bridge makes low-voltage stress in proposed topology. The voltage stress of all switches is not more than the input voltage. Operational principles, modulation strategy, and voltage stress analysis are discussed. Simulation and experiment are conducted in low power to verify the feasibility of the proposed topology.

A Generalized Carrier-Overlapped PWM Method for Neutral-Point-Clamped Multilevel Converters

The neutral-point voltage unbalance problem holds back the extensive application of neutral-point-clamped (NPC) multilevel converters with more than three voltage levels in industry. Traditional phase-disposition pulsewidth modulation (PDPWM) or nearest-three-vector (NTV) modulation cannot achieve the voltage balance over the full modulation indexes and load power factors when the voltage level is higher than three. To solve this problem, a novel generalized carrier-based PWM method, named carrier-overlapped PWM (COPWM), for NPC multilevel converters is proposed in this article, which is proven to satisfy the volt-second balance principle. With this modulation method, the average values of all the neutral-point currents are equal to zero in a fundamental period, and therefore, all the dc-link capacitor voltages can be naturally balanced in the ideal and steady-state conditions. In order to simplify its implementation, an equivalent multireference modulation method with only one triangular carrier is also derived. Simulation and experimental results on a five-level diode-clamped inverter are presented to verify the proposed modulation method.

Experimental verification of a hybrid multilevel inverter with voltage‐boosting ability

SummaryA new nine‐level natural‐balanced boost hybrid multilevel inverter (BH‐MLI) is proposed in this paper. Each phase of the proposed BH‐MLI is designed with only 11 semiconductor switches and two electrolytic capacitors. Here, the capacitor voltages are balanced by utilizing the series‐parallel and natural balancing techniques effectively. Furthermore, the proposed circuit eradicates the multiple DC sources by introducing a single DC link for single‐ and three‐phase applications. The proposed topology can be easily extendible to obtain higher level output voltage waveform due to its modular‐switched capacitor cells (SCCs). Besides, the higher voltage level generation does not pose high‐voltage stress on any of the topology components, as the blocking voltage of all devices within the source voltage magnitude. Further, a quantitative comparison is conducted among the state‐of‐art switched‐capacitor multilevel inverter (SC‐MLIs) to highlight the superiority of the proposed configuration. Finally, the performance of the proposed BH‐MLI is experimentally validated with phase disposition‐pulse width modulation (PD‐PWM) and round control method at different modulation indices, load conditions.

A Comprehensive Study of Common Mode Voltage Reduction and Neutral Point Potential Balance for a Back-to-Back Three-Level NPC Converter

A comprehensive study of common-mode voltage (CMV) reduction and neutral point (NP) potential balance for a back-to-back three-level NPC converter is proposed in this article. Based on phase-disposition PWM, a zero-sequence voltage (ZSV) injection method is adopted. The ZSV is divided into two parts: ZSV for CMV reduction, and ZSV for NP potential balance. The specific selection method is discussed in detail in this article. After using the proposed ZSV injection method, the CMV can be reduced to 1/6 of the dc bus voltage, and the NP potential fluctuations can also be suppressed. Simulation and experimental results verify the effectiveness of the proposed method.

Adaptive Carrier-Based PDPWM Control for Modular Multilevel Converter With Fault-Tolerant Capability

Modular multilevel converters (MMCs) are considered very promising converters due to their modularity structure and high reliability from fault-tolerant. A fault within a submodule (SM) is one of the main issues in half-bridge MMCs with substantial switching devices. In this paper, an adaptive carrier based phase disposition pulse width modulation (PDPWM) technique for MMCs, which uses only one carrier having flexibility with fault-tolerant capability, is presented. The energy-based control is also used in this study to regulate the balancing of SMs during and after a fault. In order to investigate the performance of the proposed method, a laboratory single-phase MMC prototype has been built by using four SMs to generate nine-level. The single-phase MMC prototype is tested by assuming one of the SMs in the failure condition. The result revealed that the proposed method had been successfully applied to the MMC prototype to control the upper and lower arm during the failure. In addition, the reference command will correct the fault according to the adaptive carrier and the computational burden is lesser since it only uses one single carrier.

Simulation of Seven and Nine Level CHBMLI with Elliptical Phase Disposition PWM Technique

Electric vehicles are in demand in recent days due to depleting conventional energy resources. Electric vehicles which are environmental friendly are set to increase on road in coming days. The Electric vehicles which consist of electric drive systems are made up of electric motors, inverters and batteries. There is a need to increase their output quality while decreasing their size and cost. The multilevel inverter plays a vital role in improving the quality of the output voltage of the inverter. This paper presents the implementation of Elliptical Phase Disposition Pulse Width Modulation (EPD PWM) technique for higher level of Cascaded H-Bridge Multi Level Inverter (CHBMLI). The performance of 5, 7 and 9-level CHBMLI with proposed EPD PWM scheme is analyzed for three-phase RL-load. The simulation results prove that the voltage %THD reduces from 28.09 to 12.85 to 9.69 and current %THD reduces from 25.58 to 10.22 to 9.42 as the number of inverter output level increases from 5-7-9 level respectively. The simulation is carried out on MATLAB/ SIMULINK platform and the results were compared with conventional method to validate the proposed scheme. The simulation results prove that the novel EPD-PWM technique can be used to effectively control the CBHMLI.

Harmonic Analysis of Symmetrical and Asymmetrical Cascaded H-Bridge Multilevel Inverter

This paper proposes harmonic comparison between Symmetrical and Asymmetrical CHB MLI using multiple carrier based phase disposition PWM technique (PDPWM). Topologies of different multilevel inverter are reported in the literature, but mainly this work focuses on the harmonic comparison of Symmetrical and Asymmetrical cascaded MLI with same count of sources and switches. In this paper, PWM switching technique for harmonic comparison of both symmetrical and asymmetrical cascaded MLI is PD. Total harmonic distortion is analyzed in FFT window. Results are observed in SIMULINK/MATLAB software. In these comparative results we can see that an asymmetrical configuration is producing higher voltage levels in voltage output with equal quantity of component compared with the 5-level symmetric inverter and this could lead towards the reduction in harmonic content of output voltage. The benefits of this method of control are applicability and simplicity for n-levels MLI, with no any considerable change in the control circuitry. The experimental measurement results validate proper operation of the discussed MLI

Harmonic Analysis of Symmetrical and Asymmetrical Cascaded H-Bridge Multilevel Inverter

This paper proposes harmonic comparison between symmetrical and asymmetrical CHB MLI using multiple carrier based phase disposition PWM technique (PDPWM). Topologies of different multilevel inverter are reported in the literature, but mainly this work focuses on the harmonic comparison of symmetrical and asymmetrical cascaded MLI with same count of sources and switches. In this paper, PWM switching technique for harmonic comparison of both symmetrical and asymmetrical cascaded MLI is PD. Total harmonic distortion is analyzed in FFT window. Results are observed in SIMULINK/MATLAB software. In these comparative results we can see that an asymmetrical configuration is producing higher voltage levels in voltage output with equal quantity of component compared with the 5-level symmetric inverter and this could lead towards the reduction in harmonic content of output voltage. The benefits of this method of control are applicability and simplicity for n-levels MLI, with no any considerable change in the control circuitry. The experimental measurement results validate proper operation of the discussed MLI.