Oxide Resistive Random Access Memory Research Articles

Recent Progress in Solution-Based Metal Oxide Resistive Switching Devices.

Metal oxide resistive switching memories have been a crucial component for the requirements of the Internet of Things, which demands ultra-low power and high-density devices with new computing principles, exploiting low cost green products and technologies. Most of the reported resistive switching devices use conventional methods (physical and chemical vapor deposition), which are quite expensive due to their up-scale production. Solution-processing methods have been improved, being now a reliable technology that offers many advantages for resistive random-access memory (RRAM) such as high versatility, large area uniformity, transparency, low-cost and a simple fabrication of two-terminal structures. Solution-based metal oxide RRAM devices are emergent and promising non-volatile memories for future electronics. In this review, a brief history of non-volatile memories is highlighted as well as the present status of solution-based metal oxide resistive random-access memory (S-RRAM). Then, a focus on describing the solution synthesis parameters of S-RRAMs which induce a massive influence in the overall performance of these devices is discussed. Next, a precise analysis is performed on the metal oxide thin film and electrode interface and the recent advances on S-RRAM that will allow their large-area manufacturing. Finally, the figures of merit and the main challenges in S-RRAMs are discussed and future trends are proposed.

Universal Memory Characteristics and Degradation Features of ZrO2‐Based Bipolar Resistive Memory

AbstractA bilayer structured ZrO2‐based bipolar resistance random access memory (ReRAM) is demonstrated with near‐universal memory performances that meets almost all the requirements of the representative volatile and nonvolatile memories such as dynamic random access memory (DRAM) and NAND flash memory. The near‐universal device features include the very high initial on/off ratio up to 106, large switching endurance (1012 switching cycles), long retention (≈10 years), and fast programming speed (≈50 ns) along with the relatively small power consumption (≈50 pJ bit−1). Such high levels of performance and reliability characteristics of ReRAM are accomplished by adopting the layer‐by‐layer oxidation method that makes the junction of two oxide layers, ZrO2/TaOx, as sharp as possible. However, despite all these excellent features of the ReRAM, there are unwanted clear degradations of off‐state resistance as time and switching cycles go on in reliability tests resulting in a gradual decrease of the on/off ratio. Through theoretical simulations based on the self‐consistent switching model of bilayer oxide ReRAM, the underlying fundamental principles of this phenomenon are suggested, the validity of which are confirmed by excellent agreement with experiment.

Effects of Sb Doping and Preferred Crystal Orientation on the Performance of Electro-Plated Cu2o Resistive Random Access Memory

Effects of antimony doping and film preferred crystal orientation on the performance and stability of electro-plated cuprous oxide (Cu2O) resistive random access memory (RRAM) devices were studied. Previous study indicated that electro-plated Cu2O with a small amount of antimony doping improves film uniformity, surface roughness1. The Sb doped film (Cu2O:Sb) also has a smaller grain size as compared to that of an un-doped cuprous oxide (u-Cu2O) film at same PH plating solution. SEM image of the grain boundaries of the Cu2O:Sb film also indicated that the film is more vertically oriented as compare to that of the u-Cu2O film. As some literatures reported, the conductive path (or charge hopping distance) of the RRAM is likely shorter if electrons hopping take place along the vertical-like grain boundaries. It will also reduce the voltage to set the conductive path formation (or set up of the charge hopping path). Moreover, uniform film and smoother surface are likely to have a stable set/reset performance because more uniform charge hopping distance and/or hopping site distribution.Our studies show that the forming voltages of a 700nm electroplated Cu2O:Sb (~2 at. %) and u-Cu2O (strongly (111) oriented) films are about 4V and 7V, respectively. Some of Cu2O:Sb RRAMs are forming free. The set voltages (Vset) of Cu2O:Sb and u-Cu2O RRAMs are ranging from 1.5V to 2.6V and from 1.2V to 9V, respectively. The reset voltages (Vreset) are 1.2V ~ 1.5V and 1V ~ 2V, respectively. The ratio of high/low resistance state (HRS/LRS) for both of the RRAMs is about two orders of magnitude, and no decay is observed for retention test of 5000 seconds at 0.1V. These results indicate that Sb doping does reduce forming (likely forming free) and significantly stabilize its set voltage.Surface morphology and texture of a (200)-preferred Cu2O film is very different from (111)-preferred film2 − 4. For a (200)-preferred film, its grains’ boundaries are more perpendicular to the plating surface (or electrode). This kind of film texture is also likely can help forming shorter conductive paths and/or stabilize the charge hopping resistance. It is similar to our Cu2O:Sb film texture as previous described. For Cu2O:Sb film, the XRD intensity ratio (R) of (111) to (200) phase is ~1. While the u-Cu2O is strongly (111)-preferred film with R= 12. Preferred crystal orientation change will give rise to varying in vacancy, defects, and trap charge distribution along the hopping paths. These variations can affect charge hopping resistance and its characteristics. Charge hopping in film with vertical-like grain boundaries is believed to be a shorter and easier path.Performance of preferred crystal orientation dependence of the u-Cu2O RRAM is investigated. A (200)-preferred u-Cu2O film with R= 0.185 was used. Its RRAM performance improved in forming voltage of ~5V and in HRS/LRS ratio with three orders of magnitude.In short, Cu2O:Sb film can be a good candidate for RRAM application because of its low cost, potential forming free, low set/reset voltages and stability. Sb doping may have helped forming shorter conductive paths due to its vertical like gains boundaries, less charge hopping resistance due to more uniformly distributed Sb induced hopping sites. Improved performance of (200)-preferred u-Cu2O RRAM may result from vacancy, defects and trap charge distribution change along the hopping paths.Reference 1. Baek, S. K., Kwon, Y. H., Shin, J. H., Lee, H. S., & Cho, H. K. “Low‐Temperature Processable High‐Performance Electrochemically Deposited p‐Type Cuprous Oxides Achieved by Incorporating a Small Amount of Antimony” Advanced Functional Materials, 25, (2015) 52142. J. Siegfried and K.S. Choi, “Electrochemical Crystallization of Cuprous Oxide with Systemic Shape Evolution” Advanced Materials, 16 (2004) 17433. E. Rakhshani and J. Varghese “Surface texture in electrodeposited films of cuprous oxide” J. Materials Science 23 (1988) 38474. H. Lee, I.C. Leu, C.L. Liao, K.Z. Fung “The structural evolution and electrochemical properties of the textured Cu2O thin films” J. Alloy Compounds 436 (2007) 241

Observing topotactic phase transformation and resistive switching behaviors in low power SrCoOx memristor

Abstract Recently, complex oxides have been shown to be promising candidate in dielectric materials of resistive random access memory (RRAM). However, the detailed switching information of complex oxide RRAM is still insufficient, and direct observation of the whole switching process is required to figure out the mechanism. In this study, we deposited SrCoOx (SCO) on a niobium-doped SrTiO3 substrate as the dielectric layer via pulsed laser deposition (PLD). The novel SCO device possesses excellent RRAM properties, high cycling endurance, a long data retention time, and uniform distributions of the high resistance state (HRS) and low resistance state (LRS) resistance and Set/Reset voltage. Furthermore, the switching mechanism was investigated by using transmission electron microscopy (TEM) and scanning transmission electron microscopy (STEM), which showed that the switching behavior resulted from the topotactic phase transformation. In addition, the whole switching process was observed through in situ TEM, and the results strengthened the findings of the ex situ experiment. The discussion of this switching behavior provides support for a novel aspect of the RRAM switching mechanism and also a new option for the dielectric material in RRAM.

Forming‐Free Grain Boundary Engineered Hafnium Oxide Resistive Random Access Memory Devices

Forming‐Free Grain Boundary Engineered Hafnium Oxide Resistive Random Access Memory Devices

Annealing Effect on the Performance of Copper Oxide Resistive Memory Devices

In this article, the annealing effect on resistive switching (RS) characteristics of Al/CuO/indium tin oxide (ITO) resistive random access memory (RRAM) devices is investigated. The RRAM performance is highly sensitive to the annealing temperature of the CuO RS layer. RS characteristics are not observed in the device that uses the as-fabricated CuO film as the active layer. When an annealing process at 250 °C is applied to the CuO layer, bipolar RS behavior is found. However, the resistance ratio of the high resistance state (HRS) to the low resistance state (LRS) is a low value:18. A dramatic improvement in the resistive window can be obtained when the annealing temperature increases to 350 °C. A stable resistive window of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sup> is observed for over 250 switching cycles. Data retention and read disturb tests for 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> s are performed to verify the nonvolatility and the data retention capability. Degradation in the RS characteristics is found when the annealing temperature further increases to 400 °C. The performance variation caused by different annealing temperatures is explained by differences in the crystallinities, grain sizes, and defect densities of the CuO RS layers.

Forming‐Free Grain Boundary Engineered Hafnium Oxide Resistive Random Access Memory Devices

AbstractA model device based on an epitaxial stack combination of titanium nitride (111) and monoclinic hafnia (11) is grown onto a c‐cut Al2O3‐substrate to target the role of grain boundaries in resistive switching. The texture transfer results in 120° in‐plane rotated m‐HfO2 grains, and thus, in a defined subset of allowed grain boundary orientations of high symmetry. These engineered grain boundaries thread the whole dielectric layer, thereby providing predefined breakdown paths for electroforming‐free resistive random access memory devices. Combining X‐ray diffraction and scanning transmission electron microscopy (STEM)–based localized automated crystal orientation mapping (ACOM), a nanoscale picture of crystal growth and grain boundary orientation is obtained. High‐resolution STEM reveals low‐energy grain boundaries with facing () and (21) surfaces. The uniform distribution of forming voltages below 2 V—within the operation regime—and the stable switching voltages indicates reduced intra‐ and device‐to‐device variation in grain boundary engineered hafnium‐oxide‐based random access memory devices.

Resistive switching modification by ultraviolet illumination in amorphous SrO-based resistive random access memory

The novel amorphous strontium oxide (α-SrO) resistive random access memory (RRAM) device based on the ITO/α-SrO/Pt sandwich-like structure was presented. Photosensitivity to ultraviolet (UV) light for α-SrO based RRAM was investigated. The resistive switching characteristics were affected through the modification of the number of oxygen vacancy by the UV irradiation. Ultraviolet light-assisted oxygen vacancy manipulation in the SrO film is an effect method to adjust device resistive switching behavior. The current conduction mechanism of the SrO-based RRAM device was changed from the Schottky emission mechanism to Poole-Frankel mechanism after the UV light illumination. In order to unveil the stability of the SrO samples after the UV light illumination, the physical models for different switching processes were proposed. Additionally, the improved switching uniformity via UV light irradiation gives physical insight into designing resistive memory devices.

Effect of aluminum interfacial layer in a niobium oxide based resistive RAM

Resistive RAM (Random Access Memory) has good scalability with high switching speed and low operating voltage making it one of the promising emerging nonvolatile memory technologies. Interfacial layer between the electrode and metal-oxide interface in a Resistive RAM (ReRAM) could either enhance or deteriorate the switching performance of the device. In this study, we investigate the role of aluminum (Al) as an interfacial layer under the top electrode (TE) layer in a niobium oxide (Nb2O5) based ReRAM. We compare the Current-Voltage (I-V), Capacitance-Voltage (C-V) characteristics and endurance of the Nb2O5 based ReRAM with an Al interfacial layer below the tungsten (W) TE and a control sample without the Al interfacial layer to contrast the performance of each type. Additionally, we connect the tested device behavior with the enthalpy, entropy, and Gibb's free energy to illustrate that aluminum is an inefficient interfacial layer in the niobium oxide ReRAM.

Simulation of Inference Accuracy Using Realistic RRAM Devices.

Resistive Random Access Memory (RRAM) is a promising technology for power efficient hardware in applications of artificial intelligence (AI) and machine learning (ML) implemented in non-von Neumann architectures. However, there is an unanswered question if the device non-idealities preclude the use of RRAM devices in this potentially disruptive technology. Here we investigate the question for the case of inference. Using experimental results from silicon oxide (SiOx) RRAM devices, that we use as proxies for physical weights, we demonstrate that acceptable accuracies in classification of handwritten digits (MNIST data set) can be achieved using non-ideal devices. We find that, for this test, the ratio of the high- and low-resistance device states is a crucial determinant of classification accuracy, with ~96.8% accuracy achievable for ratios >3, compared to ~97.3% accuracy achieved with ideal weights. Further, we investigate the effects of a finite number of discrete resistance states, sub-100% device yield, devices stuck at one of the resistance states, current/voltage non-linearities, programming non-linearities and device-to-device variability. Detailed analysis of the effects of the non-idealities will better inform the need for the optimization of particular device properties.

Enhanced resistive switching performance of aluminum oxide dielectric with a low temperature solution-processed method

We reported a low-temperature solution-processed method for the fabrication of AlOx thin films in the memory device. The detailed study is carried out to figure out the effect of varying annealing temperatures (150, 200, 250, 300, and 350 °C) on resistive switching characteristics of solution-processed aluminum oxide dielectric. The dielectric properties of AlOx films under different annealing temperatures were evaluated by atomic force microscopy (AFM), thermogravimetric analysis-differential scanning calorimetry (TGA-DSC), X-ray diffraction (XRD), attenuated total reflection Fourier transform infrared spectroscopy (ATR-FTIR) and X-ray photoelectron spectroscopy (XPS) firstly. Then the AlOx films were used as the switching dielectric layer for a variety of low-temperature solution-processed oxide resistive random access memory (RRAM) devices. It was found that forming voltage increased with increasing annealing temperature and forming free behavior could be achieved by 200 °C sample. No repeatable resistance switching characteristics were observed in the devices with minimum (150 °C) and maximum (350 °C) annealing temperatures. Compared with the ALD-derived AlOx based RRAM devices in previous study, enhanced performance like small forming voltage, large resistance ratio (〈1 8 0) and narrow resistance and voltage distribution was achieved by the solution-processed AlOx based ones at the optimized low annealing temperatures of 200 to 250 °C, which would be applied in the bionic circuit simulated by synapses and neural networks. All three samples (200, 250, and 300 °C) obtained switching endurance up to 300 cycles and data retention over 104 s. Furthermore, the solution based fabrication method also has the potential in the flexible memory application due to the merit of the low-temperature process.

Effect of Oxygen Concentration Ratio on a Ga2O3-Based Resistive Random Access Memory

In this study, we have successfully prepared gallium oxide resistive random access memory by RF magnetron sputtering. The various Ar/O 2 gas flow was carefully controlled by different oxygen concentration to obtain proper Ga 2 O 3 film. It was demonstrated that the performance of the devices was improved by optimizing oxygen vacancy through deposition condition. Consequently, the sample with 25% of oxygen concentration exhibited the outstanding electrical properties with maximum cycles of 220, an I on /I off ratio of 5 × 10 4 , retention time of 10 4 s, high resistance state /low resistance state ratio of 7 × 10 5 under 0.1V read voltage.

Impact of Metal Nanocrystal Size and Distribution on Resistive Switching Parameters of Oxide-Based Resistive Random Access Memories

The introduction of metal nanocrystals (NCs) has been confirmed to improve electrical uniformity of oxide-based resistive random access memory (RRAM) devices significantly; however, the current reports do not systematically elucidate the relationship between the size/distribution of NCs and the electrical uniformity of RRAM devices. In this paper, we focused on the impact of metal NCs size and areal density on the resistive switching (RS) performances of oxide RRAM by atomic layer deposition (ALD) based on the experimental results and theoretical calculation. The dependence of ALD cycles of 50–130 during Pt or CoPt x NCs growth on the RS parameters of Al2O3 or HfO2 memory units has been evaluated systematically. The RRAM embedded Pt or CoPt x NCs shows the trends: with increasing ALD cycles, the forming voltage, set/reset voltage, the resistance in off and on state, and ${R}_{ \mathrm{\scriptscriptstyle OFF}}/{R}_{ \mathrm{\scriptscriptstyle ON}}$ ratio entirely first decrease, then flatten, and increase later with a minimum value at about 100 cycles. Although all metal NCs with various sizes enhance the electric field strength compared to at the planar region, only metal NCs with proper NCs size and areal density (9 nm/6– $10\times 10^{\textsf {11}}$ /cm2 in this paper) can effectively produce stronger localized electric field at the tip of metal NCs, leading to optimal RS behavior.

GGA-1/2 self-energy correction for accurate band structure calculations: the case of resistive switching oxides

First-principles calculation has become an indispensable methodology in revealing the working principles of nanoscale electronic devices, but ultra-large supercells are usually required in modeling the devices with critical metal/dielectric interfaces. Traditional density functional theory within the generalized gradient approximation (GGA) suffers from the inaccurate band gap problem when metal oxides are present, but they serve as the core component in resistive random access memory (RRAM), which is a promising path for novel high speed non-volatile memories. To obtain improved oxide band gaps, we applied the efficient GGA-1/2 method for self-energy correction, whose computational load is at the same level as standard GGA. In particular, we have investigated the influence of exchange-correlation functional flavors on the GGA-1/2 band structures, taking four important binary oxide RRAM materials (α-Al2O3, r-TiO2, m-ZrO2 and m-HfO2) as benchmark examples. Five GGA functionals (PBE, PBEsol, PW91, revPBE and AM05) were considered and their band structures were compared in detail. We have found that the performance of GGA-1/2 is comparable to state-of-the-art GW and generally superior to the HSE06 hybrid functional. Among the five GGA functionals, PBEsol yields the best results in general. In addition, the applicability of a single self-energy potential for various GGA-1/2 flavors is discussed. Our work provides a guide to the GGA flavor selection, when applying the GGA-1/2 method to metal oxides.

Au doping effects in ZrO&amp;lt;sub&amp;gt;2&amp;lt;/sub&amp;gt;-based resistance random access memory based on first-principles calculations

Oxygen vacancy plays the critical role for resistive switching in transition metal oxide resistive random access memory (RRAM). First principles calculation was performed to investigate the band structure, density of states, the oxygen vacancy formation energy and the migration barriers energy of pure ZrO2 and Au doped ZrO2, and we analyzed the impact of Au doping in ZrO2-based RRAM. It was found that the localized impurity band at the Fermi level appeared in forbidden band and the band gap was significantly reduced in Au doped ZrO2, which improved the conductivity of ZrO2. By doping Au in ZrO2, the formation energy and the migration barriers energy of oxygen vacancy were significantly reduced, indicating that it was beneficial to the formation and migration of oxygen vacancy and decreased the forming voltage and the set voltage of ZrO2-based RRAM. The electron localization function was used to study the [001] direction oxygen vacancy cluster of ZrO2 supercell with an Au doped element. The results showed that the oxygen vacancy around the impurity formed an ordered conductive filament in the [001] direction.

Insight Into the Mechanism of Tail Bits in Data Retention of Vacancy-Modulated Conductive Oxide RRAM

The underlying mechanism causing tail bits in data retention for high resistance state (HRS) of vacancy-modulated conductive oxide resistive RAM, consisting of TiN/amorphous-Si/TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /TiN structure, was investigated. The tail bits observed in the small size cells with large On/Off ratio were attributed to the current fluctuations in time. The mechanism, in which the current fluctuation is caused by the fragility of the conduction path in a high resistive region determining the cell current in TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> , was clarified by retention measurement with various conditions of On/Off ratio and cell size. It was found that the total number of defects in the high resistive region is the key to ensure a steady HRS conduction. We, furthermore, demonstrated a way to suppress the tail bits in the small size cells (40 ×40 nm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) even with large On/Off ratio (×10 ) by process tuning of TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> film fabrication.

An energy efficient and high speed architecture for convolution computing based on binary resistive random access memory

In this work we present a novel convolution computing architecture based on metal oxide resistive random access memory (RRAM) to process the image data stored in the RRAM arrays. The proposed image storage architecture shows performances of better speed-device consumption efficiency compared with the previous kernel storage architecture. Further we improve the architecture for a high accuracy and low power computing by utilizing the binary storage and the series resistor. For a 28 × 28 image and 10 kernels with a size of 3 × 3, compared with the previous kernel storage approach, the newly proposed architecture shows excellent performances including: 1) almost 100% accuracy within 20% LRS variation and 90% HRS variation; 2) more than 67 times speed boost; 3) 71.4% energy saving.

Spike-Timing Dependent Plasticity in Unipolar Silicon Oxide RRAM Devices.

Resistance switching, or Resistive RAM (RRAM) devices show considerable potential for application in hardware spiking neural networks (neuro-inspired computing) by mimicking some of the behavior of biological synapses, and hence enabling non-von Neumann computer architectures. Spike-timing dependent plasticity (STDP) is one such behavior, and one example of several classes of plasticity that are being examined with the aim of finding suitable algorithms for application in many computing tasks such as coincidence detection, classification and image recognition. In previous work we have demonstrated that the neuromorphic capabilities of silicon-rich silicon oxide (SiOx) resistance switching devices extend beyond plasticity to include thresholding, spiking, and integration. We previously demonstrated such behaviors in devices operated in the unipolar mode, opening up the question of whether we could add plasticity to the list of features exhibited by our devices. Here we demonstrate clear STDP in unipolar devices. Significantly, we show that the response of our devices is broadly similar to that of biological synapses. This work further reinforces the potential of simple two-terminal RRAM devices to mimic neuronal functionality in hardware spiking neural networks.

Investigation of resistance switching in SiOx RRAM cells using a 3D multi-scale kinetic Monte Carlo simulator

We employ an advanced three-dimensional (3D) electro-thermal simulator to explore the physics and potential of oxide-based resistive random-access memory (RRAM) cells. The physical simulation model has been developed recently, and couples a kinetic Monte Carlo study of electron and ionic transport to the self-heating phenomenon while accounting carefully for the physics of vacancy generation and recombination, and trapping mechanisms. The simulation framework successfully captures resistance switching, including the electroforming, set and reset processes, by modeling the dynamics of conductive filaments in the 3D space. This work focuses on the promising yet less studied RRAM structures based on silicon-rich silica (SiOx) RRAMs. We explain the intrinsic nature of resistance switching of the SiOx layer, analyze the effect of self-heating on device performance, highlight the role of the initial vacancy distributions acting as precursors for switching, and also stress the importance of using 3D physics-based models to capture accurately the switching processes. The simulation work is backed by experimental studies. The simulator is useful for improving our understanding of the little-known physics of SiOx resistive memory devices, as well as other oxide-based RRAM systems (e.g. transition metal oxide RRAMs), offering design and optimization capabilities with regard to the reliability and variability of memory cells.

Ion beam synthesis of indium-oxide nanocrystals for improvement of oxide resistive random-access memories

We report on the direct ion beam synthesis of a delta-layer of indium oxide nanocrystals (In2O3-NCs) in silica matrices by using ultra-low energy ion implantation. The formation of the indium oxide phase can be explained by (i) the affinity of indium with oxygen, (ii) the generation of a high excess of oxygen recoils generated by the implantation process in the region where the nanocrystals are formed and (iii) the proximity of the indium-based nanoparticles with the free surface and oxidation from the air. Taking advantage of the selective diffusivity of implanted indium in SiO2 with respect to Si3N4, In2O3-NCs have been inserted in the SiO2 switching oxide of micrometric planar oxide-based resistive random access memory (OxRAM) devices fabricated using the nanodamascene process. Preliminary electrical measurements show switch voltage from high to low resistance state. The devices with In2O3-NCs have been cycled 5 times with identical operating voltages and RESET current meanwhile no switch has been observed for non implanted devices. This first measurement of switching is very promising for the concept of In2O3-NCs based OxRAM memories.