Abstract
Resistive Random Access Memory (RRAM) is a promising technology for power efficient hardware in applications of artificial intelligence (AI) and machine learning (ML) implemented in non-von Neumann architectures. However, there is an unanswered question if the device non-idealities preclude the use of RRAM devices in this potentially disruptive technology. Here we investigate the question for the case of inference. Using experimental results from silicon oxide (SiOx) RRAM devices, that we use as proxies for physical weights, we demonstrate that acceptable accuracies in classification of handwritten digits (MNIST data set) can be achieved using non-ideal devices. We find that, for this test, the ratio of the high- and low-resistance device states is a crucial determinant of classification accuracy, with ~96.8% accuracy achievable for ratios >3, compared to ~97.3% accuracy achieved with ideal weights. Further, we investigate the effects of a finite number of discrete resistance states, sub-100% device yield, devices stuck at one of the resistance states, current/voltage non-linearities, programming non-linearities and device-to-device variability. Detailed analysis of the effects of the non-idealities will better inform the need for the optimization of particular device properties.
Highlights
Computation is at a crossroads thanks to the exponential growth in often complex and noisy unstructured data, and the ever-increasing demand for systems to process it
We present and discuss experimental results obtained from silicon oxide (SiOx)-based Resistive Random Access Memory (RRAM) devices in the context of their use as proxies for weights in Artificial neural networks (ANNs) implemented on crossbars
In our analysis we train ANNs using conventional software methods and simulate the effect on inference accuracy when the synaptic weights are mapped onto RRAM devices with nonideal characteristics, some of which have been extracted from the experiments described in subsection 2.1
Summary
Computation is at a crossroads thanks to the exponential growth in often complex and noisy unstructured data (data not in -accessible numerical form, but unorganized and text- or image-heavy), and the ever-increasing demand for systems to process it. The Internet of Things (IoT), Big Data, autonomous vehicles, and Artificial Intelligence (AI) pose severe challenges to the speed and power consumption of existing computing systems and suggest that we should change our approach. Present day von Neumann computing architectures require constant shuffling of data between memory and processing units, providing a critical performance bottleneck (McKee, 2004). Most clock cycles are wasted in moving data rather than computing, while physical separation of memory and processing builds in latency. Brain-inspired computing, as a potential solution to this pressing challenge, has gained significant attention. The main paradigm shift is in breaking the physical separation between memory and processing using novel non-von Neumann architectures (Wright et al, 2013). Related is a neuromorphic approach (Mead, 1989, 1990; Poon and Zhou, 2011), that draws inspiration from the human brain, which is a remarkable power-efficient system—many orders of magnitude better than the current most power-efficient CMOS systems
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