MoS2 Field-effect Transistors Research Articles

Tailoring amorphous boron nitride for high-performance two-dimensional electronics

Two-dimensional (2D) materials have garnered significant attention in recent years due to their atomically thin structure and unique electronic and optoelectronic properties. To harness their full potential for applications in next-generation electronics and photonics, precise control over the dielectric environment surrounding the 2D material is critical. The lack of nucleation sites on 2D surfaces to form thin, uniform dielectric layers often leads to interfacial defects that degrade the device performance, posing a major roadblock in the realization of 2D-based devices. Here, we demonstrate a wafer-scale, low-temperature process (<250 °C) using atomic layer deposition (ALD) for the synthesis of uniform, conformal amorphous boron nitride (aBN) thin films. ALD deposition temperatures between 125 and 250 °C result in stoichiometric films with high oxidative stability, yielding a dielectric strength of 8.2 MV/cm. Utilizing a seed-free ALD approach, we form uniform aBN dielectric layers on 2D surfaces and fabricate multiple quantum well structures of aBN/MoS2 and aBN-encapsulated double-gated monolayer (ML) MoS2 field-effect transistors to evaluate the impact of aBN dielectric environment on MoS2 optoelectronic and electronic properties. Our work in scalable aBN dielectric integration paves a way towards realizing the theoretical performance of 2D materials for next-generation electronics.

Manipulation of Charge Transport in MoS2/MoTe2 Field Effect Transistors and Heterostructure by Propagating the Surface Acoustic Wave.

Two-dimensional (2D) materials with atomic-scale thickness are promising candidates to develop next-generation electronic and optoelectronic devices with multiple functions due to their widely tunable physical properties by various stimuli. The surface acoustic wave (SAW) produced at the surface of the piezoelectrical substrate can generate electrical and strain fields simultaneously with micro/nanometer resolution during propagation. It provides a stable and wireless platform to manipulate the rich and fascinating properties of 2D materials. However, the interaction mechanisms between the SAW and 2D materials remain unclear, preventing further development and potential applications of SAW-integrated 2D devices. This work studied the acoustoelectric (AE) charge transport mechanism in 2D materials thoroughly by characterizing the performances of the n-type MoS2 and p-type MoTe2 field effect transistors (FETs) and the MoS2/MoTe2 p-n junction driven by the SAW. As compared to the case driven by the static electrical field alone, the SAW drove the electron and hole transport along the same direction as its propagation, and the generated AE current always had the opposite direction to the AE voltage. In the device level, the 2D FETs showed a significantly reduced subthreshold swing up to around 67% when the SAW was used to drive the channel carriers, indicating that the SAW enhanced the on/off switching speed. Moreover, the MoTe2/MoS2 p-n junction showed a tunable photoresponsivity by the power and propagation direction of the SAW. These findings provide a solid foundation to promote future research and potential applications of SAW-driven multifunctional devices based on 2D materials.

Enhanced Electrical Transport Properties of Molybdenum Disulfide Field-Effect Transistors by Using Alkali Metal Fluorides as Dielectric Capping Layers.

The electronic properties of 2D materials are highly influenced by the molecular activity at their interfaces. A method was proposed to address this issue by employing passivation techniques using monolayer MoS2 field-effect transistors (FETs) while preserving high performance. Herein, we have used alkali metal fluorides as dielectric capping layers, including lithium fluoride (LiF), sodium fluoride (NaF), and potassium fluoride (KF) dielectric capping layers, to mitigate the environmental impact of oxygen and water exposure. Among them, the LiF dielectric capping layer significantly improved the transistor performance, specifically in terms of enhanced field effect mobility from 74 to 137 cm2/V·s, increased current density from 17 μA/μm to 32.13 μA/μm at a drain voltage of Vd of 1 V, and decreased subthreshold swing to 0.8 V/dec The results have been analytically verified by X-ray photoelectron spectroscopy (XPS) and Raman, and photoluminescence (PL) spectroscopy, and the demonstrated technique can be extended to other transition metal dichalcogenide (TMD)-based FETs, which can become a prospect for cutting-edge electronic applications. These findings highlight certain important trade-offs and provide insight into the significance of interface control and passivation material choice on the electrical stability, performance, and enhancement of the MoS2 FET.

Direct Assessment of Defective Regions in Monolayer MoS2 Field-Effect Transistors through In Situ Scanning Probe Microscopy Measurements.

Implementing two-dimensional materials in field-effect transistors (FETs) offers the opportunity to continue the scaling trend in the complementary metal-oxide-semiconductor technology roadmap. Presently, the search for electrically active defects, in terms of both their density of energy states and their spatial distribution, has turned out to be of paramount importance in synthetic transition metal dichalcogenides layers, as they are suspected of severely inhibiting these devices from achieving their highest performance. Although advanced microscopy tools have allowed the direct detection of physical defects such as grain boundaries and point defects, their implementation at the device scale to assess the active defect distribution and their impact on field-induced channel charge modulation and current transport is strictly restrained. Therefore, it becomes critical to directly probe the gate modulation effect on the carrier population at the nanoscale of an FET channel, with the objective to establish a direct correlation with the device characteristics. Here, we have investigated the active channel in a monolayer MoS2 FET through in situ scanning probe microscopy, namely, Kelvin probe force microscopy and scanning capacitance microscopy, to directly identify active defect sites and to improve our understanding of the contribution of grain boundaries, bilayer islands, and defective grain domains to channel conductance.

In Operando Study of Charge Modulation in MoS2 Transistors by Excitonic Reflection Microscopy.

Monolayers of transition metal dichalcogenides (2D TMDs) experience strong modulation of their optical properties when the charge density is varied. Indeed, the transition from carriers composed mostly of excitons at low electron density to a situation in which trions dominate at high density is accompanied by a significant evolution of both the refractive index and the extinction coefficient. Using optical interference reflection microscopy at the excitonic wavelength, this (n, κ)-q relationship can be exploited to directly image the electron density in operating TMD devices. In this work, we show how this technique, which we call XRM (excitonic reflection microscopy), can be used to study charge distribution in MoS2 field-effect transistors with subsecond throughput, in wide-field mode. Complete maps of the charge distribution in the transistor channel at any drain and gate bias polarization point (VDS, VGS) are obtained, at ∼3 orders of magnitude faster than with scanning probe techniques such as KPFM. We notably show how the advantages of XRM enable real-time mapping of bias-dependent charge inhomogeneities, the study of resistive delays in 2D polycrystalline networks, and the evaluation of the VDS vs VGS competition to control the charge distribution in active devices.

A Molecular Coordination Strategy for Regulating the Interface of MoS2 Field Effect Transistors.

Chemically modifying monolayer two-dimensional transition metal dichalcogenides (TMDs) with organic molecules provides a wide range of possibilities to regulate the electronic and optoelectronic performance of both materials and devices. However, it remains challenging to chemically attach organic molecules to monolayer TMDs without damaging their crystal structures. Herein, we show that the Mo atoms of monolayer MoS2 (1L-MoS2) in defect states can coordinate with both catechol and 1,10-phenanthroline (Phen) groups, affording a facile route to chemically modifying 1L-MoS2. Through the design of two isomeric molecules (LA2 and LA5) comprising catechol and Phen groups, we show that attaching organic molecules to Mo atoms via coordinative bonds has no negative effect on the crystal structure of 1L-MoS2. Both theoretical calculation and experiment results indicate that the coordinative strategy is beneficial for (i) repairing sulfur vacancies and passivating defects; (ii) achieving a long-term and stable n-doping effect; and (iii) facilitating the electron transfer. Field effect transistors (FETs) based on the coordinatively modified 1L-MoS2 show high electron mobilities up to 120.3 cm2 V-1 s-1 with impressive current on/off ratios over 109. Our results indicate that coordinatively attaching catechol- or Phen-bearing molecules may be a general method for the nondestructive modification of TMDs.

Nanoscale Channel Length MoS2 Vertical Field-Effect Transistor Arrays with Side-Wall Source/Drain Electrodes.

Two-dimensional transition metal dichalcogenides (TMDCs) have natural advantages in overcoming the short-channel effect in field-effect transistors (FETs) and in fabricating three-dimensional FETs, which benefit in increasing device density. However, so far, most reported works related to MoS2 FETs with a sub-100 nm channel employ mechanically exfoliated materials and all of the works involve electron beam lithography (EBL), which may limit their application in fabricating wafer-scale device arrays as demanded in integrated circuits (ICs). In this work, MoS2 FET arrays with a side-wall source and drain electrodes vertically distributed are designed and fabricated. The channel length of the as-fabricated FET is basically determined by the thickness of an insulating layer between the source and drain electrodes. The vertically distributed source and drain electrodes enable to reduce the electrode-occupied area and increase in the device density. The as-fabricated vertical FETs exhibit on/off ratios comparable to those of mechanically exfoliated MoS2 FETs with a nanoscale channel length under identical VDS. In addition, the as-fabricated FETs can work at a VDS as low as 10 mV with a desirable on/off ratio (1.9 × 107), which benefits in developing low-power devices. Moreover, the fabrication process is free from EBL and can be applied to wafer-scale device arrays. The statistical results show that the fabricated FET arrays have a device yield of 87.5% and an average on/off ratio of about 1.7 × 106 at a VDS of 10 mV, with the lowest and highest ones to be about 1.3 × 104 and 1.9 × 107, respectively, demonstrating the good reliability of our fabrication process. Our work promises a bright future for TMDCs in realizing high-density and low-power nanoelectronic devices in ICs.

Flexible High-Temperature MoS2 Field-Effect Transistors and Logic Gates.

High-temperature-resistant integrated circuits with excellent flexibility, a high integration level (nanoscale transistors), and low power consumption are highly desired in many fields, including aerospace. Compared with conventional SiC high-temperature transistors, transistors based on two-dimensional (2D) MoS2 have advantages of superb flexibility, atomic scale, and ultralow power consumption. However, MoS2 cannot survive at high temperature and drastically degrades above 200 °C. Here, we report MoS2 field-effect transistors (FETs) with top/bottom hexagonal boron nitride (h-BN) encapsulation and graphene electrodes. With the protection of the h-BN/h-BN structure, the devices can survive at much higher temperature (≥500 °C in air) than those of the MoS2 devices ever reported, which provides us an opportunity to explore the electrical properties and working mechanism of MoS2 devices at high temperature. Unlike the relatively low-temperature situation, the on/off ratio and subthreshold swing of MoS2 FETs show drastic variation at elevated temperature due to the injection of thermal emission carriers. Compared with metal electrode, devices with a graphene electrode demonstrate superior performance at high temperature (∼1-order-larger current on/off ratio, 3-7 times smaller subthreshold swing, and 5-9 times smaller threshold voltage shift). We further realize that the flexible CMOS NOT gate based on the above technique, and demonstrate logic computing at 550 °C. This work may stimulate the fundamental research of properties of 2D materials at high temperature, and also creates conditions for next-generation flexible harsh-environment-resistant integrated circuits.

Reducing contact resistance of MoS2-based field effect transistors through uniform interlayer insertion via atomic layer deposition.

Molybdenum disulfide (MoS2), a semiconducting two-dimensional layered transition metal dichalcogenide (2D TMDC), with attractive properties enables the opening of a new electronics era beyond Si. However, the notoriously high contact resistance (RC) regardless of the electrode metal has been a major challenge in the practical applications of MoS2-based electronics. Moreover, it is difficult to lower RC because the conventional doping technique is unsuitable for MoS2 due to its ultrathin nature. Therefore, the metal-insulator-semiconductor (MIS) architecture has been proposed as a method to fabricate a reliable and stable contact with low RC. Herein, we introduce a strategy to fabricate MIS contact based on atomic layer deposition (ALD) to dramatically reduce the RC of single-layer MoS2 field effect transistors (FETs). We utilize ALD Al2O3 as an interlayer for the MIS contact of bottom-gated MoS2 FETs. Based on the Langmuir isotherm, the uniformity of ALD Al2O3 films on MoS2 can be increased by modulating the precursor injection pressures even at low temperatures of 150 °C. We discovered, for the first time, that film uniformity critically affects RC without altering the film thickness. Additionally, we can add functionality to the uniform interlayer by adopting isopropyl alcohol (IPA) as an oxidant. Tunneling resistance across the MIS contact is lowered by n-type doping of MoS2 induced by IPA as the oxidant in the ALD process. Through a highly uniform interlayer combined with strong doping, the contact resistance is improved by more than two orders of magnitude compared to that of other MoS2 FETs fabricated in this study.

Switching of n- and p-type doping with partial pressure of oxygen gas on few layers MoS2-field effect transistor

We examined the oxygen adsorption effect on the electric property of the field-effect transistor with an atomic layer MoS2 channel, whose experiment was executed in well-defined ultra-high vacuum conditions and with surface treatment. The threshold voltage change of the Id-Vg curve with the oxygen partial pressure shows n-type doping in the low-pressure range and p-type doping in the high-pressure range. In this report, the Vth vs. oxygen partial pressure uptake curve is well modeled with the Langmuir type adsorption/desorption. The deduced adsorption energy indicates that the adsorbed species are oxygen atoms on the pristine MoS2, suggesting a catalytic behavior of MoS2 for the oxygen reduction reaction. The oxygen adsorption at the S vacant site induces the initial n-type doping. DFT calculation illustrates that, despite the electron transfer from the substrate to the oxygen molecule, the electronic structure change causes the n-type doping.

Diffusion Control on the Van der Waals Surface of Monolayers for Uniform Bi‐Layer MoS2 Growth

Abstract2D MoS2 has gained attention for the post‐silicon material owing to its atomically thin nature and dangling bond‐free surface. The bi‐layer MoS2 is considered a promising material for electronic devices due to its better electrical properties than monolayer MoS2. However, the uniform growth of bi‐layer MoS2 is still challenging. Herein, the uniform growth of bi‐layer MoS2 is demonstrated using gas‐phase alkali metal‐assisted metal–organic chemical vapor deposition (GAA‐MOCVD). Thanks to enhanced metal reactant diffusion length in GAA‐MOCVD, the uniform growth of bi‐layer MoS2 film is achieved even at fast nucleation kinetics for a shorter growth time compared to previously reported MOCVD. The bi‐layer MoS2 field‐effect transistors (FETs) show superior electrical properties such as sheet conductance and electron mobility than monolayer MoS2 FETs. The electron mobility of bi‐layer MoS2 FETs with bismuth contacts reaches a maximum of 92.35 cm2 V−1 s−1. Using the partially grown epitaxial bi‐layer (PGEB) MoS2, it is demonstrated that a photodetector showed a near‐infrared photoresponse with a low dark current that is advantageous for both monolayer and bi‐layer applications. The potential expansion of the growth technique to layer‐by‐layer growth can result in boosted performance across a wide spectrum of electronic and optoelectronic devices employing MoS2.

MoS2 Field-Effect Transistor Performance Enhancement by Contact Doping and Defect Passivation via Fluorine Ions and Its Cyclic Field-Assisted Activation.

MoS2-based field-effect transistors (FETs) and, in general, transition metal dichalcogenide channels are fundamentally limited by high contact resistance (RC) and intrinsic defects, which results in low drive current and lower carrier mobilities, respectively. This work addresses these issues using a technique based on CF4 plasma treatment in the contacts and further cyclic field-assisted drift and activation of the fluorine ions (F-), which get introduced into the contact region during the CF4 plasma treatment. The F- ions are activated using cyclic pulses applied across the source-drain (S/D) contacts, which leads to their migration to the contact edges via the channel. Further, using ab initio molecular dynamics and density functional theory simulations, these F- ions are found to bond at sulfur (S) vacancies, resulting in their passivation and n-type doping in the channel and near the S/D contacts. An increase in doping results in the narrowing of the Schottky barrier width and a reduction in RC by ∼90%. Additionally, the passivation of S vacancies in the channel enhances the mobility of the FET by ∼150%. The CF4 plasma treatment in contacts and further cyclic field-assisted activation of F- ions resulted in an ON-current (ION) improvement by ∼90% and ∼480% for exfoliated and CVD-grown MoS2, respectively. Moreover, this improvement in ION has been achieved without any deterioration in the ION/IOFF, which was found to be >7-8 orders.

Selected Area Manipulation of MoS2 via Focused Electron Beam-Induced Etching for Nanoscale Device Editing.

We demonstrate direct-write patterning of single and multilayer MoS2 via a focused electron beam-induced etching (FEBIE) process mediated with the XeF2 precursor. MoS2 etching is performed at various currents, areal doses, on different substrates, and characterized using scanning electron and atomic force microscopies as well as Raman and photoluminescence spectroscopies. Scanning transmission electron microscopy reveals a sub-40 nm etching resolution and the progression of point defects and lateral etching of the consequent unsaturated bonds. The results confirm that the electron beam-induced etching process is minimally invasive to the underlying material in comparison to ion beam techniques, which damage the subsurface material. Single-layer MoS2 field-effect transistors are fabricated, and device characteristics are compared for channels that are edited via the selected area etching process. The source-drain current at constant gate and source-drain voltage scale linearly with the edited channel width. Moreover, the mobility of the narrowest channel width decreases, suggesting that backscattered and secondary electrons collaterally affect the periphery of the removed area. Focused electron beam doses on single-layer transistors below the etching threshold were also explored as a means to modify/thin the channel layer. The FEBIE exposures showed demonstrative effects via the transistor transfer characteristics, photoluminescence spectroscopy, and Raman spectroscopy. While strategies to minimize backscattered and secondary electron interactions outside of the scanned regions require further investigation, here, we show that FEBIE is a viable approach for selective nanoscale editing of MoS2 devices.

Investigation of negative differential resistance in metal-edge-contact MoS2 field effect transistor

Negative differential resistance (NDR) is observed in various emerging electronic devices. As compared to the conventional silicon-based field effect transistor (FET), the NDR is widely investigated in two-dimensional (2D) transition metal dichalcogenide (TMD) FETs. In this work, we study the NDR effect for the TMD-based metal-edge-contact MoS2 double-gate FET with 10 nm channel length. The multiscale atomistic simulation is demonstrated for the lateral heterostructure of a metal–semiconductor–metal FET by density functional theory, maximally localized Wannier function tight-binding Hamiltonian, and non-equilibrium Green’s function methods. The quantum transport model in the given lateral heterostructure resulted in NDR in a double-gate FET. Here, we focus on the NDR by the systematic study of the transmission spectrum of the metal-edge-contact MoS2 channel FET and finally compare it with zero NDR ideal highly doped FET. The peak-to-valley ratio in the NDR response can be modulated with the change in the gate-to-source voltage and can be used to explore various future electronic applications.

Process implications on the stability and reliability of 300 mm FAB MoS2 field-effect transistors

Recent advances in fabricating field-effect transistors with MoS2 and other related two-dimensional (2D) semiconductors have inspired the industry to begin with the integration of these emerging technologies into FAB-compatible process flows. Just like in the lab research on 2D devices performed in the last decade, focus during development is typically put on pure technology-related issues, such as low-temperature growth methods of large-area 2D films on target substrates, damage-free transfer from sacrificial substrates and growth of top-gate oxides. With maturing technology, the problem of stability limitations caused by oxide traps is gradually coming into focus now. Thus, here we report an in-depth analysis of hysteresis and bias-temperature instabilities for MoS2 FETs fabricated using a 300 mm FAB-compatible process. By performing a comprehensive statistical analysis on devices with top gate lengths ranging between 18 nm and 10 μm, we demonstrate that aggressive scaling results in additional stability problems, likely caused by defective edges of the scaled top gates, in particular at higher operation temperatures. These are important insights for understanding and addressing the stability limitations in future nanoscale 2D FETs produced using FAB process lines.

High-Temperature and High-Electron Mobility Metal-Oxide-Semiconductor Field-Effect Transistors Based on N-Type Diamond.

Diamond holds the highest figure-of-merits among all the known semiconductors for next-generation electronic devices far beyond the performance of conventional semiconductor silicon. To realize diamond integrated circuits, both n- and p-channel conductivity are required for the development of diamond complementary metal-oxide-semiconductor (CMOS) devices, as those established for semiconductor silicon. However, diamond CMOS has never been achieved due to the challenge in n-type channel MOS field-effect transistors (MOSFETs). Here, electronic-grade phosphorus-doped n-type diamond epilayer with an atomically flat surface based on step-flow nucleation mode is fabricated. Consequently, n-channel diamond MOSFETs are demonstrated. The n-type diamond MOSFETs exhibit a high field-effect mobility around 150cm2V-1 s-1 at 573K, which is the highest among all the n-channel MOSFETs based on wide-bandgap semiconductors. This work enables the development of energy-efficient and high-reliability CMOS integrated circuits for high-power electronics, integrated spintronics, and extreme sensors under harsh environments.

Three-dimensional integration of two-dimensional field-effect transistors.

In the field of semiconductors, three-dimensional (3D) integration not only enables packaging of more devices per unit area, referred to as 'More Moore'1 but also introduces multifunctionalities for 'More than Moore'2 technologies. Although silicon-based 3D integrated circuits are commercially available3-5, there is limited effort on 3D integration of emerging nanomaterials6,7 such as two-dimensional (2D) materials despite their unique functionalities7-10. Here we demonstrate (1) wafer-scale and monolithic two-tier 3D integration based on MoS2 with more than 10,000 field-effect transistors (FETs) in each tier; (2) three-tier 3D integration based on both MoS2 and WSe2 with about 500 FETs in each tier; and (3) two-tier 3D integration based on 200 scaled MoS2 FETs (channel length, LCH = 45 nm) in each tier. We also realize a 3D circuit and demonstrate multifunctional capabilities, including sensing and storage. We believe that our demonstrations will serve as the foundation for more sophisticated, highly dense and functionally divergent integrated circuits with a larger number of tiers integrated monolithically in the third dimension.

In-situ methyl red doped MoS2 field effect transistor made by atomically thin MoS2 channel

Here we present the effects of Methyl Red (MR) doping on the electrical properties of the MoS2 field effect transistor (FET) in in-situ experimental system where the doping and electrical measurement are carried out in a single ultra-high vacuum chamber. A single-layered MoS2 flake was used as channel material for the FET preparation. N-type doping by MR was confirmed by the left shift of threshold voltage (Vth) and the surface vibrational change measured by Raman spectroscopy. The n-doping by MR is implied by the Fermi level shift towards greater binding energy with MR coverage, as proven by an X-ray photoelectron spectroscopy (XPS) measurement. It is estimated from XPS that the MoS2-FET device may detect the doping effect from the sub-monolayer MR. MR was detected on the MoS2 surface by the Time-of-Flight Secondary Ionization Mass Spectroscopy (ToF-SIMS). The findings may pave the way for innovations in electronic device design, with potential implications for fields ranging from nanoelectronics to sensor technology.

Improving electron mobility in MoS2 field-effect transistors by optimizing the interface contact and enhancing the channel conductance through local structural phase transition

A structural phase incorporation strategy was proposed to improve the electron mobility of MoS2 FETs up to 237 cm2 V−1 s−1.

(Invited) Technology Scaling from Bulk to Fin and Nano-Sheet Transistors

In recent years, scaling of semiconductor device has progressed, leading to the development of advanced semiconductor devices with code names of below 10-nm. Various new materials and technologies have been introduced to accompany the miniaturization of semiconductor devices. First, the resistivity of aluminum became higher due to miniaturization, and aluminum was replaced by copper as the wiring metal. Then, to increase the gate capacitance of MOS field-effect transistors, the thickness of the gate insulating film (SiO2) was reduced to the limit, and as a result, gate leakage current could no longer be suppressed, which led to the introduction of a high-k gate insulating films (HfO2).The next bottleneck in miniaturization was the suppression of short channel effects. As the gate length became smaller, the gate electrode's control over the channel decreased, resulting in the generation of a small amount of leakage current even when the transistor is turned off, and the threshold voltage also fluctuated as the gate length became shorter, which interfered with circuit operation. To suppress the short-channel effect, the conventional bulk transistor was replaced around 2011 by a transistor with an upright channel, called a fin transistor. The purpose of this is to increase the gate's dominance over the channel, suppress leakage current, and prevent the short-channel effect by having multiple opposing gate electrodes for the raised channel. However, since the channel width of a fin transistor corresponds to the sidewall height, a fin with a high height must be formed to increase the channel width and gain total current density, which has been a problem in terms of processing technology. In addition, in order to increase the current, a layout configuration with multiple fins formed horizontally had to be adopted, which increased the area of the chip, thereby hindering the integration of the chip.This leads to an increase in the area of the chip, which in turn hinders high integration of the chip. The nanosheet transistor is a new transistor structure in which multiple 10-nm-thick "nanosheets" of silicon are stacked in the height direction to form the transistor channel. Another major feature of this nanosheet transistor is the use of a gate all-around structure, which is a further development of the gate structure of the double gate type. As a result, this structure is the most effective in suppressing short channels. Furthermore, by stacking nanosheets vertically, it is possible to increase the current density per unit area without increasing the chip area. As a further evolution of the nanosheet transistor, a complementary FET (CFET) structure is currently being considered, in which pMOS and nMOS are stacked vertically to realize a CMOS circuit in the vertical direction. So far, CFETs with pn stacked in silicon and attempts to form CFETs by laminating silicon and germanium together have been presented. In Japan, research and mass production of this nanosheet type transistor has recently been planned, overtaking mass production of fin transistors.