Transistor Model Research Articles

Modeling of heterojunction bipolar transistors based on novel Wiener‐type dynamic neural network

A novel Wiener-type dynamic neural network modeling method for heterojunction bipolar transistors (HBTs) is proposed in this article. The model structure of the novel Wiener-type dynamic neural network applicable to HBT modeling is determined by the vector fitting. For the novel Wiener-type dynamic neural network structure, we also proposed a training algorithm applicable to this novel structure to improve its accuracy. We considered the transmission characteristics of the HBT and use the H-parameter to replace the Y-parameter for small-signal analysis. The DC and small-signal model formulas for HBT are also derived. The proposed novel Wiener-type dynamic neural network modeling method does not require detailed parameter information and the internal design structure of the HBT and can model any type of HBT as long as accurate training data are available. In this paper, an application example on modeling a 3 × 30 μ m 2 InGaP/GaAs HBT is presented, and a combined DC and small-signal model is established to demonstrate the accuracy and feasibility of the proposed novel Wiener-type dynamic neural network modeling method. The modeling method can also be used for computer-aided design, and the established models can be more easily applied to circuit simulation.

Subthreshold modeling of ambipolar organic field-effect transistor based on field-dependent mobility

In the present work, an ambipolar charge transport model based on the field dependent mobility is presented for the electron accumulation mode. The model is derived using the charge drift approach, which is later extended to include subthreshold ambipolar region, using an asymptotically interpolation function. A methodology for the extraction of model parameters is discussed. The extracted parameters are then used to obtain the field dependent mobility for both holes and electrons. The role of traps in modulating the electron and hole mobility as a function of gate voltage is presented. It is demonstrated that the output and transfer characteristics obtained from the model are in close proximity with the experimental results presented by of Zhang et al. (2017).

A Physics-Based Model for Mobile-Ionic Field-Effect Transistors With Steep Subthreshold Swing

A physics-based model and the corresponding simulation framework for the mobile-ionic field-effect transistor (MIFET) exhibiting the ferroelectric-like behaviors are innovatively proposed based on two-dimensional (2D) Poisson’s equation and non-equilibrium Green’s function (NEGF), coupling with ion drift-diffusion equations. The simulation framework captures the dynamic distribution of mobile ions’ concentrations within dielectric along the external electric field. TaN/amorphous-ZrO2/TaN capacitors are experimentally characterized for the model calibration. It is proved that the mobile ions dominate the ferroelectriclike behaviors in MIFETs. Sub-60 mV/decade can be achieved in MIFETs based on the proposed model, which is consistent with the experimental results.

Optimization based on electro-thermo-mechanical modeling of the high electron mobility transistor (HEMT)

The electro-thermomechanical modeling study of the High Electron Mobility Transistor (HEMT) has been presented, all the necessary equations are detailed and coupled. This proposed modeling by the finite element method using the Comsol multiphysics software, allowed to study the multiphysics behaviour of the transistor and to observe the different degradations in the structure of the component. Then, an optimization study is necessary to avoid failures in the transistor. In this work, we have used the Covariance Matrix Adaptation-Evolution Strategy (CMA-ES) method to solve the optimization problem, but it requires a very important computing time. Therefore, we proposed the kriging assisted CMA-ES method (KA-CMA-ES), it is an integration of the kriging metamodel in the CMA-ES method, it allows us to solve the problem of optimization and overcome the constraint of calculation time. All these methods are well detailed in this paper. The coupling of the finite element model developed on Comsol Multiphysics and the KA-CMA-ES method on Matlab software, allowed to optimize the multiphysics behaviour of the transistors. We made a comparison between the results of the numerical simulations of the initial state and the optimal state of the component. It was found that the proposed KA-CMA-ES method is efficient in solving optimization problems.

Real-Time Nonlinear Behavioral Electrothermal Device-Level Emulation of IGBT on Heterogeneous Adaptive Compute Acceleration Platform

Power converter design evaluation by means of real-time simulation techniques is prevalent, although it is mostly restricted to simple power semiconductor switch models that exclude device-level physical details. In this work, the nonlinear high-order electro-thermal model of the Insulated-gate bipolar transistor (IGBT) is developed and then deployed onto the heterogeneous digital hardware for real-time implementation. As the complexity of the nonlinear behavioral model (NBM) of the IGBT poses a significant computational burden on real-time hardware emulation, machine learning (ML) methodology is utilized so that the trained model can reproduce the characteristics of its original counterpart as much as possible and then it is implemented on the Adaptive Compute Acceleration Platform (ACAP), which composes of the processing system (PS), programmable logic (PL), and Artificial Intelligent Engine (AIE). The vector multiplication feature of the AIE caters to mathematical operations of the ML-based model particularly well and consequently enables it to be executed in real-time with remarkable speedup over the original model with which matrix inversion is otherwise mandatory. Finally, the validation for real-time device-level results and system-level results of a multi-converter system is provided by SaberRD® and MATLAB/Simulink®.

Real-Time ML-Assisted Hardware-in-the-Loop Electro-Thermal Emulation of LVDC Microgrid on the International Space Station

For being the world’s largest low voltage direct current (LVDC) microgrid (MG) in space, the power generation and distribution systems aboard the International Space Station (ISS) employ a hierarchical assortment of electric power sources, energy storage, control devices, power electronics, and loads operating cooperatively at multifarious system dispositions and multi-stage configurations. At the early phase of design, for such time-critical systems, the trade-off between reliability and convergence rate of device modeling, varying accuracy requirements of control flows, and especially the implementation for real-time performance have brought new challenges and problems for testing and validation of the MG. One of the solutions presented by this paper is to use the hardware-in-the-loop (HIL) emulation, where the MG is emulated using the field-programmable gate array (FPGA) hardware platform. In parallel with the emulation effort, comprehensive modeling solutions for both large-scale photovoltaic (PV) solar array wings (SAWs) and nonlinear behavior model (NBM) of insulated-gate bipolar transistors (IGBTs) have been utilized based on machine learning (ML) concepts of artificial neural network (ANN) and recurrent neural network (RNN). Both system-level (validated by Matlab/Simulink) and device-level (validated by SaberRD) transient simulations are carried out, and the results exhibit high accuracy and fidelity of the models and significant improvements in execution speed and hardware resource consumption.

A New Approach for Designing and Analysis of High Flat Gain Broadband Low Noise Amplifier Using Real Frequency Technique

This paper introduces a high flat gain broadband Low Noise Amplifier (LNA) design approach, which is based on using a new methodology of Real Frequency Technique (RFT). To get this done, the optimum matching network has been designed with second-order LC lumped elements to minimize the Noise Figure (NF) and maximize the Transducer Gain (GT) based on selecting the optimum (ZS, ZL) LNA terminations that have been used over a 2.1-4.2 GHz. The design has demonstrated a high stable gain in the range of 19.19 –18.73 dB with ± 0.2 dB gain flatness over the specified band. Moreover, the NF has been obtained at 0.68 – 0.82 dB and a stable operation throughout a broad bandwidth. Furthermore, the proposed method results have been compared with an analytical methodology which is based on computing equivalent input and output circuits for the transistor model using its scattering parameters. For the verification purpose, the performances of the synthesized amplifier are compared using MATLAB platform and ADS simulation software. The output results have a good agreement with the proposed method outcomes, which makes this method a new promising technique for the high flat gain broadband LNA design.

A High-Efficiency Self-Synchronous RF–DC Rectifier Based on Time-Reversal Duality for Wireless Power Transfer Applications

An RF–DC rectifier is an important part in a wireless power transfer system. Diode-based rectifiers are widely used in low-power harvesting scenarios, and for high power, a transistor based on the time-reversal duality was proposed. This paper presents a high-efficiency self-synchronous RF–DC rectifier based on a waveform-guided design method and an improved rectification model of a commercial GaN device. The main contributions of this paper are that (1) an improved transistor model with correct reverse bias is built for accurate rectifier simulation, and (2) a new design method of self-synchronous RF–DC rectifier is proposed: as soon as the operating mode of the rectifier, input power, and DC load are set, matching and coupling network can be calculated directly based on waveform-guided method, thus design and adjustment process of a conventional power amplifier (PA) due to the duality between a PA and a rectifier would no longer be required. A 5.8 GHz self-synchronous RF–DC rectifier is designed for validation, and the optimum RF–DC conversion efficiency is 68% with 12 W input power as well as 19.9 V output DC potential with 50 Ω load resistance. The proposed rectifier is suitable for high input power rectification applications of wireless power transfer.

Modeling optical transistor based on the pole effect of parity-time symmetric coupled cavities

In order to achieve a new kind of optical transistor model, we construct a parity-time (PT) symmetry coupled cavity structure. The gain cavity G is made of semiconductor InGaAsP doped with quantum well and the loss cavity is made of the same material as G but periodically inserted by graphene sheets. Through a parameter optimizing, the structure reaches the PT-symmetry pole state with a huge transmittance. The voltage on the graphene sheets as an input signal can modulate the pole state and results in an amplification output of transmittance. Through proper static working points, the structure can achieve the amplification in phase, out phase and of doubling frequency.

Impact of base bias current and incident optical power on the InP/InGaAs heterojunction phototransistor performances

In this article, the optical and electrical properties of NPN InP/InGaAs heterojunction bipolar phototransistor (HPT) are studied by two dimensional semiconductor simulation. The phototransistor is modelled using a numerical method, and the results are presented and discussed. This model is based on heterojunction bipolar transistor (HBT) model with the consideration of the optical beam effect. Responsivity of 12.62 A/W for 1100 nm light is achieved when the thickness of base layer is 50 nm. A good qualitative agreement of the numerical and analytical simulated value of both collector current and responsivity as a function of the wavelength with the existing experimental data was achieved. We present a comparative analysis of our obtained solutions at IB = 5 μA with that simulated at IB = 100 μA and we found that the value of optical power (Popt) giving high injection into a phototransistor at IB = 5 μA is three times higher than that at IB = 100 μA. The effects of both the base bias current and the incident optical power on the device performance are investigated. The simulation results, which are presented and compared at low, ideal and high base bias current, show that the highest photocurrent and optical gain are obtained when the base bias current reaches the ideal region. The HPT optical characteristics such as the electrical characteristics of HBT are affected by the high injection effect (Kirk effect).

Modeling the Double Layer Capacitance Effect in Electrolyte Gated FETs with Gel and Aqueous Electrolytes.

Potential implementation of bio-gel Electrolyte Double Layer capacitors (bio-gel EDLCs) and electrolyte-gated FET biosensors, two commonly reported configurations of bio-electrolytic electronic devices, requires a robust analysis of their complex internal capacitive behavior. Presently there is neither enough of the parameter extraction literature, nor an effective simulation model to represent the transient behavior of these systems. Our work aims to supplement present transient thin film transistor modelling techniques with the reported parameter extraction method, to accurately model both bio-gel EDLC and the aqueous electrolyte gated FET devices. Our parameter extraction method was tested with capacitors analogous to polymer-electrolyte gated FETs, electrolyte gated Field effect transistor (EGOFET) and Organic Electrolyte Gated Field Effect Transistor (OEGFET) capacitance stacks. Our method predicts the input/output electrical behavior of bio-gel EDLC and EGOFET devices far more accurately than conventional DLC techniques, with less than 5% error. It is also more effective in capturing the characteristic aqueous electrolyte charging behavior and maximum charging capability which are unique to these systems, than the conventional DLC Zubieta and the Two branch models. We believe this significant improvement in device simulation is a pivotal step towards further integration and commercial implementation of organic bio-electrolyte devices. The effective reproduction of the transient response of the OEGFET equivalent system also predicts the transient capacitive effects observed in our previously reported label-free OEGFET biosensor devices. This is the first parameter extraction method specifically designed for electrical parameter-based modelling of organic bio-electrolytic capacitor devices.

Modeling of Power Module for 48 V High Power Inverter

The paper presents simulation and measurement results of high current three-phase inverter power modules used in 48V motor application. Firstly, FEM (Finite Element Method) is used to extract circuit parasitics. With the inclusion of MOSFET and passive component SPICE models, highly accurate simulation model is created. Switching characteristics of power module are simulated at 300 A load current and 48 V battery voltage. Thermal simulations estimate maximum transistor temperatures at given power losses. Electrical simulations are compared to actual measurements under identical test conditions. Comparison shows good matching between simulations and measurements. The phase voltage rise and fall times are the same in simulations and measurements. The overshoot voltages are also the same in both cases, around 28 V. The mismatch can be found in the currents of secondary loops. The gate voltage signal is similar with small mismatch of Miller plateau voltage, due to transistor model parameters mismatch.

A Compact Physical Drain Current Model of Multitube Carbon Nanotube Field Effect Transistor Including Diameter Dispersion Effects

Carbon nanotube field-effect transistor (CNTFET) shows great potential for digital and analog applications due to the unique 1-D ballistic carrier transport in carbon nanotubes (CNTs). A new compact physical model for CNT Schottky-barrier transistors is proposed in this article. The Schottky barrier between the contact metal and CNTs is described by using an effective barrier height, and more importantly, the influence of using CNT arrays or networks rather than a single CNT as the device channel is considered in this model. Moreover, the trapping effect is investigated and modeled by adding <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RC</i> delay element to the equivalent circuit. The model is proposed in a concise form to avoid complex operations such as integration and is compatible with circuit simulation. The simulation results of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}-{V}$ </tex-math></inline-formula> characteristics are verified to be in agreement with experimental data.

Model of a single-electron transistor based on endohedral fullerene (Sc3N)@C80

In this work within the framework of the density functional theory and the method of nonequilibrium Green’s functions the dependences of the total energy of molecules C80-SET and (Sc3N)@C80 - SET on their total charge, the dependence of the total energy from the gate voltage and the stability diagram of the single-electron transistor have been determined. It is noted that for transition to switch to on mode (Sc3N)@C80-SET it is necessary to apply the gate voltage in the range from 0.019 ≤ VG ≤ 5.940 with the bias voltage -2.040 ≤ VSD ≤ 2.155 V. Considering that at values of bias voltage equal to –0.381 ≤ VSD ≤ 0.533 V there is no voltage on the substrate (VG = 0 V) and electric current does not flow. It is shown that the total energy at negative values of charge is higher than at positive charges and that the area of the Coulomb rhombus in fullerene with scandium nitride is 5.3 times larger than in “pure” fullerene.

Experimental studies and a double gate JFET model for analog integrated circuits

One of directions of improving parameters of analog integrated circuits is a development of new and modernization of existing designs of integrated elements without significantly changing of a technological route of integrated circuit manufacturing with a simultaneous creation of new integrated elements models. The article considers the results of experimental studies of the double gate junction field-effect transistor manufactured according to the 3CBiT technological route of JSC Integral. Based on the obtained results, the electrical model of double gate junction field-effect transistor is proposed, which describes the features of its application in analog integrated circuits. Comparison of I-V characteristics of measurements results and created model simulation are presented. A small capacity and a reverse current of a double gate junction field-effect transistor top gate, an ability to compensate for the DC (direct current) component of an input current provide a significant improvement in the characteristics of analog integrated circuits such as electrometric operational amplifiers and charge-sensitive amplifiers. The developed double gate junction field-effect transistor can be used in signal readout devices required in the analog interfaces of space instrument sensors and nuclear electronics.

Contact spacing controls the on-current for all-carbon field effect transistors

All-carbon field-effect transistors, which combine carbon nanotubes and graphene hold great promise for many applications such as digital logic devices and single-photon emitters. However, the understanding of the physical properties of carbon nanotube (CNT)/graphene hybrid systems in such devices remained limited. In this combined experimental and theoretical study, we use a quantum transport model for field-effect transistors based on graphene electrodes and CNT channels to explain the experimentally observed low on currents. We find that large graphene/CNT spacing and short contact lengths limit the device performance. We have also elucidated in this work the experimentally observed ambipolar transport behavior caused by the flat conduction- and valence-bands and describe non-ideal gate-control of the contacts and channel region by the quantum capacitance of graphene and the carbon nanotube. We hope that our insights will accelerate the design of efficient all-carbon field-effect transistors.

A SPICE Model for IGBTs and Power MOSFETs Focusing on EMI/EMC in High-Voltage Systems

We describe two models of Power Transistors (IGBT, MOSFET); both were successfully used for the analysis of electromagnetic interference (EMI) and electromagnetic compatibility (EMC) while modeling high-voltage systems (PFC, DC/DC, inverter, etc.). The first semi-mathematical–behavioral insulated-gate bipolar transistor (IGBT) model introduces nonlinear negative feedback generated in the semiconductor’s p+ and n+ layers, which are located near the metal contact of the IGBT emitter, to better describe the dynamic characteristics of the transistor. A simplified model of the metal–oxide-semiconductor field-effect transistor (MOSFET) in the IGBT is used to simplify this IGBT model. The second simpler behavioral model could be used to model both IGBTs and MOSFETs. Model parameters are obtained from datasheets and then adjusted using results from a single measurement test. Modeling results are compared with measured turn-on and turn-off waveforms for different types of IGBTs. To check the validation of the models, a brushless DC electric motor test setup with an inverter was created. Despite the simplicity of the presented models, a comparison of model predictions with hardware measurements revealed that the model accurately forecasted switch transients and aided EMI–EMC investigations.

Efficient Performance Modeling for Automated CMOS Analog Circuit Synthesis

Fast and accurate performance estimation can significantly enhance the efficiency of automated analog circuit synthesis. This article presents a novel performance modeling method that can efficiently estimate circuit performance with ignorable model building overhead for variant circuit topologies. The proposed method starts with accurate transistor modeling by taking advantage of the advanced neural network (NN) fitting technique. It then utilizes the established transistor models and topology information from a circuit netlist to precisely discover the circuit dc operating point. Specialized deterministic schemes have been developed with the aid of an undirected bipartite graph converted from the circuit netlist. Moreover, the accurate NN transistor models help directly derive the small-signal model parameter values, which can be further applied to conduct symbolic analysis to evaluate circuit performances. Our experimental results not only compare various deterministic dc operating point computation schemes but also demonstrate the efficient model development, general applicability, speedy execution, and fair prediction of our proposed performance modeling method.

A comprehensive density-of-states model for oxide semiconductor thin film transistors

In this paper, a novel and comprehensive density-of-states model is presented to understand the origin of conductivity and the performance of p-type and n-type oxide semiconductor thin film transistors (TFTs). To validate the model, the simulated I–V characteristics are compared with measured results of p-type Cu2O and SnO and n-type SnO2 TFTs. It was observed that cation vacancies are responsible for hole conduction in p-type TFTs, while anion vacancies and/or metal interstitials are responsible for electron conduction in n-type TFTs. This was observed by assigning the cation vacancies to acceptor-like Gaussian states and anion vacancies and/or metal interstitials to donor-like Gaussian states. The characteristic slopes in conduction/valence band-tail states are due to disorders present in the oxide semiconductors. The model successfully delivers the physical insight and pathway to circuit simulation of large-scale integration of pixel circuits in active matrix liquid crystal display/active matrix organic light-emitting diodes.

Compact Modeling of pH-Sensitive FETs Based on 2-D Semiconductors

We present a physics-based circuit-compatible model for pH-sensitive field-effect transistors based on two-dimensional (2D) materials. The electrostatics along the electrolyte-gated 2D-semiconductor stack is treated by solving the Poisson equation including the Site-Binding model and the Gouy-Chapman-Stern approach, while the carrier transport is described by the drift-diffusion theory. The proposed model is provided in an analytical form and then implemented in Verilog-A, making it compatible with standard technology computer-aided design tools employed for circuit simulation. The model is benchmarked against two experimental transition-metal-dichalcogenide (MoS2 and ReS2) based ion sensors, showing excellent agreement when predicting the drain current, threshold voltage shift, and current/voltage sensitivity measurements for different pH concentrations.