The design of a fetal heart rate (FHR) monitor using fetal electrocardiogram (FECG) scalp electrodes is described. It is shown that the design approach followed two stages: generation of FHR pulses at R-R intervals and FHR computation. The former uses a simple hardware approach for QRS detection and R-wave enhancement, while the latter requires a software implementation in order to produce FHR traces on a beat to beat basis. The QRS detection is based on bandpass filtering using switched mode capacitor technique; the R-wave enhancement and amplitude information are achieved by differentiation followed by fullwave rectification and peak detection. An adaptive threshold together with a comparator circuit are used to generate FHR pulses at R-R intervals. Beat to beat variations of FHR traces are produced by hardware and software implementation on a Z80 microprocessor board. Results obtained by the FHR monitor are evaluated and contrasted to other commerical FHR monitors.