Metal-nitride-oxide-semiconductor Research Articles

Charge Build-Up in Magnetron-Enhanced Reactive Ion Etching

Charge build-up in magnetron-enhanced reactive ion etching (MERIE) was evaluated with metal nitride oxide semiconductor (MNOS) capacitors. In static magnetic field, negative flat band voltage (Vfb) shifts of more than -1.5 V were observed in the area under high-density plasma, and more than 2-V Vfb shifts were observed at the edge of the wafer near the N and S poles. This distributed Vfb shift was considered to result from nonuniform plasma potential caused by secondary electron E×B drift motion. In rotated magnetic field, Vfb shifts were reduced. No significant Vfb shifts were observed when the magnet was rotated at 120 rpm. The Vfb shift reduction in rotated magnetic field was supposed to result from charge neutralization by alternate charge build-up.

Injection amplification effect in the metal-ferroelectric-insulator-semiconductor thin film structure

The example of ferroelectric films of barium strontium niobate (BSN) deposited on a silicon substrate with a thin ( ca. 10 nm) silicon nitride sublayer was used to show that the specific features of the process of injected charge accumulation in metal-insulator-ferroelectric-semiconductor structures manifest themselves in the effect of amplification of the charge carrier injection from the semiconductor due to the formation of the polarization charge in the ferroelectric, as compared with the corresponding metal-insulator-semiconductor structures. It was established that the introduction of an additional layer of BSN into standard metal-nitride- oxide-semiconductor (MNOS) memory elements leads to a decrease in the writing voltage by a factor of 1.5–2.5, with a simultaneous increase in the number of write- erase cycles by 2–3 orders of magnitude, while the charge storage time remains the same as for the MNOS structures.

A simple method of interface-state reduction in metal-nitride-oxide-semiconductor structures

A method for reducing the interface-state density in polysilicon gate metal-nitride-oxide-semiconductor (MNOS) capacitors is reported. The method involves deposition of a sacrificial blanket aluminum layer on top of a chemical-vapor-deposition (CVD) oxide over MNOS capacitors. The entire stack was then annealed at 450 °C in nitrogen and then the metal and CVD oxide were stripped away. The interface state density was reduced from 1011 to 1010 cm−2 eV−1 after this anneal. It is believed that Al reacts with trace water in the CVD oxide and generates active hydrogen. The hydrogen diffuses to the Si/SiO2 interface and passivates the interface states.

A 1 Mb EEPROM with MONOS memory cell for semiconductor disk application

A 1 Mb 5 V-only EEPROM (electrically erasable programmable ROM) with metal-oxide-nitride-oxide-semiconductor (MONOS) memory cells specifically designed for a semiconductor disk application is described. The memory has high endurance to write/erase cycles and a relatively low programming voltage of +or-9 V. These advantages result from the structure and the characteristics of the MONOS memory cell. A newly developed dual-gate-type MONOS memory cell has a small unit cell area of 18.4 mu m/sup 2/ with 1.2 mu m lithography, and the die size of the fabricated chip is 5.3 mm*6.3 mm. A new programming scheme called multiblock erase solved the problem of slow programming speed. A programming speed of up to 1.1 mu s/B equivalent (140 ms/chip) was obtained.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Chemical Composition, Charge Trapping, and Memory Properties of Oxynitride Films for MNOS Devices

The effect of varying the amount of oxygen in the silicon oxynitride film of a metal/nitride/oxide/semiconductor (MNOS) device was investigated to determine correlations between the chemical nature, current conduction, charge trapping, and nonvolatile memory properties of the device. Nitrous oxide gas was used to introduce oxygen in the oxynitride film during the low‐pressure chemical vapor deposition process. The atomic percentage of oxygen increased to 21, nitrogen concentration decreased by 16%, and electron trap density decreased by 12%, with a corresponding decrease in film conductivity for an increase of the nitrous oxide gas rate from 0 to 80 sccm. The oxygen was determined to be incorporated into the film by replacing nitrogen atoms and by parallel introduction of silicon‐oxygen bonds during the deposition process. Oxygen impurities tie up the silicon dangling bonds, which may be responsible for memory traps in the film, and thus a subsequent reduction of trapped charge in the oxynitride was observed. The charge decay rate is then reduced as the trap density decreases, thus enhancing the nonvolatile memory properties of the MNOS devices. The retention and endurance device characteristics also improve considerably, by 60% and from 107 to 108 cycles, respectively. The useful memory lifetime of oxynitride MNOS devices with enhanced endurance under repeated switching was much greater than MNOS devices with oxygen‐free nitride films.

On Heavy Ion Induced Hard-Errors in Dielectric Structures

Heavy ion induced failures in SiO2 and SiO2/Si3N4 composite capacitors were studied for ion linear energy transfers (LETs) from 15 to 85 MeV/(mg/cm2). Key findings of this study were the following: 1) hard errors are caused by a combination of energy deposited by the ion and from electrical conduction through the plasma channel formed by the ion strike, 2) there is an inverse linear relationship between ion energy deposition and the bias voltage required for composite device failure and 3) the angular dependence of the failure threshold voltage closely follows an inverse cosine relationship. Empirical equations are presented that allow the critical failure thresholds to be calculated from the ion LET for both silicon dioxide and metal-nitride-oxide-semiconductor (MNOS) composite devices. A failure model is proposed based on the energy deposition in the dielectric and rapid thermal diffusion of gate material through the dielectric.

Temperature effects in the MONOS transistor

Metal-Oxide-Nitride-Oxide-Semiconductor (MONOS) memory transistors have been studied as a function of endurance cycling and elevated temperatures to determine the effects on memory window size and retention characteristics. Endurance cycling is shown to result in window loss and an increase in charge decay rate. Elevated temperatures enhance both of these degradation processes. However, following 10 9 cycles, the temperature dependence of decay rate is essentially masked by the damage caused by write/erase cycling. Following exposure to the most severe testing conditions (10 9 cycles at 175°C), the devices were still functional but the performance was significantly degraded.

New results on electron injection, hole injection, and trapping in MONOS nonvolatile memory devices

Charge injection and trapping in silicon nitride layers are studied with the three-terminal metal-oxide-nitride-oxide-semiconductor (MONOS) gated-diode structure. A new experimental technique based on the linear voltage ramp is developed which measures electron and hole currents separately in the semiconductor during the actual charge injection (nonsteady-state measurement as opposed to the steady-state method) across the tunneling oxide. In addition, the technique measures the flat-band voltage shift and minimizes the back tunneling of the injected charge (a problem with the pulse measurement). The blocking oxide between the gate electrode and the nitride layer prevents any injection from the gate electrode. The main conclusion from these studies is that the semiconductor injects electrons and holes into the nitride layer for positive and negative polarities of the gate bias, respectively. This result is in sharp contrast with the existing interpretations based on a single-carrier type. It is speculated that the recombination of electrons and holes takes place in the nitride layer via an amphoteric trap. At small levels of charge injection, centroids of the trapped charge (measured from the tunneling oxide-nitride interface) for both electron and hole injection conditions are found to be located at 75-80 A at room temperature and 15-20 A at 100 K.

The Influence of Deposition Conditions on Hydrogen Bond Configuration and Trap Sites in Sputtered Si3 N 4

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Thermally annealed silicon nitride films: Electrical characteristics and radiation effects

Electrical characteristics, including retention under 60Co γ-ray irradiation of MNOS (metal-nitride-oxide-semiconductor) structures with LPCVD (low-pressure chemical-vapor-deposited) silicon nitride have been investigated. Capacitance-voltage techniques were used to measure injected, retained, and equilibrium charge. Current-voltage techniques were used to measure voltage and temperature dependence of charge transport. Measurements were made on MNOS with the following nitride annealing histories: (1) as-deposited at 750 °C, (2) 950 °C in N2, and (3) 950 °C in N2 followed by 900 °C in H2. Internal IR reflection techniques were used to measure chemically bonded hydrogen in the nitride films. Annealing at 950 °C in N2 (1) decreased the concentration of hydrogen, (2), decreased equilibrium positive charge, and (3) increased low- and high-field transport. Partial restoration of the as-deposited characteristics was achieved by subsequent annealing in H2 at 900 °C. Charge loss (retention) under 60Co γ-ray irradiation is essentially independent of high-temperature annealing whereas degradation is observed for net negative charge retention measured in the absence of ionizing radiation. Effects of annealing on MNOS structures and models to explain the results are discussed.

Dangling Bonds in Memory‐Quality Silicon Nitride Films

Origin of memory traps in chemically vapor‐deposited silicon nitride films was investigated. Electron‐spin resonance and infrared absorption measurements revealed the existence of silicon dangling bonds which have three‐folded configuration. Correlation between the spin density and the metal‐nitride‐oxide‐semiconductor (MNOS) memory characteristics was studied, and it was suggested that silicon dangling bonds are responsible for the trap states which cause not only hopping conduction, but also memory behavior. A model is presented suggesting that the dangling bonds are positively, neutrally, or negatively ionized. The MNOS memory behavior and the energy level of the traps were well interpreted by taking into account the transition of the dangling bonds.

Isotope effects in MNOS transistors

This letter presents arguments for the experimental verification of deuterium as the primary agent in forming effective traps in hydrogenated silicon nitride layers in metal-nitride oxide semiconductor (MNOS) transistors. Results presented show significant improvement in charge storage as a result of the substitution of deuterium for hydrogen.

Cosmic Ray Induced Permanent Damage in MNOS EAROMs

Permanent damage to the memory cells in Metal Nitride Oxide Semiconductor (MNOS) Electrically Alterable Read Only Memories (EAROM) has been observed after exposure to a heavy ion beam from a cyclotron under high field (Erase/Write Mode) conditions. The probability of permanent damage depends on the system application.

Charge loss in metal-nitride-oxide-semiconductor (MNOS) devices at high temperatures : C. S. Dobbs, W. D. Brown and J. R. Yeargan. Solid-St. Electron.26 (5), 427 (1983)

Charge loss in metal-nitride-oxide-semiconductor (MNOS) devices at high temperatures : C. S. Dobbs, W. D. Brown and J. R. Yeargan. Solid-St. Electron.26 (5), 427 (1983)

Charge loss in metal-nitride-oxide-semiconductor (MNOS) devices at high temperatures

The charge loss from the nitride layer of MNOS transistors has been studied with emphasis on the temperature effects in the range from 25 to 175°C. The trend of major interest is the increase in the logarithmic decay rate of the dominant negative threshold voltage with increasing temperature. This result is believed due to a combination of three temperature related mechanisms: (1) thermal excitation (TE) discharge, (2) Poole-Frenkel emission-drift-capture events and (3) increasing nitride conductivity with increasing temperature.

Hydrogen-related memory traps in thin silicon nitride films

The internal photoelectric-effect technique in combination with multiple internal reflection measurements has been used for quantitative measurement of impurities and defect-related traps in the thin Si3N4 insulating film of a metal–nitride–oxide–semiconductor device, and their correlation with film processing conditions. The hydrogen content in the film showed an increase of approximately 3% for a decrease of deposition temperatures from 950 to 700 °C and corresponding increase in trapped electron density from 0.55×1018 to 2.0×1018 cm3. The multiple internal reflection measurements indicated that the variation in the hydrogen content in the Si3N4 film was predominantly related to a variation in hydrogen-to-silicon bonding while the hydrogen bonded to nitrogen was relatively constant. The results suggest that hydrogen, in addition to excess silicon, and perhaps other structural defects, plays a role in determining trapped electron densities in silicon nitride.

A low-voltage alterable EEPROM with metal&amp;#8212;oxide-nitride&amp;#8212;oxide&amp;#8212;semiconductor (MONOS) structures

Theoretical and experimental investigations to obtain lower voltage electrically erasable and programmable ROM's (EEPROM's) than conventional devices have been performed. The scaled-down metal-oxide-nitride-oxide-semiconductor (MONOS) structure is proposed to realize an extremely low-voltage programmable device. The proposed scaled-down MONOS devices enjoy several advantages over MNOS devices, e.g., enlargement of the memory window, elimination of degradation phenomena, and drastic improvement in device yield. Low-voltage operation with ± 6-V supplies is demonstrated by the fabricated scaled-down MONOS transistors.

Discharging process by multiple tunnelings in thin-oxide MNOS structures

A theoretical calculation is carried out on a discharging process in thin-oxide MNOS (metal-nitride-oxide-semiconductor) structures by proposing multiple and composite tunnelings. In this analysis three tunneling processes are considered: 1) from the SiO 2 -Si 3 N 4 interface to the Si conduction band, 2) from the Si 3 N 4 layer to the Si conduction band (directly), and 3) from the Si 3 N 4 layer to the interface (and then to the Si conduction band). The trapped electron densities at the interface and in the Si 3 N 4 layer axe investigated analytically and numerically. It is found from the analysis that the process 3) is dominant in transferring the electrons in the Si 3 N 4 layer to the Si conduction band. Furthermore, a physical interpretation for the maximum tunneling distance obtained in the previous work is given in details.

Empirical study of the metal-nitride-oxide-semiconductor device characteristics deduced from a microscopic model of memory traps

A graded-nitride gate dielectric metal-nitride-oxide-semiconductor (MNOS) memory transistor exhibiting superior device characteristics is presented and analyzed based on a qualitative microscopic model of the memory traps. The model is further reviewed to interpret some generic properties of the MNOS memory transistors including memory window, erase-write speed, and the retention-endurance characteristic features.

Effects of oxide thickness on charge trapping in metal-nitride-oxide- semiconductor structures

Charge trapping in chemically vapor-deposited Si3N4 thin films of metal-nitride-oxide- semiconductor (MNOS) structures has been studied using the internal photoelectric-effect technique in combination with high-frequency capacitance-voltage measurements. The trapped charge density in the Si3N4 film was investigated as a function of the experimental parameters of the internal photoelectric-effect technique and the oxide thickness (300–20 Å) of the MNOS structure. The optimum trapped electron density in the Si3N4 film was measured to be 1.5×1018/ cm3 using 4.14-eV photon energy, 3.0-mW/cm2 light intensity, and −20-V applied gate voltage bias for the MNOS structures whose oxide thicknesses were greater than 70 Å. The photoinjection of holes from Si into Si3N4 was inhibited in thick-oxide (300–43 Å) MNOS structures due to the large barrier height at the Si-SiO2 interface. This eliminated simultaneous trapping of holes and electrons in the Si3N4 film. As the oxide thickness of the MNOS structure was reduced below the critical thickness of 43 Å, the photoinjection of holes from Si into Si3N4 was enhanced substantially with subsequent dominant hole trapping in the Si3N4 film.