Measurements Of Interface State Density Research Articles

Study of ZnO/BST interface for thin-film transistor (TFT) applications

This work presents an investigation of ZnO/BST interface for the potential use of (Ba,Sr)TiO3 as a gate–dielectric in ZnO based thin-film transistors (TFTs) for low-voltage operation. A metal-insulator-semiconductor capacitor (MIS-C) structure, which consists of a Pt/BST/ZnO stack, was fabricated on a corning glass substrate. The capacitance-voltage (C-V) characteristic of MIS-C gives the capacitance peak in both forward and backward sweep. This peak behavior of BST is due to its paraelectric nature attributed by changing the direction of a polar molecule over the applied electric field. C-V curve of ZnO/BST MIS-C structure exhibits a counter-clockwise hysteresis of -1.33 V due to the existence of donor-like oxygen vacancies present in BST and ZnO interface. The subthreshold slope of the device was found to be 203 mV/ decade and calculated using the measurement of interface state density (Dit). ZnO/BST interface also exhibits a very low value of leakage current density (3.148 × 10−7 Acm−2). Thus, the use of BST as a gate-dielectric in ZnO TFT has excellent potential, owing to its steep subthreshold slope, which implies fast switching and low off-state current.

Interface State Artefact in Long Gate-Length AlGaN/GaN HEMTs

Dispersion in capacitance and conductance measurements in AlGaN/GaN high-electron mobility transistors is typically interpreted as resulting from interface states. Measurements on varying gate-length devices and a model of an interface-trap-free device are used to demonstrate that the distributed-resistance-induced dispersion is significant for 1-MHz measurements if the gate length exceeds ~10 μm. Hence, interface state density measurements using the conductance technique need to use shorter gate-length devices in order to avoid this artefact.

Interface trap characterization of atomic layer deposition Al2O3/GaN metal-insulator-semiconductor capacitors using optically and thermally based deep level spectroscopies

Quantitative measurements of interface state density and energy distribution profiles within Al2O3/GaN interfaces were obtained by constant capacitance deep level transient spectroscopy and deep level optical spectroscopy (CC-DLTS/DLOS). The new application of CC-DLOS to interface state measurement is described, which allows interrogation of very deep interface states. A series of Al2O3/GaN metal-insulator-semiconductor (MIS) devices prepared as a function of Al2O3 thickness via atomic layer deposition, on NH3-MBE-grown n-type Ga-polar GaN layers enabled a systematic study. The overall shape and magnitude of the interface trap distribution, Dit, were determined to be nearly identical, independent of Al2O3 thickness. The Al2O3/GaN Dit spectra had an overall U-shape with Dit ∼1012 cm−2 eV−1 near the conduction band edge, ∼1011 cm−2 eV−1 mid-gap, and ∼1014 cm−2 eV−1 near the valence band edge. However, the interface states near the GaN conduction band showed a slight inverse dependence on Al2O3 thickness, suggestive of annealing effect during deposition. The high near valence band state concentrations are consistent with expectations from residual carbon impurities at the GaN surface. A method for discriminating between bulk and interface states in the CC-DLTS signal is demonstrated, using the results on MIS capacitors in combination with spectroscopy results on a Schottky diode structure.

Analysis of Contaminated Oxide-Silicon Interfaces

Methods for the analysis of the oxide-silicon interface were compared for their ability to reveal metal segregation at the interface and organic contamination. The impact of these contaminations on surface recombination velocity measurements, on capacitance vs. voltage, conductance vs. voltage and capacitance vs. time measurements and on MOS-DLTS spectra was studied. Niobium-contaminated wafers were used as an example of metal surface segregation, because it was previously shown that niobium is prone to surface segregation. Interface state density measurements obtained by the conductance method showed a limited impact of niobium implantation. Vice versa significant effects were found in MOS-DLTS spectra. For what concerns organic contamination, MOS-DLTS showed the most significant effects from the point-of-view of the intrinsic properties of the silicon oxide - silicon interface, and GOI tests demonstrate a clear impact of the organic contamination on MOS capacitors oxide breakdown events.

ZrO2-Based InP MOSFETs (EOT ≈ 1.2nm) Using Various Interfacial Dielectric Layers

This paper presents the device performance of InP MOSFETs with a single ZrO2 gate dielectric and with stacked gate dielectrics using various interfacial layers between ZrO2 and InP substrate, including Al2O3, HfAlOx, and ZrAlOx. Of the gate stacks studied, Al2O3/ZrO2, HfAlOx/ZrO2, and ZrAlOx/ZrO2 bilayer gate dielectrics exhibit lower subthreshold swing, higher drive current and channel mobility compared to a single ZrO2 under similar equivalent oxide thickness of 1.2nm. In the reliability, InP MOSFETs with the bilayer gate stacks are more robust compared to that with a single ZrO2 under similar electrical field stress for 500s. These improvements are attributed to a better interface quality between the bilayer gate stacks and InP substrate, which has been confirmed by frequency dispersion and interface state density measurements.

Atomic layer deposited Ta2O5 gate insulation for enhancing breakdown voltage of AlN/GaN high electron mobility transistors

AlN/GaN heterostructures with a 3.5 nm AlN cap have been grown by molecular beam epitaxy followed by a 6 nm thick atomic layer deposited Ta2O5 film. Transistors fabricated with 150 nm length gates showed drain current density of 1.37 A/mm, transconductance of 315 mS/mm, and sustained drain-source biases up to 96 V while in the off-state before destructive breakdown as a result of the Ta2O5 gate insulator. Terman’s method has been modified for the multijunction capacitor and allowed the measurement of interface state density (∼1013 cm−2 eV−1). Small-signal frequency performance of 75 and 115 GHz was obtained for ft and fmax, respectively.

Simultaneous characterization of bulk impurities and interface states by photocurrent measurements

A new method for evaluating both surface recombination velocity and bulk minority carrier lifetime by photocurrent measurements is discussed and validated by comparison with capacitance–voltage measurements of interface state density. This method is an evolution of the measurement of surface recombination velocity by the Elymat technique, it does not require the oxide to be etched off and consists in measurements of surface recombination velocity under an applied surface bias. The application of a surface bias allows the control of the interface potential and the identification of the suitable interface condition so that surface recombination velocity can be considered as a measurement of interface state density. In addition, it is shown that surface recombination velocity is suppressed when the surface is under accumulation conditions, so the application of a surface bias provides the possibility of a surface passivation by driving the surface into accumulation. This passivation by surface polarization is about as effective as the chemical passivation by HF. Finally, the dependence of surface recombination velocity on the injection level is shown to be reversed when the interface changes from depletion to accumulation or inversion conditions. This technique does not require the formation of a capacitor structure, so it is suitable for the measurement of as-grown interface properties. For this reason, this technique was chosen for a systematic study of the nitridation process of oxide films. Surface recombination velocity was correlated with nitrogen concentration at the oxide–silicon interface.

Nitrogen passivation of deposited oxides on n 4H–SiC

Results for measurements of interface state density and breakdown field strength are reported for deposited oxides on n 4H–SiC following passivation with nitric oxide. Low-temperature oxides deposited by plasma-enhanced chemical vapor deposition and high-temperature oxides deposited at 950 °C were investigated. Nitrogen passivation of deposited oxides on n 4H–SiC is found to produce interface state densities of 1–2×1012 cm−2 eV−1 at Ec−E=0.1 eV, regardless of variations in oxide deposition procedures that affect the residual interfacial carbon concentration. Breakdown field strengths were higher for passivated high-temperature oxides compared to passivated low-temperature oxides at room temperature and 290 °C. We suggest that additional oxide growth during the NO passivation is the reason for the observed interface state densities.

Detection of Metal Segregation at the Oxide-Silicon Interface

Various techniques for the detection of metal segregation at wafer surface were compared by using nickel and cobalt implanted wafers as the test vehicles. Generation lifetime gave the maximum sensitivity. Noncontact interface state density measurements have limited sensitivity and require an integration of the spectrum over the measurement energy range. The Elymat surface recombination velocity is a compromise between sensitivity and mapping capabilities. Nickel is a fast diffuser and completely segregates at wafer surface, as reported in literature. So, nickel cannot be detected by measurements of bulk diffusion length, neither by surface photovoltage (SPV) nor by Elymat techniques. Cobalt does segregate at wafer surface, but in spite of what is reported, some cobalt is left in the bulk even after a thermal treatment with a slow ramp-down (furnace treatment). Cobalt surface segregation is negligible after thermal treatment with a fast ramp-down so standard bulk lifetime techniques such as Elymat or SPV can be used for monitoring purposes. © 2002 The Electrochemical Society. All rights reserved.

Interface properties of annealed and nitrided HTO layers

Non-contact measurements of interface state density and oxide charge were compared to surface recombination velocity measurements for their ability to provide a characterization of oxide–silicon interfaces. High-temperature deposited oxide (HTO) layers were used as the test vehicles. Both techniques are shown to agree quite well with each other and with the traditional capacitance–voltage technique. From the point-of-view of process characterization, interface state density is very high in as-deposited films, it is strongly reduced by annealing or nitridation and it is increased again by reoxidation. SIMS nitrogen profiles show that in nitrided HTO layers interface state density is strongly related to nitrogen concentration at the oxide–silicon interface.

A Novel Method for the Simultaneous Characterization of Bulk Impurities and Surface States by Photocurrent Measurements

A new method for evaluating both surface recombination velocity and bulk minority carrier lifetime by photocurrent measurements was proposed and validated by comparison with capacitance‐voltage measurements of interface state density. This method is an evolution of the measurement of surface recombination velocity by the Elymat technique. It does not require the oxide to be etched off and consists of measurements of surface recombination velocity under an applied surface bias. The application of a surface bias allows the control of the interface potential and the identification of the suitable interface condition such that surface recombination velocity can be considered as a measurement of interface state density. In addition, it is shown that surface recombination velocity is suppressed when the surface is under accumulation conditions, so the application of a surface bias provides the possibility of a surface passivation by driving the surface into accumulation. This passivation by surface polarization is about as effective as the chemical passivation by HF. Finally, the dependence of surface recombination velocity on the injection level is shown to be reversed when the interface changes from depletion to accumulation or inversion conditions. © 2000 The Electrochemical Society. All rights reserved.

SiSiO 2 interface state generation at the surface potential of 0.4 and 0.7 eV

Interface state density measurements revealed that Dit(0.7):Dit(0.4) = 1:2.3 and 2:1 for many kinds of stresses. The p-type and n-type Si recombination lifetime measurements showed that 1 Tp : 1 Tn = 1:2.3 and 2:1 for various plasma processes. We proposed a model in which both SiSi and SiO bond deformations occur at the interface during each stress, at the ratio of 1:2 or 2:1, that relats to the observed results.

Measurements of interface state density in partially- and fully-depleted silicon-on-insulator MOSFETs by a high-low-frequency transconductance method : P. C. Yang, H. S. Chen and Sheng S. Li. Solid-State Electronics35(8), 1031 (1992)

Measurements of interface state density in partially- and fully-depleted silicon-on-insulator MOSFETs by a high-low-frequency transconductance method : P. C. Yang, H. S. Chen and Sheng S. Li. Solid-State Electronics35(8), 1031 (1992)

Transconductance Technique for Measurement of Interface State Density and Oxide Charge in LDD-MOSFET's

A simple technique is presented to determine the interface state and trapped oxide charge density created by hot carrier stress and γ-ray irradiation in n-channel LDD-MOSFET's. The hot carrier stress is done at different biasing conditions. The γ-ray irradiation is done to a total dose of 1 Mrad with two different gate biases during irradiation. The trapped carrier density is obtained from the change in transconductance for subthreshold gate voltage, while the interface state density is deduced from the change in maximum transconductance in the linear region. The interface state density measured by the charge pumping technique agrees well with the value obtained by the transconductance method. The increase in trapped carrier density is proportional to the threshold voltage (Vt) shift of the device. The positive Vt shift due to negative charge is greater than the negative shift of Vt due to positive charge density of the same magnitude. Es wird eine einfache Technik zur Bestimmung der Grenzflächenzustände und der angehafteten Oxydladungsdichte, die in n-Kanal LDD-MOSFET's durch heiße Ladungsträger und γ-Bestrahlung erzeugt wurden, vorgestellt. Die heißen Ladungsträger werden unter verschiedenen Spannungen erzeugt, die γ-Bestrahlung erfolgt bis zu einer Gesamtdosis von 1 Mrad mit zwei verschiedenen Torspannungen während der Bestrahlung. Die angehaftete Ladungsträgerdichte erhält man aus der Steilheit bei unterschwelliger Torspannung, die Grenzflächenzustandsdichte aus der Steilheit in der linearen Region. Die mittels der Ladungspumptechnik gemessene Grenzflächenzustandsdichte stimmt gut mit den Werten, die aus der Steilheit ermittelt wurden, Überein. Die Zunahme der Trägerdichte in Haftstellen ist der Verschiebung der Schwellenspannung Vt proportional. Die positive Verschiebung von Vt infolge negativer Ladung ist größer als die negative Verschiebung bei einer positiven Ladungsdichte gleicher Größe.

Measurements of interface state density in partially- and fully-depleted silicon-on-insulator MOSFETs by a high-low-frequency transconductance method

The high-low-frequency (HLF) transconductance method is applied to determine the interface state density profile in small-geometry thick- and thin-film (fully depleted) MOSFETs formed on single-and multiple-oxygen implanted (SIMOX) Si substrates. By comparing the real part of the measured high-and low-frequency transconductance and using a static drain current-to-gate voltage measurement on a MOSFET operating in the linear region, the energy distribution of the interface state density is determined without knowing the doping profile in the channel. The results yielded the interface state density in the range of ∼5 to 10 × 10 10 eV −1 cm −2 for single implanted samples and 2 × 10 10 eV −1 cm −2 for multi-implanted samples. Interface state densities determined by the HLF transconductance method were found in good agreement with that determined by the charge pumping (CP) method.

Measurements of interface state density by X-ray photoelectron spectroscopy

Measurements of interface state density by X-ray photoelectron spectroscopy

Measurements of interface state density by X-ray photoelectron spectroscopy

A novel technique has been developed for measuring interface state density at a dielectric-semiconductor interface in conjunction with X-ray photoelectron spectroscopy. In this technique, a thin dielectric film with a thickness up to 15 nm, is deposited on a semiconductor substrate. Surface potentials of the semiconductor and dielectric are then measured using X-ray photoelectron spectroscopy, the latter of which can be varied by charging the dielectric with low energy electrons. The interface state density at the dielectric-semiconductor interface is extracted from the relationship between the surface potentials of the semiconductor and the dielectric with a simple space-charge calculation similar to the conventional capacitance-voltage technique. As an example for the application of the proposed technique, interface state densities were measured on two different samples: (a) 2 nm SiO 2 on n-Si(100) grown by dry oxidation at 600 ° C; (b) 3 nm SiO 2 on n-Si(100) grown by dry oxidation at 900 ° C. The results obtained show that the proposed technique is useful in measuring interface state distributions across the bandgap.

Interface state density measurements with a modified C-V technique

Interface states in the metal-oxide-semiconductor (MOS) system have a great influence on the electrical properties of MOS capacitors and field-effect transistors. Several methods for measuring the density of these interface states within the forbidden band gap of silicon employ differential capacitance versus gate bias (C-V) measurement on MOS capacitors. We present here a C-V measurement technique utilizing the MOS transistor that extends the energy range of the high-low frequency method to that of the low-frequency technique.

Determination of interface-state parameters in a MOS capacitor by DLTS

A modification of the DLTS (Deep Level Transient Spectroscopy) technique for interface-state measurement is described in which the surface potential is used to determine the energy of the interface states contributing to the emission signal. This technique allows an accurate and unambiguous determination of interface-state energies and cross sections. Expressions are determined for interface-state emission as a function of surface potential. Measurements of interface-state density and majority-carrier cross sections as functions of energy for n- and p-type MOS samples are presented.

Measurements of interface state density in MNOS structures

A technique is described for measuring the density and energy distribution of surface states at the Si-SiO2 interface in MNOS capacitors. The effects of charge injection into the insulator are taken into account by making use of a fast voltage ramp to monitor the instantaneous values of the surface potential during a quasistatic capacitance-voltage sweep. The technique has been used to investigate the effect of charges trapped in the nitride on the interface-state density.