Low-temperature Polysilicon Research Articles

Bit Depth of Drivers for Micro-LED Displays Adopting Low-Temperature Polysilicon Oxide Thin-Film Transistors

In this paper, the minimum bit depth of drivers for active-matrix light emitting diode (AMLED) displays has been specified to overcome luminance nonuniformity of LEDs for the first time. The pixel circuit comprises seven transistors and one capacitor (7T1C) based on low-temperature polysilicon oxide (LTPO) process. For the experiments, thirty green and blue LEDs were used. When the same data voltage was applied, there was luminance nonuniformity of up to 19 % and 41 % for green and blue LEDs compared to the reference LEDs. Data voltages were measured to get the same luminance as the target one. It was found that the maximum voltage intervals of 0.9 mV and 1.1 mV were necessary to overcome the luminance nonuniformity for green and blue LEDs, respectively. 1.62 V and 2.80 V were the data voltage ranges of green and blue LEDs, respectively. The bit depth of 11-bit (2,048) is the minimum one because 1.62 V / 0.9 mV for green LEDs is smaller than 2,047. In this way, at least 12-bit is necessary for the bit depth of drivers for blue LEDs.

A New Pixel Circuit Compensating for a Decrease in Luminance of the Stretchable Active Matrix Organic Light Emitting Diode Display

The stretchable display is a next-generation flexible display because it is possible to implement free-form with free change, and various studies are being conducted. The most likely display technology for implementing a stretchable display is the organic light emitting diode (OLED), which is suitable for forming on flexible substrates because it can emit light on its own without using the back light unit (BLU). In addition, through advantages such as high contrast ratio, fast response time, and wide viewing angle, OLED is applied from small size panels such as mobile to large size panels such as televisions. Thin film transistor, a device applied to drive active matrix of OLED, is represented by the amorphous silicon (a-Si), low temperature poly silicon (LTPS), and oxide TFT such as amorphous In-Ga-Zn-oxide(a-IGZO). The a-IGZO, which has advantages such as high filed effect mobility and low leakage current compared to a-Si:H, is used as a backplane of commercial OLED panels. In addition, it is suitable for application to flexible substrates due to low process temperature, and high transmittance in the visible area due to band gap energy of about 3.1 eV can be applied to transparent display. In research to minimize damage to TFTs or OLEDs when the area of flexible substrates increases, rigid island structures protect devices from damage by forming rigid structures on soft substrates. Devices protected from damage caused by increasing the area can maintain performance, and each pixel can maintain brightness. However, when the area of the panel is increasing, the gap between the pixels increases, which leads to a decrease in the luminance of the panel. Among the studies to compensate for the decrease in brightness by increasing the area of the stretchable display, Kang et al. proposed a stretchable pixel circuit for AMOLED displays, which compensates for the reduced luminance by bootstrapping. The proposed circuit increases luminance through a variable capacitor with a strain-dependent capacity change. However, compensation for TFT's threshold voltage and voltage drop, which are possible causes of luminance reduction in OLED were not considered. The threshold voltage or power voltage of a different drive TFT for each pixel affects the current supplied from the backplane to the OLED electrode, and the current supplied differently for each pixel affects the light intensity of the OLED device, so compensation should be considered. In this study, we propose a novel pixel circuit consisting of seven n-type transistors and two capacitors. In order to evaluate the compensation ability of the proposed pixel circuit, a simulation using the RPI Level = 35 model was conducted. Fig. 1 (a) shows the simulation result of the output current of the proposed pixel circuit by the change in the capacitance of C2. Before the capacitance of C2 increased, the output current was 7.65 μA, but when the capacitance of C2 increased by 10%, the output current increased by 2.22% to 7.82 μA, and when the capacitance of C2 increased by 4.31%.Figure 2 (b) shows the output current caused by the change in VDD voltage of the proposed pixel circuit and the conventional pixel circuit. As the VDD of the conventional pixel circuit changed by 3.0 V, the output current decreased by 40.90% from 8.02 μA to 4.74 μA. In the case of proposed pixel circuit, output current decreased by 21.83% from 7.65 μA to 5.98 μA as VDD changed by 3 V, and decreased by 0.77% to 7.60 μA when VDD changed by 1.1 V. Figure 3 shows the output current due to the threshold voltage change of TFT in the proposed pixel circuit and conventional pixel circuit. In the conventional pixel circuit, output current changed from 10.13 μA to 5.53 μA as the threshold voltage of TFT changed by 3 V. In the proposed pixel circuit, output current changed from 7.12 μA to 6.45 μA with a 3 V change in the threshold voltage. As a result of the simulation, the proposed pixel circuit can compensate for luminance change by an increased area, voltage drop, and the threshold voltage shift of the TFT. Figure 1

Flexible Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistor with Aluminum Oxide Gate Insulator on Polyimide Substrate By Spray Pyrolysis for Foldable Display

Research interest in thin-film transistor (TFT)-based flexible electronics for next-generation foldable and rollable displays is increasing, centering on flexible plastic substrates such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and polyimide (PI). For flexible electronics using plastic substrates, it is important to select suitable semiconductor materials that can be deposited at low substrate temperature. Metal oxide (MO) semiconductors such as indium-gallium-zinc oxide (IGZO), zinc oxide (ZnO) are attracting attention as suitable candidates for plastic substrate electronics because of their higher mobility and optical transmittance than hydrogenated amorphous silicon (a-Si:H). In addition, since it can be processed at a lower temperature than low-temperature polysilicon (LTPS), it can be easily applied to flexible plastic substrates. One of the greatest advantages of MO is that it can be easily fabricated by conventional semiconductor processing methods such as sputtering, atomic laser deposition, and solution processes. Among them, solution-processed deposition method is particularly advantageous in terms of manufacturing efficiency because it does not require a separate vacuum system, and can efficiently utilize raw materials, so the fabrication cost is inexpensive. In particular, spray pyrolysis can guarantee environmental stability, high mobility, and large area production than other solution processes. In this work, we developed the high-performance, flexible a-IGZO/Al2O3 TFTs using spray pyrolysis fabricated on the flexible PI substrate. In a previous study, we developed a method to reduce curling and electrostatic discharge (ESD) damage to PI substrates by using a mixture of carbon nanotubes (CNTs) and graphene oxide (GO) between carrier glass and PI substrate. Therefore, it was possible to mechanically detach the TFTs on PI substrate and handle them easily even after detachment. The spray-pyrolyzed Al2O3 film is one of the high-k dielectric materials, which can lower the operating voltage, so the low-power consumption of the TFT backplane can be realized. The flexible spray-pyrolyzed a-IGZO/Al2O3 TFT exhibits the field-effect mobility (µFE) of 9.75 cm2 V−1 s−1, threshold voltage (VTH) of −0.8 V, subthreshold swing (SS) of 0.29 V dec−1, and on/off current ratio of 6.2 × 107. Even without TFT passivation layer, it shows environmental stability. The TFTs show robust electrical performance even under tensile strain with a bending radius of 1 mm. In addition, it showed stable electrical characteristics even in the repeated bending test of 30,000 cycles under compressive strain with a bending radius of 1 mm. This is due to fewer defects resulting from the smooth interface of the a-IGZO film and the Al2O3 film deposited through spray pyrolysis. Therefore, spray-pyrolyzed a-IGZO/Al2O3 TFT fabricated on PI substrate is a promising candidate for next-generation foldable display application. Figure 1

One-Step Synergistic Treatment Approach for High Performance Amorphous InGaZnO Thin-Film Transistors Fabricated at Room Temperature.

Amorphous InGaZnO (a-InGaZnO) is currently the most prominent oxide semiconductor complement to low-temperature polysilicon for thin-film transistor (TFT) applications in next-generation displays. However, balancing the transmission performance and low-temperature deposition is the primary obstacle in the application of a-InGaZnO TFTs in the field of ultra-high resolution optoelectronic display. Here, we report that a-InGaZnO:O TFT prepared at room temperature has high transport performance, manipulating oxygen vacancy (VO) defects through an oxygen-doped a-InGaZnO framework. The main electrical properties of a-InGaZnO:O TFTs included high field-effect mobility (µFE) of 28 cm2/V s, a threshold voltage (Vth) of 0.9 V, a subthreshold swing (SS) of 0.9 V/dec, and a current switching ratio (Ion/Ioff) of 107; significant improvements over a-InGaZnO TFTs without oxygen plasma. A possible reason for this is that appropriate oxygen plasma treatment and room temperature preparation technology jointly play a role in improving the electrical performance of a-InGaZnO TFTs, which could not only increase carrier concentration, but also reduce the channel-layer surface defects and interface trap density of a-InGaZnO TFTs. These provides a powerful way to synergistically boost the transport performance of oxide TFTs fabricated at room temperature.

P‐15.1: Large Area and Low Cost Fingerprint on Display Technology

We developed a large area and low cost optical fingerprint recognition product based on LTPS (low temperature poly silicon) process. A high efficient a‐Si pin sensor is introduced, the quantum efficiency under white light is 70% and the dark state current density is E‐10 A / mm2. The “one‐to‐one” and “one to multiple” structures of sensor and micro lens are compared, and the “one‐to‐one” optical path structure is systematically analyzed and evaluated. The optical path focal length is about 100 μm. The fingerprint recognition effect is significantly improved by adding a BM shading layer, and this scheme can effectively avoid the screen burning problem caused by the high luminous intensity of pixels in the fingerprint unlocking area.

P‐15.4: A newly Integrated Ambient Light sensor with full in‐cell structure

In this paper, we present a novel integrated light‐dependent sensor which can be used to detect the illuminance of the ambient light. Based on the low temperature polysilicon (LTPS) thin film transistor (TFT) process and photosensitivity of a‐Si, the sensor can realize 0‐10K lux of the monitor range and 0.5 lux/step. It saves more space for terminal devices which will also facilitates the full screen display.

29.2: Invited Paper: A Brief Introduction to Advantages of LTPS Technology in High‐end NB

The electron mobility based on low temperature polysilicon is almost 100 times that of amorphous silicon, so low temperature polysilicon technology has overwhelming advantages in high pixel density, high refresh rate, narrow frame and other aspects. This paper will focus on the application of LTPS technology in the future high‐end notebook, mainly from the four dimensions of narrow border, power consumption, wide frame rate (WFR) ,low power consumption and incell, and discuss the industry trends, the technical bottlenecks of LTPS process and the current progress made by CSOT in these points. At present, LTPS technology has took a piece of the cake in the high‐end notebook market, and definitely present. Through the above introduction we believe that with the continuous breakthrough of LTPS technology bottleneck, it will bring a new chapter in the development of high‐end notebook.

Effect of Biaxial Bending Strains on the Electrical Characteristics of Flexible Low-Temperature Polysilicon Thin-Film Transistors

The change of electrical properties of flexible low-temperature polysilicon (LTPS) thin-film transistors (TFTs) under biaxial bending strains was studied. Biaxial strains were applied using a ring-on-ring bending test rig. The magnitude of the strain was determined by theoretical calculations and finite-element simulations. With an increase in strain, the transfer curve shifted to a negative bias. At a biaxial strain level of 12%, the threshold voltage decreased by 27%, the field-effect mobility decreased by 13%, and the subthreshold slope increased by 25%. It had a more significant effect on the property changes than the uniaxial strain; this difference may be attributed to additional trap states generated by the biaxial strain. The analysis showed that the trap density increased when the strain level increased. The contributions of the increases in the grain-boundary trap state density and the interface trap state density to the degradation in the electrical properties were derived to be 10% and 90%, respectively. After removal of the biaxial bending strains, the electrical performance showed recovery behavior, but the performance could not return fully to its original state.

Top-Emitting Active-Matrix Quantum Dot Light-Emitting Diode Array with Optical Microcavity for Micro QLED Display.

An electroluminescent quantum-dot light-emitting diode (QLED) device and a micro QLED device array with a top-emitting structure were demonstrated in this study. The QLED device was fabricated in the normal structure of [ITO/Ag/ITO anode]/PEDOT:PSS/PVK/QDs/[ZnO nanoparticles]/Ag/MoO3, in which the semi-transparent MoO3-capped Ag cathode and the reflective ITO/metal/ITO (IMI) anode were designed to form an optical microcavity. Compared with conventional bottom-emitting QLED, the microcavity-based top-emitting QLED possessed enhanced optical properties, e.g., ~500% luminance, ~300% current efficiency, and a narrower bandwidth. A 1.49 inch micro QLED panel with 86,400 top-emitting QLED devices in two different sizes (17 × 78 μm2 and 74 × 40.5 μm2) on a low-temperature polysilicon (LTPS) backplane was also fabricated, demonstrating the top-emitting QLED with microcavity as a promising structure in future micro display applications.

P‐43: Finely Programmable Pulse Width Shift Register for Luminance Control of AMOLED Displays

In this paper, we propose a programmable shift register circuit at a low temperature poly‐silicon (LTPS) backplane suitable for high‐resolution and high‐speed displays. The proposed circuit can control the pulse width at a line‐time unit by a start signal, where two additional clock signals were in use compared to the conventional circuit. Smartspice simulation was conducted to verify the feasibility, proving the pulse width controllability at a line‐time unit. The estimated power consumption is lower than the conventional circuit.

P‐13: Student Poster: Comprehensive Study of the TFTs Fabricated in the (100)‐Oriented Grain‐Boundary‐Free Silicon Thin Film Obtained by Green CW‐Laser ateral Crystallization

The improvement of the crystallinity of low‐temperature polysilicon (LTPS) will always lead the improvement of the performance of all kinds of displays and flexible electronics. In this paper, we investigate comprehensively the characteristics of TFTs fabricated by the Grain‐Boundary‐Free continuous‐wave laser lateral crystallizations (GB‐Free CLC) and we propose how to selectively fabricate TFTs to the laser scan for the channel regions, S/D wiring regions and contact regions..

14‐3: Extremely Short‐Channel LTPS TFT Technologies for High‐Performance Low‐Power, and Reliable AMOLED displays

This paper presents recent progress to scale down low‐temperature polysilicon (LTPS) TFT technologies in the extremely short‐channel length regime for AMOLED displays. Process integration of short‐channel gate and narrow‐width polysilicon into scaled equivalent gate‐oxide thickness (EOT), is explored, in conjunction with enhanced poly crystallization by reducing defect density‐of‐state (DOS) especially in the grain boundaries of the channel region. We obtain more than twice higher current drive (Ion) with significantly‐reduced parasitic gate capacitance, thereby enabling high‐performance high‐frequency panel operations. In addition to superior panel performance in scaled LTPS TFTs, reliable devices are attained, demonstrating robust device characteristics for negative‐bias instability (NBTI) and hot carrier injection (HCI) effects. Physics‐based analysis, based on experimental data and numerical device simulations, is performed to gain more insight in the TFT technologies.

Strain distribution and electrical characteristics of flexible low-temperature polysilicon thin film transistors under biaxial bending

This paper investigates the strain distribution of flexible p-channel low temperature polycrystalline silicon thin film transistors under biaxial bending. The strain distribution of LTPS TFTs under different bending conditions is analysed by finite element analysis. \U0001d6c6r and \U0001d6c6θ are essentially equal and constant within the load ring. The finite element analysis shows that when the biaxial bending strain condition is 2.5%, the strain distribution is mainly concentrated at the contact angle between the electrode and the oxide layer. This strain is significantly greater than the overall strain of the device, which is the main reason for the bending performance of the device. We found that under biaxial bending, the threshold voltage shifts towards the negative axis as the biaxial strain increases. Within this strain range, these electrical properties are evident under biaxial strain conditions. Comparing theoretical threshold voltage shifts based on energy band changes with experimental results under biaxial strain, it was found that changes in trap density should also contribute to the threshold voltage shift.

Strategies for Applications of Oxide-Based Thin Film Transistors

Due to the untiring efforts of scientists and researchers on oxide semiconductor materials, processes, and devices, the applications for oxide-based thin film transistors (TFTs) have been researched and promoted on a large scale. With the advantages of relatively high carrier mobility, low off-current, good process compatibility, optical transparency, low cost, and especially flexibility, oxide-based TFTs have already been adapted for not only displays (e.g., liquid crystal display (LCD), organic light emitting diode (OLED), micro-light-emitting diode (Micro-LED), virtual reality/augmented reality (VR/AR) and electronic paper displays (EPD)) but also large-area electronics, analog circuits, and digital circuits. Furthermore, as the requirement of TFT technology increases, low temperature poly-silicon and oxide (LTPO) TFTs, which combine p-type LTPS and n-type oxide TFT on the same substrate, have drawn further interest for realizing the hybrid complementary metal oxide semiconductor (CMOS) circuit. This invited review provides the current progress on applications of oxide-based TFTs. Typical device configurations of TFTs are first described. Then, the strategies to apply oxide-based TFTs for improving the display quality with different compensation technologies and obtaining higher performance integrated circuits are highlighted. Finally, an outlook for the future development of oxide-based TFTs is given.

The 60th Anniversary of TFTs and the Evolution of High‐Resolution Displays

The 60th Anniversary of TFTs and the Evolution of High‐Resolution Displays

Analysis of self-heating-related instability in n-channel low-temperature polysilicon TFTs with different S/D contact hole densities

This study examines self-heating-related instability in n-channel low-temperature polysilicon thin-film transistors with different source/drain contact hole densities. Devices with more contact holes exhibit a higher on-current without additional parasitic capacitance, further enhancing the RC delay property. For high-current-induced self-heating stress, a device with one contact hole has one hump due to the kink effect. However, a device with six contact holes has two humps, induced by the kink effect and thermionic field emission. COMSOL simulations of heat distribution and energy bands are performed to examine the different degradation behaviors, and then physical models are proposed.

Deposition of Very-Low-Hydrogen-Containing Silicon at a Low Temperature Using Very-High-Frequency (162 MHz) SiH4 Plasma.

Low-hydrogen-containing amorphous silicon (a-Si) was deposited at a low temperature of 80 °C using a very high frequency (VHF at 162 MHz) plasma system with multi-split electrodes. Using the 162 MHz VHF plasma system, a high deposition rate of a-Si with a relatively high deposition uniformity of 6.7% could be obtained due to the formation of high-ion-density (>1011 cm−3) plasma with SiH4 and a lack of standing waves by using small multi-split electrodes. The increase in the radio frequency (RF) power decreased the hydrogen content in the deposited silicon film and, at a high RF power of 2000 W, a-Si with a low hydrogen content of 3.78% could be deposited without the need for a dehydrogenation process. The crystallization of the a-Si by ultraviolet (UV) irradiation showed that the a-Si can be crystallized with a crystallinity of 0.8 and a UV energy of 80 J without dehydrogenation. High-resolution transmission electron microscopy showed that the a-Si deposited by the VHF plasma was a very small nanocrystalline-like a-Si and the crystalline size significantly grew with the UV irradiation. We believe that the VHF (162 MHz) multi-split plasma system can be used for a low-cost low-temperature polysilicon (LTPS) process.

Highly-Doped Region Optimization for Reduced Hot-Carrier Effects in Dual-Gate Low Temperature Polysilicon TFTs

Highly-Doped Region Optimization for Reduced Hot-Carrier Effects in Dual-Gate Low Temperature Polysilicon TFTs

Highly Sensitive Temperature Sensor Using Low-Temperature Polysilicon Oxide Thin-Film Transistors

We report highly sensitive temperature sensing circuits using low temperature polysilicon oxide (LTPO) thin-film transistors (TFTs) on a glass substrate. The sensor has the LTPO operational amplifier (Op-Amp) made of dual gate (DG) amorphous InGaZnO (a-IGZO) and low temperature poly-Si (LTPS) TFTs by blue laser annealing process. The DG a-IGZO TFTs-based sensing circuit exhibits a sensitivity of 37.9±3 mV/°C and it can be further boosted to 223.33±8 mV/°C by incorporating LTPO Op-Amp for body temperature detection (35~40 °C). The DG a-IGZO TFT exhibits robust threshold voltage stability ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta {\rm V}_{Th}$ </tex-math></inline-formula> = −0.16 V) with temperature, which is essential for the practical development of the proposed LTPO differential temperature sensor (TS) to accurately measure the human body temperature.

Study of traps in low-temperature polysilicon thin film transistors using a current transient method

The trap characteristics of low-temperature polysilicon thin film transistors (TFTs) are studied using a current transient method that is based on the trapping and detrapping of charge carriers from the trap sites in the device. Analysis of the measured current transient curve allowed three types of detrapping behavior to be identified, each of which displayed a different time constant, activation energy, and spatial position. This current transient method can be integrated into the negative bias temperature instability stress test used for the reliability study. The peak amplitudes of the traps increase because of the stress applied in the test, thus demonstrating that the degradation mechanism of the TFTs is closely related to changes in the traps in these devices.