Abstract

This paper presents recent progress to scale down low‐temperature polysilicon (LTPS) TFT technologies in the extremely short‐channel length regime for AMOLED displays. Process integration of short‐channel gate and narrow‐width polysilicon into scaled equivalent gate‐oxide thickness (EOT), is explored, in conjunction with enhanced poly crystallization by reducing defect density‐of‐state (DOS) especially in the grain boundaries of the channel region. We obtain more than twice higher current drive (Ion) with significantly‐reduced parasitic gate capacitance, thereby enabling high‐performance high‐frequency panel operations. In addition to superior panel performance in scaled LTPS TFTs, reliable devices are attained, demonstrating robust device characteristics for negative‐bias instability (NBTI) and hot carrier injection (HCI) effects. Physics‐based analysis, based on experimental data and numerical device simulations, is performed to gain more insight in the TFT technologies.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.