Low-resistivity Substrate Research Articles

Improved enantioselective permeation in cellulose membrane-supported metal–organic framework via polyvinylpyrrolidone as the pore-forming agent

Chiral membranes have limited permeability and selective trade-off, which has been a major problem in chiral membrane separations. To address this issue, the carboxylated cellulose (CC) membranes were prepared with small pore size and low resistance substrate by regulating the amount of polyvinylpyrrolidone (PVP) and casting solution, and the CC@CuLBH composite membrane with chiral separation capability was fabricated by in situ formation of well-dispersed [Cu(L-mal)(Bipy)]·H2O (CuLBH) with the carboxyl group on the surface of CC membrane as the metal anchor points. Under the optimal conditions, the CC@CuLBH membrane showed good chiral separation ability with an ee value of 60% for R-1-(1-naphthyl)ethanol (R-NE). Compared with the CC/CuLBH membrane formed by physical blend, the CC@CuLBH membrane exhibited improved enantioselective permeation for R-NE enantiomer. Both the unique chiral microenvironment of CuLBH and the regular pore structure of CC membrane, in addition to their synergistic effects resulted in the highly permeable and enantioselectivity for the CC@CuLBH composite membrane, which broadened the preparation method of chiral membrane.

Sn-doped n-type GaN layer with high electron density of 1020 cm−3 grown by halide vapor phase epitaxy

A Sn-doped n-type GaN layer with a high electron density of 2 × 1020 cm−3 and a low resistivity of 8.7 × 10−4 Ω∙cm was grown by halide vapor phase epitaxy (HVPE). Sn doping was performed through the reaction between Sn metal and HCl gas. The Sn concentration markedly increased with decreasing growth temperature and the activation energy of Sn desorption from the GaN surface was found to be 4.1 eV. Smooth surfaces were obtained by introducing the Sn precursor even though the samples were grown at a low temperature of 905 °C, suggesting that Sn atoms act as surfactants and promote the migration of Ga adatoms. Almost all the Sn atoms act as donors in GaN below the Sn concentration of 2 × 1020 cm−3. These results indicate that using the Sn donor is promising for fabricating low-resistivity n-type GaN substrates by HVPE.

Phonons in complex twisted crystals: Angular momenta, interactions, and topology

Phonons and their interactions are critically important for a variety of energy-relevant applications ranging from low thermal resistance substrates to thermal barrier coatings. Fundamental insights into the nature of phonons and allowed interactions are governed by the underlying symmetries of the crystal lattice. In this paper, we provide a comprehensive and detailed description of lattice dynamics derived from twist symmetries of chiral and achiral crystals---twist dynamics. Phonon bands naturally carry quantized crystal angular momentum derived from rotational phases, which give insights into the nature of band crossings and avoided crossings, selection rules for phonon interactions, and topological band crossing behaviors. Twist dynamics is demonstrated for a variety of materials covering a range of space groups, symmetry operations, twist axis orientations, and constituent elements. Furthermore, twist symmetry offers insights into peculiar features observed in scattering measurements. In this context, we present inelastic neutron scattering measurements for rutile ${\mathrm{TiO}}_{2}$ and explain them using twist dynamics.

Study of the properties of a PZT thin film formed on a highly doped silicon substrate

Thin films of lead zirconate titanate were formed by plasma radiofrequency sputtering on a low-resistance silicon substrate. The properties of the films were studied by X-ray phase analysis, scanning electron microscopy, atomic force microscopy and, piezoresponse force microscopy. The domain structure was determined by the morphology of the film surface, which had a high surface potential having an average value of +10 V. The average value of the piezoelectric modulus was 15.5 ÷ 17.9 pC/V, and the magnitude of the coercive field was (3.05 ± 0.25)·105 V/cm. The formed PZT films can be used to manufacture the energy harvesters.

Photonic and electrical output signal components in optical sensors based on p-InAsSbP/n-InAs(Sb) monolithic heterostructures

Monolithic optical sensors based on low shunt resistance p-InAsSbP/n-InAs and p-InAsSbP/n-InAsSb heterostructures grown onto low-resistivity n-InAs substrates equipped with transimpedance amplifiers suffer from output electrical signal distortions. The paper presents analysis of the above distortions and an equivalent circuit for output electrical signal analysis and measurements, as well as recommendations for suppression of interference of signal components has been suggested. Keywords: optical sensors, ATR sensors, optopairs, p-InAsSbP/n-InAs(Sb) heterostructures

High Thermal Dissipation of Normally off p-GaN Gate AlGaN/GaN HEMTs on 6-Inch N-Doped Low-Resistivity SiC Substrate.

Efficient heat removal through the substrate is required in high-power operation of AlGaN/GaN high-electron-mobility transistors (HEMTs). Thus, a SiC substrate was used due to its popularity. This article reports the electrical characteristics of normally off p-GaN gate AlGaN/GaN high-electron-mobility transistors (HEMTs) on a low-resistivity SiC substrate compared with the traditional Si substrate. The p-GaN HEMTs on the SiC substrate possess several advantages, including electrical characteristics and good qualities of epitaxial crystals, especially on temperature performance. Additionally, the price of the low-resistivity SiC substrate is three times lower than the ordinary SiC substrate.

Measurements with silicon detectors at extreme neutron fluences1

Thin pad detectors made from 75 μm thick epitaxial silicon on low resistivity substrate were irradiated with reactor neutrons to fluences from 2.5× 1016 n/cm2 to 1× 1017 n/cm2. Edge-TCT measurements showed that the active detector thickness is limited to the epitaxial layer and does not extend into the low resistivity substrate even after the highest fluence. Detector current was measured under reverse and forward bias. The forward current was higher than the reverse at the same voltage but the difference gets smaller with increasing fluence. Rapid increase of current (breakdown) above ∼ 700 V under reverse bias was observed. An annealing study at 60̂C was made to 1200 minutes of accumulated annealing time. It showed that the reverse current anneals with similar time constants as measured at lower fluences. A small increase of forward current due to annealing was seen. Collected charge was measured with electrons from 90Sr source in forward and reverse bias configurations. Under reverse bias the collected charge increased linearly with bias voltage up to 6000 electrons at 2.5× 1016 n/cm2 and 3000 electrons at 1× 1017 n/cm2. Rapid increase of noise was measured above ∼ 700 V reverse bias due to breakdown resulting in worse S/N ratio. At low bias voltages slightly more charge is measured under forward bias compared to reverse. However better S/N is achieved under reverse bias. Effective trapping times were estimated from charge collection measurements under forward bias showing that at high fluences they are much longer than values extrapolated from low fluence measurements—at 1× 1017 n/cm2 a factor of 6 larger value was measured.

Optical and electrical characterization of microwave power system chemical vapour deposited (MPS-CVD) graphene on Ni electroplated Cu foil at varying temperatures

Optical and electrical properties of graphene deposited on Ni electroplated Cu foil was studied by microwave power system chemical vapour deposition. Problems associated with non-uniformity using different substrates and the control of graphene properties instigated a new method for the preparation of graphene films. The growth process involved the use of Isopropanol for the formation of radicals at varying substrate temperatures and atmospheric pressure with microwave energy to form uniform solid films. Raman spectroscopy confirmed the quality of the films and designate single-layer graphene for 2D-band at low temperature while few-layer graphene for G-band at high temperature. Scanning electron microscope revealed changes in the morphology of graphene as the deposition parameters increases. The optical analysis revealed exponential decay of absorbance with spectra fringes in the visible region and transmittance of 92.8% and 93.7% which depends on the thickness uniformity of graphene. Hall Effect measurement showed n-type carrier conductivity with large positive magnetoresistance and high electrical conductivity due to the increased number of layers, low sheet resistance and high substrate temperature. The effect of varying temperature on graphene have been investigated, perhaps, low and intermediate substrate temperature yielded better optical properties while the high temperature yielded better electrical properties.

Design of a SIW on-chip antenna using 0.18-μm CMOS process technology at 0.4 THz

A 0.4-THz on-chip antenna (OCA) is configured with high radiation efficiency and high gain, utilizing standard CMOS process technology. In this design, the back cavity is formed by connecting a top and bottom metal layer, which is connected through the vias, named substrate-integrated-waveguide (SIW). This back cavity finds to suppress the surface wave and separates the radiation towards the low-resistive substrate. The slotted radiator is constructed on the top metal layer that leads to enhance the radiation performance in broadside direction. The projected antenna size of 490 × 450 μm2 and shows a 3-dB gain bandwidth of ∼ 39 %, a directivity of ∼7.02 dBi, a radiation efficiency of ∼ 87.9 % in the frequency range from 0.380 THz to 0.420 THz. This OCA is suitable for various THz applications in suggested band.

Application of substrate as ground for designing 3D on-chip dielectric resonator antenna with improved characteristics

This paper presents a simple method to design 3D on-chip antenna with improved gain and efficiency. In the proposed method, without introducing any additional metal-based ground layer, a low resistive Si substrate is used as the ground plane for a monopole fed dielectric resonator antenna (DRA). A cylindrical DRA (CDRA) made-up of Barium Titanate (BaTiO3,εr = 24) is placed on the top side of the oxide coated Si wafer and is excited under TM011 mode with a coaxial probe inserted from the bottom of the substrate using TSV (through silicon via) hole. The proposed on-chip CDRA (OC-CDRA) designed within the foot-print area of λ0/6.12 ×λ0/6.12 provides the peak radiation gain and efficiency of 1.2 dBi and 87% respectively at its resonating frequency of 3.5 GHz. Also, it shows 14% fractional bandwidth (FBW) with respect to its resonating frequency. Further, the isolation between co- and cross (×) polarization components along the maximum radiation direction of the two principle planes with ϕ = 0° and 90° are obtained as 34 dB and 39 dB respectively. Preparing the dielectric material, the proposed OC-CDRA is fabricated and the experimentally measured results show good agreement with the simulated results.

Low VF 4H-SiC N-i-P diodes using newly developed low-resistivity p-type substrates

We fabricated 4H-SiC N-i-P (N-intrinsic-P) diodes using newly developed low-resistivity p-type substrates with higher acceptor concentrations than conventional substrate. N-i-P diodes with 10 μm thick n− drift layers were fabricated on both a low-resistivity p-type substrate and a conventional one to investigate the difference in substrate resistance and bipolar degradation with a heavily doped p-type buffer layer. The differential on-resistance of N-i-P diode, using low-resistivity p-type substrates was decreased to one third compared to the conventional case, and the difference was similar to the p-type substrates resistivity. No stacking faults expansion was observed up to 1100 A cm−2. N-i-P diodes with 233 μm thick n− drift layers were fabricated to demonstrate forward characteristics instead of an ultra-high voltage n-channel IGBTs. The forward characteristics of the N-i-P diodes with 233 μm thick n− drift layers at 200 °C showed low on-voltage 6.9 V and low differential on-resistance 32.2 mΩ cm2.

420-GHz terahertz SIW slot antenna with quartz superstrates in silicon technology

To meet the needs of terahertz imaging and communication, a 420-GHz on-chip antenna (OCA) with high gain and high radiation efficiency is designed using a standard 55 nm CMOS technology. In the proposed OCA structure, the substrate integrated waveguide (SIW) antenna forms a back cavity to suppress the surface waves and separate the radiation aperture from the low-resistivity substrate. To increase the efficiency of OCA, a single-layer quartz superstrate is proposed. An analytical model to calculate the radiation efficiency is presented, and a detailed design approach is described. The proposed antenna is simulated using Ansoft HFSS. The simulated antenna has a maximum gain of 4.9 dBi and a radiation efficiency of 76.27%. The bandwidth of S11 below −10 dB is 44 GHz. The OCA has good performance and can be widely used in terahertz imaging and communication.

Self-Heating in 40 nm SOI MOSFETs on High Resistivity, Trap-Rich Substrates

Closely spaced n-channel MOSFETs have been used to compare the self-heating in nominally identical devices fabricated on conventional and high resistivity, trap-rich silicon-on-insulator (SOI) substrates. One of the MOSFETs operates above threshold and in saturation to heat the active silicon, while the other is biased into the sub-threshold regime and operates as a local thermometer. The trap-rich layer in the high resistivity substrates consists of a highly defected, poly-Si layer just below the buried oxide. Grain boundaries in the poly-Si lead to increased phonon scattering compared to single crystal silicon, with a corresponding decrease in thermal conductivity. Despite the reduced thermal conductivity there appears to be no difference in the self-heating between the MOSFETs on the high resistivity, trap-rich substrates compared to those on the conventional low resistivity substrates.

Broadband Silicon Absorber of Terahertz Radiation

A three-layer structure is fabricated on a low-resistance silicon substrate using plasma chemical etching. We study it experimentally and show that a substrate with such a structure can be used as an absorber of terahertz (THz) radiation in the frequency range of 0.5−2.0 THz. For this structure, absorbance in the indicated frequency range is measured to be more than 95%.

Average power handling capability on SiON thin film coplanar waveguide interconnections for MMICs

In this study, we investigated the average power handling capability (APHC) of silicon-oxy-nitride (SiON) thin-film-coated coplanar waveguide (CPW) interconnections for monolithic microwave integrated circuits (MMICs). SiON thin films were prepared through very-high-frequency plasma-enhanced chemical vapor deposition at 40.68 MHz. Films prepared under various annealing conditions were studied. The microwave characteristics of CPW interconnections were analyzed for fitting to the International Technology Roadmap for Semiconductors. SiON thin films were annealed under a vacuum condition for 60 s at 700 °C, 900 °C and 1100 °C. The use of coated and annealed SiON thin films on the low-resistivity Si substrate effectively improved the substrate resistivity, reduced microwave attenuation at 1100 °C, and enhanced the APHC of CPW interconnections. These results indicate that the proposed method is suitable for application to MMICs.

Impact of Silicon Substrate with Low Resistivity on Vertical Leakage Current in AlGaN/GaN HEMTs

The role of low-resistivity substrate on vertical leakage current (VLC) of AlGaN/GaN-on-Si epitaxial layers has been investigated. AlGaN/GaN high-electron-mobility transistors (HEMTs) grown on both p-type and n-type Si substrates with low resistivity are applied to analyze the vertical leakage mechanisms. The activation energy (Ea) for p-type case is higher than that for n-type at 0–600 V obtained by temperature-dependent current-voltage measurements. An additional depletion region in the region of 0–400 V forms at the AlN/p-Si interface but not for AlN/n-Si. That depletion region leads to a decrease of electron injection and hence effectively reduces the VLC. While in the region of 400–600 V, the electron injection from p-Si substrate increases quickly compared to n-Si substrate, due to the occurrence of impact ionization in the p-Si substrate depletion region. The comparative results indicate that the doping type of low-resistivity substrate plays a key role for VLC.

Radiation damage in p-type EPI silicon pad diodes irradiated with protons and neutrons

In view of the HL-LHC upgrade, radiation-tolerant silicon sensors containing low-resistivity p-type implants or substrates, like LGAD or HV-CMOS devices, are being developed in the framework of ATLAS, CMS, RD50 and other sensor R&D projects. These devices are facing a particular problem — the apparent deactivation of the doping due to the irradiation, the so-called acceptor removal effect. In the present work proton and neutron fluence-dependent radiation damage effects, including the change in leakage current and effective doping concentration, space charge sign-inversion, but also introduction and annealing of point- and cluster-like defects have been studied in Si pad diodes fabricated from p-type EPI material of different resistivity (10–1000 Ωcm). Standard electrical characterisations (IV, CV), TCT (Transient Current Technique) and TSC (Thermally Stimulated Current) techniques were applied. A correlation between effective doping concentration obtained from CV measurements and defect concentration Nt extracted from TSC measurements for both – neutron and proton – irradiations was observed pointing towards the microscopic origin of the acceptor removal. A detailed analysis of the dominant TSC peaks - E(30), BiOi and three main deep acceptor levels H(116), H(140) and H(152) - responsible for the changes in the effective space charge is performed. The origin and annealing behaviour of E(30) and H(40) and other cluster-related defects are discussed as well.

Wideband terahertz imaging pixel with a small on-chip antenna in 180 nm CMOS

We propose a Si-CMOS terahertz image sensor to resolve paucity of low-cost and small-size detectors. The imaging pixel consists of an on-chip antenna and an amplifier acting as envelope detector. The pixel uses a microstrip patch antenna for receiving THz waves. However, the antenna’s narrow bandwidth and large ground plane size causes major problems. A low-resistivity Si substrate degrades the gain of planar antennas besides the microstrip patch antenna. We introduce an on-chip folded-slot antenna to reduce the pixel size and prevent gain degradation due to the Si substrate. The antenna has a broader bandwidth and higher gain than conventional on-chip slot antenna. We fabricated the patch/folded-slot types of the pixel circuits by using 0.18 μm CMOS process. Measurement results show that the folded-slot antenna has a broader bandwidth from 850 GHz to 1.05 THz.

Design of tunable interdigital capacitor

In this paper, a MetalMUMPs (Multi-User Microelectromechanical System Processes) based tunable interdigitated capacitor is proposed. The tunable interdigitated capacitor consists of thermal actuator, guided beam, and twelve closely coupled parallel fingers lines to produce a nominal capacitance value of about 40.863 fF capable to tune till 326.902 fF. It actuated (tunned) thermally by applying a voltage across the thermal actuator to decreased distance between capacitor rotor and stator then capacitor becomes more capacitive, due to the increase in fringing fields between the fingers. The tunable interdigitated capacitor was fabricated on a standard low-resistivity substrate adopting MetalMUMPs manufacturing process. It was suspended by 25μm from the inner surface of the etched silicon substrate. It typical called microstrip tunable interdigitated capacitor. The capacitor was designed using 2008 CoventorWare software and fabricated based on MetalMUMPs technology. The measured capacitor structure is 494×520 μm2. The measured results show good compatible with theoretical one.

Fe3O4 Nanowire Arrays on Flexible Polypropylene Substrates for UV and Magnetic Sensing

The in situ growth of one-dimensional magnetite (Fe3O4) nanowire (NW) arrays with deterministic and tunable control over their orientation and morphology on a wide range of flexible and low heat resistance substrates is still a challenge. Herein, a facile method of controlling the orientation of Fe3O4 NW arrays on a polypropylene (PP) nonwoven fabric surface (PP-g-PAO/Fe3O4) through simultaneous radiation induced graft polymerization and coprecipitation processes was realized. We demonstrated a control over the orientation and geometric properties of coprecipitated Fe3O4 NWs via complex iron ion using amidoxime groups, which not only endow the material with high durability but also lead to the oriented growth of Fe3O4 NWs. The results showed that Fe3O4 NWs were only grown on the surface of the PP nonwoven fabric (length:diameter ratio ≈ 10), whereas the Fe3O4 produced in the solution exhibited a spherical structure under identical conditions. The PP-g-PAO/Fe3O4 composite presented a good saturated magneti...