The initial transient (ITS) phenomena in plasma enhanced Chemical Vapor Deposition (PECVD) process was identified in early 1980’s (1). This ITS phenomenon has impact on the bonding structure and composition of plasma deposited silicon nitride (1) and amorphous silicon (2) films at the initial film-substrate interface. When the deposited film is in micron thickness, the ITS impact is generally smaller. The shrinking of semiconductor devices and the corresponding push to increase device density is continuing in the quest for improved performance of integrated circuits. Nano scale thickness low temperature plasma CVD dielectric films such as silicon nitride and silicon carbon nitride used as cap materials (3) for Cu interconnects that are expected to reach to sub-10 nm dimension next few years. The compositional variation in PECVD films at the interface by ITS which had a relatively small impact in past semiconductor technologies is becoming a significant factor in film’s properties as we scale film thickness down to sub-10nm. In this paper, we will present in detail the impact of the initial transient plasma in CVD process on the ultrathin nano thick cap and-low k dielectric films that are being used for advanced device interconnect fabrication, We will show that we can modify the current standard PECVD process to alleviate the impact of ITS phenomena. Some ITS impact on nano thick film are: a) PECVD silicon nitride / silicon carbon nitride dielectric cap films are normally deposited with a mixture of silane/ammonia or other carbosilane/ammonia precursors. The initial breakdown of silane is strongly affected by the plasma conditions and the dissociation thermodynamic of the precursors. Deposition rates can be different on Cu versus dielectric surfaces due differences in charging effects (see Figure 1). Additionally, the silane molecule is relatively unstable and more reactive as compared to ammonia, and typically dissociate rapidly first to form more conformal SiHx deposition radicals before the plasma reaches a steady state. Subsequently, PECVD with SiH4/NH3 precursors will normally produce a Si-rich silicon nitride composition at the interface. Silicon carbon nitride films can be deposited from more stable carbosilane precursors. In this case, the thickness of the Si-rich interface zone can be reduced, and a C-rich film surface may be deposited under specific deposition condition. This modulation may be exploited to control electrical (k, breakdown/leakage) and adhesion properties of the film for Cu low k interconnect structures. For a very thin dielectric cap deposited on a patterned structure of Cu and ultra-low k dielectric, the film thickness deposited on Cu versus the dielectric surface will be slightly different due to the differential local plasma charging effect during initial transient deposition period as shown in fig 1. This deposition rate difference will impact the film’s barrier and electrical properties, gap fill performance and subsequent in Cu-low k fabrication. In this case, plasma ITS charging is the principle mechanism that cause differences in film’s thickness. b) For typical PECVD SiN deposition process, the initial dissociation of SiH4 and/or NH3 will create reactive species that subsequently etch the deposited ultra-low k pSiCOH dielectric surface. These reactive species can produce substantial damage to pSiCOH, increase dielectric constant and subsequently poor reliability in final electronic devices. This damage can be reduced significantly by using an initially low rf plasma power and then increasing to a higher rf plasma power for the remainder of the deposition (4). ITS negative impact to devices and mitigation method will be discussed. c) For ultrathin cap films for Cu interconnects, such as SiN, variations in film composition at the interface will cause significant variation in electrical properties and conformality. To mitigate the ITS effect, a cyclic, multi-step deposition process utilizing plasma surface treatment was developed. A multilayers film with better conformality and consistent film’s properties was achieved. Using this novel cyclic process, high quality dielectrics SiN and SiNO at sub-10 nm thickness can be deposited consistently and reproducibly for Cu-low k interconnect fabrication as showed in Figure 2. In summary, the ITS phenomena on plasma CVD, its impact in nano thick film fabrication and methods to mitigate the ITS’s negative impact will be presented in the paper.
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