Low-cost Chip Research Articles

Low-cost and efficient prediction hardware for tabular data using tiny classifier circuits

A typical machine learning development cycle maximizes performance during model training and then minimizes the memory and area footprint of the trained model for deployment on processing cores, graphics processing units, microcontrollers or custom hardware accelerators. However, this becomes increasingly difficult as machine learning models grow larger and more complex. Here we report a methodology for automatically generating predictor circuits for the classification of tabular data. The approach offers comparable prediction performance to conventional machine learning techniques as substantially fewer hardware resources and power are used. We use an evolutionary algorithm to search over the space of logic gates and automatically generate a classifier circuit with maximized training prediction accuracy, which consists of no more than 300 logic gates. When simulated as a silicon chip, our tiny classifiers use 8–18 times less area and 4–8 times less power than the best-performing machine learning baseline. When implemented as a low-cost chip on a flexible substrate, they occupy 10–75 times less area, consume 13–75 times less power and have 6 times better yield than the most hardware-efficient ML baseline.

Dracon: An Open-Hardware Based Platform for Single-Chip Low-Cost Reconfigurable IoT Devices

The development of devices for the Internet of Things (IoT) requires the rapid prototyping of different hardware configurations. In this paper, a modular hardware platform allowing to prototype, test and even implement IoT appliances on low-cost reconfigurable devices is presented. The proposed platform, named Dracon, includes a Z80-clone microprocessor, up to 64 KB of RAM, and 256 inputs/outputs (I/Os). These I/Os can be used to connect additional co-processors within the same FPGA, external co-processors, communications modules, sensors and actuators. Dracon also includes as default peripherals a UART for programming and accessing the microprocessor, a Real Time Clock, and an Interrupt Timer. The use of an 8-bit microprocessor allows the use of the internal memory of the reconfigurable device as program memory, thereby, enabling the implementation of a complete IoT device within a single low-cost chip. Indeed, results using a Spartan 7 FPGA show that it is possible to implement Dracon with only 1515 6-input LUTs while operating at a maximum frequency of 80 MHz, which results in a better trade-off in terms of area and performance than other less powerful and less versatile alternatives in the literature. Moreover, the presented platform allows the development of embedded software applications independently of the selected FPGA device, enabling rapid prototyping and implementations on devices from different manufacturers.

Review on maintenance of photovoltaic systems based on deep learning and internet of things

Many solar plants have been installed globally, and they must be continuously protected and supervised to ensure their safety and reliability. Photovoltaic plants are susceptible to many defects and failures, and fault detection technology is used to protect and isolate them. Despite numerous inter-national standards, invisible photovoltaic defects continue to cause major is-sues. As a result, smart technologies like AI (Artificial Intelligence) and IoT are being developed for remote sensing, problem detection, and diagnosis of photovoltaic systems. Solar plants generate not only green electricity but also a lot of data, such as power output. With AI, a clear picture of electricity yields should be possible. The output of entire solar parks could be monitored and analyzed. The AI could also detect malfunctions within a solar park, according to the research. This would speed up and simplify maintenance work. Deep learning (DL) and IoT applications for photovoltaic plants are discussed. The most advanced techniques, such as DL, are discussed in terms of precision and accuracy. Incorporating DL and IoT approaches for fault detection and diagnosis into simple hardware, such as low-cost chips, maybe cost-effective and technically feasible for photovoltaic facilities located in remote locations.

Multifunctional Gelatin-Nanoparticle-Modified Chip for Enhanced Capture and Non-Destructive Release of Circulating Tumor Cells

Circulating tumor cells (CTCs) in cancer patients’ peripheral blood have been demonstrated to be a significant biomarker for metastasis detection, disease prognosis, and therapy response. Due to their extremely low concentrations, efficient enrichment and non-destructive release are needed. Herein, an FTO chip modified with multifunctional gelatin nanoparticles (GNPs) was designed for the specific capture and non-destructive release of CTCs. These nanoparticles share a similar dimension with the microvilli and pseudopodium of the cellular surface; thus, they can enhance adhesion to CTCs, and then GNPs can be degraded by the enzyme matrix metalloproteinase (MMP-9), gently releasing the captured cells. In addition, the transparency of the chip makes it possible for fluorescence immunoassay identification in situ under a microscope. Our chip attained a high capture efficiency of 89.27%, a release efficiency of 91.98%, and an excellent cellular viability of 96.91% when the concentration of MMP-9 was 0.2 mg/mL. Moreover, we successfully identified CTCs from cancer patients’ blood samples. This simple-to-operate, low-cost chip exhibits great potential for clinical application.

Meal-Monitoring Systems Using Weight and Temperature Sensors for Elder Residents in Long-Term Care Facilities.

This paper presents a few meal-monitoring systems for elder residents (especially patients) in LTCFs by using electronic weight and temperature sensors. These monitoring systems enable to convey the information of the amount of meal taken by the patients in real-time via wireless communication networks onto the mobile phones of their nurses in charge or families. Thereby, the nurses can easily spot the most patients who need immediate assistance, while the families can have relief in seeing the crucial information for the well-being of their parents at least three times a day. Meanwhile, the patients tend to suffer burns of their tongues because they can hardly recognize the temperature of hot meals served. This situation can be avoided by utilizing the meal temperature-monitoring system, which displays an alarm to the patients when the meal temperature is above the reference. These meal-monitoring systems can be easily implemented by utilizing low-cost sensor chips and Arduino NANO boards so that elder-care hospitals and nursing homes can afford to exploit them with no additional cost. Hence, we believe that the proposed monitoring systems would be a potential solution to provide a great help and relief for the professional nurses working in elder-care hospitals and nursing homes.

Application of a Micro Free-Flow Electrophoresis 3D Printed Lab-on-a-Chip for Micro-Nanoparticles Analysis.

The present work describes a novel microfluidic free-flow electrophoresis device developed by applying three-dimensional (3D) printing technology to rapid prototype a low-cost chip for micro- and nanoparticle collection and analysis. Accurate reproducibility of the device design and the integration of the inlet and outlet ports with the proper tube interconnection was achieved by the additive manufacturing process. Test prints were performed to compare the glossy and the matte type of surface finish. Analyzing the surface topography of the 3D printed device, we demonstrated how the best reproducibility was obtained with the glossy device showing a 5% accuracy. The performance of the device was demonstrated by a free-flow zone electrophoresis application on micro- and nanoparticles with different dimensions, charge surfaces and fluorescent dyes by applying different separation voltages up to 55 V. Dynamic light scattering (DLS) measurements and ultraviolet−visible spectroscopy (UV−Vis) analysis were performed on particles collected at the outlets. The percentage of particles observed at each outlet was determined in order to demonstrate the capability of the micro free-flow electrophoresis (µFFE) device to work properly in dependence of the applied electric field. In conclusion, we rapid prototyped a microfluidic device by 3D printing, which ensured micro- and nanoparticle deviation and concentration in a reduced operation volume and hence suitable for biomedical as well as pharmaceutical applications.

Size control of single-crystal perovskite nanoplatelets based on vapor deposition

Abstract The issue of organic-inorganic perovskites has received considerable attention because of its importance in improving the efficiency of solar cells. The power conversion efficiency of solar cells has climbed from 3.8% in 2009 to over 25.2% currently. Its outstanding performance is mainly attributed to its long carrier lifetime (101−2 ns), diffusion length (μm), high absorption coefficient, direct bandgap (band gap ~1.55 eV), stable electron/hole migration and other characteristics. In addition to these features, organic-inorganic lead perovskites also have high fluorescence yields and tunable absorption wavelengths, making it an ideal laser gain medium. In this paper, the physical vapor deposition (PVD) is used to grow atomically smooth lead iodide nanoplatelets (PbI2 NPL) on a mica substrate, and convert the PbI2 NPL into atomically smooth single-crystal perovskite nanoplatelets (CH3NH3PbI3 NPL) by chemical vapor deposition. The nanoplatelets can naturally form WGM (whispering-gallery-mode) microcavities. We can control the size of CH3NH3PbI3 NPL (from a few microns to dozens of microns) by adjusting the deposition location, deposition temperature, and deposition time. With the increase of edge length, the mode interval decreases, the peak is red shift, and it shows excellent lasing characteristics with a threshold down to 17 μJ/cm2. This has great application potential in the field of low-cost chip light source.

Review of metal oxide semiconductors-based thin-film transistors for point-of-care sensor applications

Recently, oxide semiconductors-based thin-film transistors have received much attention for biosensor platforms due to their high sensitivity, good chemical resistance, easy surface immobilizations of bioreceptors, and easy fabrication process with solution process or sputtering method. Unlike Si technologies, oxide semiconductors-based thin-film transistors can be fabricated easily and it is highly attractive to make simple sensor arrays. For long-term health-care monitoring, high sensitivity, selectivity, and low-cost chip should be considered. Regarding these issues, metal oxide semiconductors and thin-film transistors are good candidates. Here we address state-of-the-art research trends of biosensors with metal oxide semiconductors-bases thin-film transistors and discuss solution-processing and sputtering methods, separately.

Dispositivo de inclinación con acelerómetro para control On/Off en pacientes con una discapacidad motriz profunda

This paper will describe the design and operation of a prototype tilt to operate switches and which can be operated by patients with severe motor impairment. The base for the switch is an accelerometer built on a single low-cost chip. The switch responds to a relatively fast rotation of the active components that can be placed on a headband that will be used on the head. The design of the device has been made so that it has a large adjustment range. The device is automatically adjusted for changes in the attitude of the device resulting from a changing patient posture. We show that the device can operate in a wide range of attitudes. Three basic operation tests are described that show that the prototype was successfully used as a head tilt switch.

PIXUL-ChIP: integrated high-throughput sample preparation and analytical platform for epigenetic studies.

Chromatin immunoprecipitation (ChIP) is the most widely used approach for identification of genome-associated proteins and their modifications. We have previously introduced a microplate-based ChIP platform, Matrix ChIP, where the entire ChIP procedure is done on the same plate without sample transfers. Compared to conventional ChIP protocols, the Matrix ChIP assay is faster and has increased throughput. However, even with microplate ChIP assays, sample preparation and chromatin fragmentation (which is required to map genomic locations) remains a major bottleneck. We have developed a novel technology (termed ‘PIXUL’) utilizing an array of ultrasound transducers for simultaneous shearing of samples in standard 96-well microplates. We integrated PIXUL with Matrix ChIP (‘PIXUL-ChIP’), that allows for fast, reproducible, low-cost and high-throughput sample preparation and ChIP analysis of 96 samples (cell culture or tissues) in one day. Further, we demonstrated that chromatin prepared using PIXUL can be used in an existing ChIP-seq workflow. Thus, the high-throughput capacity of PIXUL-ChIP provides the means to carry out ChIP-qPCR or ChIP-seq experiments involving dozens of samples. Given the complexity of epigenetic processes, the use of PIXUL-ChIP will advance our understanding of these processes in health and disease, as well as facilitate screening of epigenetic drugs.

A novel low-cost microcontroller-based implementation of SVM algorithm for an indirect matrix converter

ABSTRACTModulation algorithms of indirect matrix converters (IMCs) are complicated and need powerful processors, such as DSP along with FPGA or CPLD for implementation. Using any extra hardware increases the cost and complexity and also reduces the reliability of the system. In this paper, a new realization for the space vector modulation (SVM) of the IMC is proposed so that it can be implemented by using a single low-cost 32-bit ARM-based microcontroller chip without any additional hardware. Therefore, due to the elimination of the extra hardware in the proposed method, the compact design in the control part of the system is provided so the reliability of the system is increased. Moreover, the cost of the system can be significantly reduced in low-power applications. This realization is based on using the timer-counter modules and the interrupt routine of the microcontroller. Therefore, the CPU burden is also minimized and the microcontroller can perform other tasks such as calculation of complex control algorithms. This feature can also be valuable in some applications. The experimental results of an IMC connected to the RL and a motor load demonstrate the validity of the proposed method.

Manufacture of microfluidic chips using a gap-control method based on traditional 3D printing technique

The solution to the commercialization of polymer microfluidic chips lies in the development of a low-cost and concise method. We present in this paper a gap-control method for obtaining low cost microfluidic chips on PMMA (polymethyl methacrylate) sheets based on traditional 3D printing technique—fused deposition modeling. The influence of 3D printing parameters such as printing temperature, printing speed, wire flow rate and initial layer thickness on printing quality is studied by experiments. The effect of O2 plasma parameters such as chamber power and treatment time on the adhesion strength between printed PLA (polylactic acid) structures and PMMA substrate is investigated. The dye filling tests demonstrate that there is no blocking or leakage over the entire microchannels. With this newly developed technology, low-cost and large scale microfluidic chips can be fabricated, which allows commercial manufacturing of microchannels over large areas.

Generic high resolution PET detector block using 12 × 12 SiPM array

With the advancement of the Silicon Photomultiplier (SiPM) technology, these devices are becoming the mainstream for use in high resolution PET detectors especially where the compatibility with magnetic field is critical. Large-area SiPM arrays are now widely used in high resolution PET detector modules. The challenges are emerged in the readout and timing circuitry by the increase of pixel density in the area. The application-specific integrated circuits (ASICs) are developed to readout arrays with standard anode/cathode outputs. SiPM detection principle, which produces dark current noise in the inactive pixels, makes the multiplexing techniques more challenging rather than the PMT signals. In this work a new generic PET detector block using SiPM arrays with three outputs (anode, cathode, and fast) is presented which is suitable for applications in small animal, brain, and clinical PET imaging. The block detector accepts a 12 × 12 array with both standard and fast output signals with an overall detector dimension of 50 × 50 mm2. A new version of the scrambled crosswire readout (SCR) method was implemented to reduce 144 ‘fast outputs’ to 9 tile signals and 144 standard outputs to 16 energy channels. The tile signals are also used to generate time pickoff information for timing resolution. We implemented time-to-digital converter (TDC) in Xilinx’s SPARTAN6 field programmable gate array (FPGA) by using the 64-tap delay line. This low cost chip performs all required processes for position, energy, time, and interface architecture. The attached 24 × 24 LYSO:Ce array with 2 × 2 × 10 mm3 pixels is imaged and pixels are resolved clearly in the room temperature. The measured energy resolution of the detector block after calibration for all crystal pixels is 12.4% at 511 keV. Also, the coincidence resolving time for two identical modules was measured at 1.85 ns.

Blocked recombinase polymerase amplification for mutation analysis of PIK3CA gene

A blocked recombinase polymerase amplification (blocked-RPA) approach has been developed for the enrichment of mutated templates in heterogeneous specimens as tumor tissues. This isothermal amplification technique opens alternative solutions for meeting the technological demand of physician office laboratories. Herein, the detection of mutations in PIK3CA gene, such as p.E545K, and p.H1047L, is presented. The main element was an oligonucleotide (dideoxycytidine functionalized at 3′-end) which matched with wild-type sequence in the target locus. The amplification was performed operating at 37 °C during 40 min. The results demonstrated that the competition between the upstream primer and the blocker reduced the percentage of amplified wild-type allele, making the detection of the present mutation easier.For mutation discrimination, a fast hybridization assay was performed in microarray format on plastic chip and colorimetric detection. This approach enabled the reliable discrimination of specific mutations against a background of up to 95% wild-type DNA. The applicability of the method, based on the combination of blocked-RPA and low-cost chip hybridization, was successfully proven for the genotyping of various cancer cell lines as well as tumor tissues. The assignations agreed with those provided by next-generation sequencing. Therefore, these investigations would support a personalized approach to patient care based on the molecular signature of human cancers.

Adaptive Integration of the Compressed Algorithm of CS and NPC for the ECG Signal Compressed Algorithm in VLSI Implementation.

Compressed sensing (CS) is a promising approach to the compression and reconstruction of electrocardiogram (ECG) signals. It has been shown that following reconstruction, most of the changes between the original and reconstructed signals are distributed in the Q, R, and S waves (QRS) region. Furthermore, any increase in the compression ratio tends to increase the magnitude of the change. This paper presents a novel approach integrating the near-precise compressed (NPC) and CS algorithms. The simulation results presented notable improvements in signal-to-noise ratio (SNR) and compression ratio (CR). The efficacy of this approach was verified by fabricating a highly efficient low-cost chip using the Taiwan Semiconductor Manufacturing Company’s (TSMC) 0.18-μm Complementary Metal-Oxide-Semiconductor (CMOS) technology. The proposed core has an operating frequency of 60 MHz and gate counts of 2.69 K.

A Hot-Polymer Fiber Fabry-Perot Interferometer Anemometer for Sensing Airflow.

This work proposes the first hot-polymer fiber Fabry–Perot interferometer (HPFFPI) anemometer for sensing airflow. The proposed HPFFPI is based on a single-mode fiber (SMF) endface that is attached to a UV-cured polymer to form an ultracompact fiber Fabry–Perot microcavity. The proposed polymer microcavity was heated using a low-cost chip resistor with a controllable dc driving power to achieve a desired polymer’s steady-state temperature (T) that exceeds the T of the surrounding environment. The polymer is highly sensitive to variations of T with high repeatability. When the hot polymer was cooled by the measured flowing air, the wavelength fringes of its optical spectra shifted. The HPFFPI anemometers have been experimentally evaluated for different cavity lengths and heating power values. Experimental results demonstrate that the proposed HPFFPI responses well in terms of airflow measurement. A high sensitivity of 1.139 nm/(m/s) and a good resolution of 0.0088 m/s over the 0~2.54 m/s range of airflow were achieved with a cavity length of 10 μm and a heating power of 0.402 W.

Analysis and Research on Low-Cost and Non-Intrusive Power Metering Chip

Metering technology is one of the core technologies of the smart power grid. The overall metering solution and related products have a wide market space in the whole process of power production, which bring new opportunities for power distribution development from automation to intelligentialize, and provide technical supports for the power metering system platform. Because of the importance of metering products and their market demand, this paper focuses on the design of a simple power metering chip with low-cost, low-precision and non-invasive, so as to lay the foundation for the development and practical technology accumulation of power metering products. The design achieves low cost by reducing the acquisition accuracy, simplifying the collection and sampling methods. This paper studies the chip accuracy, sampling methods, collection methods, and the inference of the chip characteristics requirements.

A simple and low-cost chip bonding solution for high pressure, high temperature and biological applications.

The sealing of microfluidic devices remains a complex and time-consuming process requiring specific equipment and protocols: a universal method is thus highly desirable. We propose here the use of a commercially available sealing tape as a robust, versatile, reversible solution, compatible with cell and molecular biology protocols, and requiring only the application of manually achievable pressures. The performance of the seal was tested with regards to the most commonly used chip materials. For most materials, the bonding resisted 5 bars at room temperature and 1 bar at 95 °C. This method should find numerous uses, ranging from fast prototyping in the laboratory to implementation in low technology environments or industrial production.

On-Board Silicon Photonics-Based Transceivers With 1-Tb/s Capacity

Providing host Application-specific integrated circuit (ASIC) (e.g., microprocessors, switches, or field-programmable gate array (FPGAs)) with terabit per second optical transmission capabilities has emerged as a new requirement in exascale cloud data centers and high-performance computing. The combination of silicon photonics (Si-Phot) and 3-D interconnecting technologies stands as a unique solution for fulfilling this need while addressing the key factors of success that are more Gb/s/cm2, less pJ/bit, and less $/Gb/s. This paper is intended to present and evaluate several Si-Phot-based solutions for providing the host ASIC with 1-Tb/s optical transceivers. Two packaging architectures are proposed, making use of 3-D interconnecting building blocks, and motivated by the need for implementing a few hundreds of high-speed electrical interconnections. Models are given for each of the 3-D building blocks, and simulation of the overall electrical signal integrity is made for the two proposed transceiver architectures. In addition, using the capability of CMOS fabrication lines for producing low-cost transceiver chips (Si-Phot integrated circuits with their electronic ICs) and 3-D chip assemblies, it is also necessary to develop high-throughput/low-cost techniques for coupling the light from the chip to the fiber. One such technique will be presented.

Extra! Extra! Microfluidic chips go to print

Roll-to-roll manufacturing and inertial focusing principles are combined to achieve scalable yet low-cost microfluidic chips for cellular analyses.