Logic Family Research Articles

On expansion and contraction of DL-Lite knowledge bases

Knowledge bases (KBs) are not static entities: new information constantly appears and some of the previous knowledge becomes obsolete. In order to reflect this evolution of knowledge, KBs should be expanded with the new knowledge and contracted from the obsolete one. This problem is well-studied for propositional but much less for first-order KBs. In this work we investigate knowledge expansion and contraction for KBs expressed in DL-Lite, a family of description logics (DLs) that underlie the tractable fragment OWL2QL of the Web Ontology Language OWL2. We start with a novel knowledge evolution framework and natural postulates that evolution should respect, and compare our postulates to the well-established AGM postulates. We then review well-known model and formula-based approaches for expansion and contraction for propositional theories and show how they can be adapted to the case of DL-Lite. In particular, we show intrinsic limitations of model-based approaches: besides the fact that some of them do not respect the postulates we have established, they ignore the structural properties of KBs. This leads to undesired properties of evolution results: evolution of DL-Lite KBs cannot be captured in DL-Lite. Moreover, we show that well-known formula-based approaches are also not appropriate for DL-Lite expansion and contraction: they either have a high complexity of computation, or they produce logical theories that cannot be expressed in DL-Lite. Thus, we propose a novel formula-based approach that respects our principles and for which evolution is expressible in DL-Lite. For this approach we also propose polynomial time deterministic algorithms to compute evolution of DL-Lite KBs when evolution affects only factual data.

A family of metainferential logics

ABSTRACTWe will present 12 different mixed metainferential consequence relations. Each one of them is specified using two different inferential Tarskian or non-Tarskian consequence relations: or . We will show that it is possible to obtain a Tarskian logic with non-Tarskian inferential logics, but also a non-Tarskian logic with Tarskian inferential logics. Moreover, we will show how some of these metainferential logics work better than the corresponding inferential rivals. Finally, we will show how these logics prove that it is not enough to work with inferences as pairs of sets of formulas to obtain a contractive logic.

Logical Family: A Memoir by Armistead Maupin

Reviewed by: Logical Family: A Memoir by Armistead Maupin Robert Kellerman Armistead Maupin, Logical Family: A Memoir. New York: HarperCollins, 2017. Cloth, $27.99; paper, $16.99; e-book, $12.99. Fans of Armistead Maupin’s series of novels collectively known as Tales of the City will find much pleasure in his recent memoir, Logical Family. Like his fiction, it features the incisive characterization, candor, and psychological depth for which Maupin is best known, as well as some of the same wildly improbable plotlines drawn from his own life that have made his novels such compulsive reading. Maupin has met President Nixon, worked for Senator Jesse Helms, had a tour of duty in Vietnam, came out in San Francisco, and began writing the novels for which he is famous as newspaper columns with virtually no plan of how he was going bring the scheme off. Nobody knew, least of all Maupin himself, that these nine novels would become his life work and a mouthpiece for LGBTQ liberation for thousands of devoted readers worldwide. The book’s title is his own phrase, “logical family,” as opposed to “biological family”—that is, the people one chooses to have relationships with as opposed to those one has to by virtue of blood. Maupin is unflinchingly honest about his conservative biological family: his father and brother are distant; his Confederate grandfather looms large in his family mythology; but he finds refuge in his mother, sister, and grandmothers. Interesting as his family is, [End Page 92] his logical family is even more so, including the many people he met as he moved to San Francisco and began his writing career, as well as those he met because of his coming out and subsequent status as a gay public figure: actor Rock Hudson, for example, with whom he had an affair and, following that, a long friendship; actor Ian McKellen; artist Donald Bachardy and his partner, writer Christopher Isherwood. Presumably, Maupin sought to explore how his background created his need for a logical family, and the two subjects—his background and his logical family—do not always connect as clearly as they might. For instance, the chapter Maupin devotes to his stint in Vietnam is fascinating, but it is unclear exactly why its material is important to the larger narrative. There are odd omissions as well. For example, one wonders about his long-term partner Terry Anderson, who is barely mentioned, and about his husband Christopher Turner, who is mentioned often but with no great detail about their relationship: how they met, how their relationship developed, and so on. Given that these would presumably be some of the most important members of Maupin’s logical family, such omissions are puzzling. Perhaps the most surprising omission is one that many readers may be looking for: the development of the nine-novel fictional world he created. There is fascinating material about how the initial six-volume set of novels actually got started but not nearly as much on how it developed and was sustained over time, nor on the final three novels that pick up nearly twenty years after the first six left off. One familiar with his entire corpus might wish the connections between Maupin’s life and his fiction were more fully articulated. These, however, are minor quibbles. One of the attributes of a memoir is its free-form nature, allowing its writer to emphasize what he or she feels is important without necessary regard for logical narrative progression. Alert readers will see the seeds of his greatest character creation, Anna Madrigal, in his grandmother, and his main characters, Mary Ann Singleton and Michael Tolliver, as clearly aspects of his own personality as he came out in San Francisco as a young man: naïve, curious, hopeful, romantic. As his readers know, Maupin is a natural storyteller, and his stories are [End Page 93] well worth hearing. As a panorama of the LGBTQ movement filtered through one man’s experiences, the memoir is a wonderful success in social history. And, as always, Maupin’s humanity and warmth come shining through. As he writes about an intergenerational party of gay men, “This is how the camaraderie of...

Making Agents’ Abilities Explicit

Alternating-time temporal logics (ATL/ATL*) represent a family of modal logics for reasoning about agents' strategic abilities in multiagent systems (MAS). The interpretations of ATL/ATL* over the semantic model Concurrent Game Structures (CGS) usually vary depending on the agents' abilities, for instance, perfect vs. imperfect information, perfect vs. imperfect recall, resulting in a variety of variants which have been studied extensively in literature. However, they are defined at the semantic level, which may limit modeling flexibilities and may give counter-intuitive interpretations. To mitigate these issues, in this work, we propose to extend CGS with agents' abilities and study the new semantics of ATL/ATL* under this model. We give PSACE/2EXPTIME model-checking algorithms for ATL/ATL* and implement them as a prototype tool. Experiment results show the practical feasibility of the approach.

On Expansion and Contraction of DL-Lite Knowledge Bases

Knowledge bases (KBs) are not static entities: new information constantly appears and some of the previous knowledge becomes obsolete. In order to reflect this evolution of knowledge, KBs should be expanded with the new knowledge and contracted from the obsolete one. This problem is well-studied for propositional but much less for first-order KBs. In this work we investigate knowledge expansion and contraction for KBs expressed in DL-Lite, a family of description logics (DLs) that underlie the tractable fragment OWL2 QL of the Web Ontology Language OWL2. We start with a novel knowledge evolution framework and natural postulates that evolution should respect, and compare our postulates to the well-established AGM postulates. We then review well-known model and formula-based approaches for expansion and contraction for propositional theories and show how they can be adapted to the case of DL-Lite. In particular, we show intrinsic limitations of model-based approaches: besides the fact that some of them do not respect the postulates we have established, they ignore the structural properties of KBs. This leads to undesired properties of evolution results: evolution of DL-Lite KBs cannot be captured in DL-Lite. Moreover, we show that well-known formula-based approaches are also not appropriate for DL-Lite expansion and contraction: they either have a high complexity of computation, or they produce logical theories that cannot be expressed in DL-Lite. Thus, we propose a novel formula-based approach that respects our principles and for which evolution is expressible in DL-Lite. For this approach we also propose polynomial time deterministic algorithms to compute evolution of DL-Lite KBs when evolution affects only factual data.

Integration of Weighted Terminological Concepts and Vague Knowledge in Ontologies for Decision Making

A well-known family of logics for managing structured knowledge is Description logics (DLs). They form the basis for a wide variety of ontology languages. Experience with the use of DLs in applications has, however, shown that their capabilities are insufficient for some domains. In particular, the decision-making process requires the assessment of two, possibly contradictory, influences on decision factors. First, there are items belonging to certain classes or fulfillling certain roles within complex logical constructs, but these memberships are to some extent vague. Secondly, individual preferences may change depending on the person who controls the decision-making process. Therefore, the challenge in building a decision making framework is to appropriately account for these variable influences by depicting and incorporating both aspects. This paper shows how these influences can be best modeled using a combination of fuzzy description logic and weighted description logic. Fuzzy logic is used to represent vagueness and ambiguity in ontologies, weighted description logic expresses individual preferences. In addition, the paper shows how to engineer an appropriate architecture for the suggested model.

Memristive Logic in Crossbar Memory Arrays: Variability-Aware Design for Higher Reliability

The advent of the first TiO2-based memristor in 2008 revived the scientific interest both from academia and industry for this device technology and has so far led to several emerging applications including logic and in-memory computing. Several memristive logic families have been proposed in the current quest for energy-efficient future computing systems. However, the limited device endurance and variability (both cycle-to-cycle and device-to-device) are important parameters to be considered in the assessment of logic operations. In this work, we used an accurate physics-based model of a bipolar memristor (supporting parasitics of the device structure and variability of switching voltages and resistance states) and demonstrate that performance of memristor-based in-memory computations can de degraded owing to both variability and state drift impact, if such features are not properly considered in the design flow. Inspired on pseudo-NMOS ratioed logic and based upon a previous CMOS-like logic scheme, we propose a crossbar-compatible memristive ratioed logic style which is tolerant to device variability and does not affect device endurance as computations do not involve conditional switching of memristors. Using the Cadence Virtuoso suite, we compare this logic scheme with MAGIC and CNIMP approaches, focusing on the universal NOR gate and more complex logic functions.

QDI Constant-Time Counters

Counters are a generally useful circuit that appear in many contexts. Because of this, the design space for clocked counters has been widely explored. However, the same cannot be said for robust clockless counters. To resolve this, we designed an array of constant response time counters using the most robust clockless logic family, quasi-delay-insensitive (QDI) circuits. We compare our designs to their closest QDI counterparts from the literature, showing significant improvements in design quality metrics including transistor count, energy per operation, frequency, and latency in a 28-nm process. We also compare our designs against prototypical synchronous counters generated by commercial logic synthesis tools.

Scalable energy-efficient magnetoelectric spin-orbit logic.

Since the early 1980s, most electronics have relied on the use of complementary metal-oxide-semiconductor (CMOS) transistors. However, the principles of CMOS operation, involving a switchable semiconductor conductance controlled by an insulating gate, have remained largely unchanged, even as transistors are miniaturized to sizes of 10 nanometres. We investigatedwhatdimensionally scalable logic technology beyond CMOS could provide improvements in efficiency and performance for von Neumann architectures and enable growth in emergingcomputing such as artifical intelligence. Such acomputing technology needs to allow progressive miniaturization, reduce switching energy, improve device interconnection and provide a complete logic and memory family. Here we propose a scalable spintronic logic device that operates via spin-orbit transduction (the coupling of an electron's angular momentum with its linear momentum) combined with magnetoelectric switching. The device uses advanced quantum materials, especially correlated oxides and topological states of matter, for collective switching and detection. We describe progress in magnetoelectric switching and spin-orbit detection of state, and show that in comparison with CMOS technology our device has superior switching energy (by a factor of 10 to 30), lower switching voltage (by a factor of 5) and enhanced logic density (by a factor of 5). In addition, its non-volatility enables ultralow standby power, which is critical to modern computing. The properties of our device indicate that the proposed technology could enable the development of multi-generational computing.

Performance Investigation of VCSEL-Based Voltage Probe and Its Applications to HPEM Effects Diagnosis of Embedded Systems

The achievable performances of bias-free vertical-cavity surface-emitting laser (VCSEL)-based voltage probe for high-power electromagnetic (HPEM) effects diagnosis of embedded systems are investigated. The minimum driving current needed by VCSEL is calculated to design the probes with high input impedance and high applicable data bit rate (BR) simultaneously. The VCSEL-based probes for 5 V/3.3 V logic family ICs are designed with a kind of 850-nm VCSEL and a family of high-frequency chip resistors. Measurement results show that the VCSEL-based voltage probe's input impedance can maintain higher than 1 kΩ until 300 MHz. The bit error ratio (BER) test shows that the voltage probe is applicable for monitoring digital signals with BR below 280 Mb/s, while the monitoring BER is better than 1E–6 for BR below 200 Mb/s. The processes of disturbance and breakdown effects induced to a minisized drone circuit are successfully captured by the voltage probe in a pulse injection test, demonstrating the compact and fiber output voltage probe's potential value in diagnosing embedded system's HPEM effects in system-level test.

Nonabelian magnonics in antiferromagnets

We present a semiclassical formalism for antiferromagnetic (AFM) magnonics which promotes the central ingredient of spin wave chirality, encoded in a quantity called magnonic isospin, to a first-class citizen of the theory. We use this formalism to unify results of interest from the field under a single chirality-centric formulation. Our main result is that the isospin is governed by unitary time evolution, through a Hamiltonian projected down from the full spin wave dynamics. Because isospin is SU(2)-valued, its dynamics on the Bloch sphere are precisely rotations - which, in general, do not commute. Consequently, the induced group of operations on AFM spin waves is nonabelian. This is a paradigmatic departure from ferromagnetic magnonics, which operates purely within the abelian group generated by spin wave phase and amplitude. Our investigation of this nonabelian magnonics in AFM insulators focuses on studying several simple gate operations, and offering in broad strokes a program of study for interesting new logic families in antiferromagnetic spin wave systems

Novel Cascadable Magnetic Majority Gates for Implementing Comprehensive Logic Functions

In the quest for novel, scalable and energy-efficient computing technologies, spin-based logic devices are being extensively explored due to their potential for nonvolatility, small cell area, and low operational power. Spin torque majority gate (STMG) is one of the most promising options for beyond CMOS nonvolatile logic circuits for normally-off computing. However, significant problems arose with cascade-ability, signal nonreciprocity, and complicated circuit configurations based on STMG. In this paper, a novel magnetic majority gate (MMG) logic has been proposed, utilizing both spin transfer torque and spin–orbit torque effects. A logic family including and/nand and or/nor functions can be achieved with an easy configuration and under a stable operation. Communication between logic units is realized by spin current injection through a nonferromagnetic metal wire to ensure its cascade-ability and nonreciprocity to design multiple logic-depth circuits. With all of these advantages, the proposed cascadable MMGs can be utilized to design logic functions such as the BUFFER/ NOT, XOR/ XNOR, and complicated logic gates, which pave the pathway for designing robust and comprehensive logic circuits using full spintronic devices.

A Family of Neighborhood Contingency Logics

This article proposes the axiomatizations of contingency logics of various natural classes of neighborhood frames. In particular, by defining a suitable canonical neighborhood function, we give sound and complete axiomatizations of monotone contingency logic and regular contingency logic, thereby answering two open questions raised by Bakhtiari, van Ditmarsch, and Hansen. The canonical function is inspired by a function proposed by Kuhn in 1995. We show that Kuhn’s function is actually equal to a related function originally given by Humberstone.

Propositional Epistemic Logics with Quantification Over Agents of Knowledge (An Alternative Approach)

In the previous paper with a similar title (see Shtakser in Stud Log 106(2):311–344, 2018), we presented a family of propositional epistemic logics whose languages are extended by two ingredients: (a) by quantification over modal (epistemic) operators or over agents of knowledge and (b) by predicate symbols that take modal (epistemic) operators (or agents) as arguments. We denoted this family by $${\mathcal {P}\mathcal {E}\mathcal {L}}_{(QK)}$$ . The family $${\mathcal {P}\mathcal {E}\mathcal {L}}_{(QK)}$$ is defined on the basis of a decidable higher-order generalization of the loosely guarded fragment (HO-LGF) of first-order logic. And since HO-LGF is decidable, we obtain the decidability of logics of $${\mathcal {P}\mathcal {E}\mathcal {L}}_{(QK)}$$ . In this paper we construct an alternative family of decidable propositional epistemic logics whose languages include ingredients (a) and (b). Denote this family by $${\mathcal {P}\mathcal {E}\mathcal {L}}^{alt}_{(QK)}$$ . Now we will use another decidable fragment of first-order logic: the two variable fragment of first-order logic with two equivalence relations (FO $$^2$$ +2E) [the decidability of FO $$^2$$ +2E was proved in Kieronski and Otto (J Symb Log 77(3):729–765, 2012)]. The families $${\mathcal {P}\mathcal {E}\mathcal {L}}^{alt}_{(QK)}$$ and $${\mathcal {P}\mathcal {E}\mathcal {L}}_{(QK)}$$ differ in the expressive power. In particular, we exhibit classes of epistemic sentences considered in works on first-order modal logic demonstrating this difference.

Low Power and Low Complexity Flip-Flop Design using MIFGMOS

Sequential logic is essential in many applications as data processing for speech recognition in cochlear implants. In this paper, a family of latches based on floating-gate MOS (FGMOS) transistors is presented. This family takes advantage on the fact that FGMOS logics process data using mostly passive devices, achieving small area and low-power, requirements of modern electronics. Post-layout SPICE simulations from an ON-Semiconductors 0.5 µm CMOS process technology shows improvements over conventional CMOS logic families, making FGMOS latches ideal for low-power applications.

Dual-Interlocked Logic for Single-Event Transient Mitigation

A combinational logic family, termed dual-interlocked logic (DIL), designed for single-event transient (SET) mitigation has been fabricated at a 16nm/14nm bulk FinFET technology generation and irradiated with heavy ions. Through both simulation and heavy-ion irradiation, DIL is shown to be robust to both single- and dual-node strikes. Results are compared to cascode voltage switch and standard logic to show the effectiveness of the logic family in mitigating SETs at the gate level. Three exemplar radiation-hardened-by-design synchronous systems using DIL, spatial triple modular redundancy (TMR), and temporal TMR are compared across area, power, delay, and hardness relative to an unhardened baseline system. The system utilizing DIL exhibits desirable tradeoffs compared to spatial and temporal TMRs.

Implementation of all‐optical Pauli‐Y gate by the integrated phase and polarisation encoding

Pauli-Y type of quantum gate is a significant name in the logic family of quantum gates, as this gate deals with complex qubits. It has many significant applications in quantum computing. In this study, the authors propose a new method of generation of Pauli-Y gate by the proper uses of optical polarisation encoding and phase encoding jointly. This quantum gate can be implemented by dibit and tribit mechanisms instead of single qubit system, where tribit-based system deals with the high degree of error sensitivity.

Modular Termination Verification of Single-Threaded and Multithreaded Programs

We propose an approach for the modular specification and verification of total correctness properties of object-oriented programs. The core of our approach is a specification style that prescribes a way to assign a level expression to each method such that each callee’s level is below the caller’s, even in the presence of dynamic binding. The specification style yields specifications that properly hide implementation details. The main idea is to use multisets of method names as levels, and to associate with each object levels that abstractly reflect the way the object is built from other objects. A method’s level is then defined in terms of the method’s own name and the levels associated with the objects passed as arguments. We first present the specification style in the context of programs that do not modify object fields. We then combine it with separation logic and abstract predicate families to obtain an approach for programs with heap mutation. In a third step, we address concurrency, by incorporating an existing approach for verifying deadlock freedom of channels and locks. Our main contribution here is to achieve information hiding by using the proposed termination levels for lock ordering as well. Also, we introduce call permissions to enable elegant verification of termination of programs where threads cause work in other threads, such as in thread pools or fine-grained concurrent algorithms involving compare-and-swap loops. We explain how our approach can be used also to verify the liveness of nonterminating programs.

Relevant Logics Obeying Component Homogeneity

This paper discusses three relevant logics (S*fde , dS*fde , crossS*fde) that obey Component Homogeneity - a principle that Goddard and Routley introduce in their project of a logic of significance. The paper establishes two main results. First, it establishes a general characterization result for two families of logic that obey Component Homogeneity - that is, we provide a set of necessary and sufficient conditions for their consequence relations. From this, we derive characterization results for S*fde , dS*fde , crossS*fde. Second, the paper establishes complete sequent calculi for S*fde , dS*fde , crossS*fde. Among the other accomplishments of the paper, we generalize the semantics from Bochvar, Hallden, Deutsch and Daniels, we provide a general recipe to define (a given family of) containment logics, we explore the single-premise/single-conclusion fragment of S*fde , dS*fde , crossS*fde and the connections between crossS*fde and the logic Eq of equality by Epstein. Also, we present S*fde as a relevant logic of meaninglessness that follows the main philosophical tenets of Goddard and Routley, and we briefly examine three further systems that are closely related to our main logics. Finally, we discuss Routley's criticism to containment logic in light of our results, and overview some open issues.

A fW- and kHz-Class Feedforward Leakage Self-Suppression Logic Requiring No External Sleep Signal to Enter the Leakage Suppression Mode

In this letter, we present a novel logic family for nanowatt and subnanowatt always-on circuits. This logic family achieves the ultralow leakage of 5 fW per gate without requiring external sleep control signals to put the circuits in the leakage suppression mode while addressing the switching speed problem of such ultralow leakage logic families. It achieves the fan-out-of-4 delay of 10.2 $\mu \text{s}$ , marking an improvement of $148\times $ over the state-of-the-art. With the proposed logic family, we prototyped a finite impulse response filter for physical signal sensing systems, in which sampled signals are often sparse (predominantly constant or slowly changing) and their frequency varies with time in a burst fashion. During the sparse period, the filter consumes only 109 pW by autonomously suppressing leakage. It can still process signals whose bandwidth can be as high as half of the filter’s maximum operating frequency, 1.03 kHz. The proposed logic improves leakage-delay-product by $200 \times $ over the prior art.