Linear Modulation Range Research Articles

Conditional Sixth-Harmonic Injection to Improve the Linear Modulation Range of Three-Phase Voltage-Source Converters

Conditional Sixth-Harmonic Injection to Improve the Linear Modulation Range of Three-Phase Voltage-Source Converters

An SVPWM Strategy With Extended Linear Modulation Range for Dual Three-Phase Machine Drives Under Unbalanced Power Sharing Conditions

An SVPWM Strategy With Extended Linear Modulation Range for Dual Three-Phase Machine Drives Under Unbalanced Power Sharing Conditions

A Reduced Switch Count Five Level Inverter With Extended Linear Modulation Range Up to Full Base Speed

A Reduced Switch Count Five Level Inverter With Extended Linear Modulation Range Up to Full Base Speed

A Single DC Source Multilevel Inverter with Extended Linear Modulation Range to the Full Base Speed and Predictive Capacitor Control for Induction Machine Drives

A Single DC Source Multilevel Inverter with Extended Linear Modulation Range to the Full Base Speed and Predictive Capacitor Control for Induction Machine Drives

A Multilevel Inverter with Increased Linear Modulation Range For Electric Transportation Applications

A Multilevel Inverter with Increased Linear Modulation Range For Electric Transportation Applications

Improved Zero-Sequence Current Hysteresis Control-Based Space Vector Modulation for Open-End Winding PMSM Drives With Common DC Bus

Through the zero-sequence current (ZSC) hysteresis controller, the existing ZSC hysteresis control-based space vector modulation (SVM) strategy can provide a satisfactory ZSC suppression effect and greatly reduce the complexity for the open-end winding permanent magnet synchronous machine (OW-PMSM) drive with common dc bus. However, the corresponding linear modulation range is reduced by 12.7% compared with the middle hexagon space vector modulation (MH-SVM) for the OW-PMSM drive. To this end, this letter improves the linear modulation range of the existing strategy. The candidate voltage vectors for each sector are re-selected, and three active voltage vectors will be employed in the extended feasible region. While ensuring the ZSC hysteresis control, the linear modulation range of the proposed strategy is the same as the MH-SVM. At last, experimental results verify the feasibility and effectiveness of the proposed strategy. The proposed strategy can suppress the ZSC effectively, and the corresponding maximum speed is the same as the counterpart of the MH-SVM.

Rethinking Linear Modulation Range of Modular Multilevel Converters

The linear modulation problem of modular multilevel converter (MMC) is considerably complicated by capacitor voltage ripples (CVRs) and circulating current suppression control (CCSC). This study examines the linear modulation range of MMC and its influence on parameter design and operating characteristics, taking into account the CVR effect and CCSC. The deviation between the actual voltage output and the reference is revealed and analyzed, and the analytical expression of this deviation is determined. The effects of CCSC on linear modulation are also revealed. Based on the study, a set of equations are proposed to determine the exact reference wave while accounting for the CVR effect and CCSC and precisely assess linear modulation. Subsequently, the linear modulation range of MMC, which is defined as the maximum selectable valve-side voltage that can satisfy whole operating region linear modulation (WOR-LM) in this study, can be exactly determined. Furthermore, how the CVR effect and CCSC influence the linear modulation range, parameter design, and operating characteristics are analyzed using case studies. The proposed theory and method are also verified through simulation and experimental results.

A Generalized Multilevel Inverter With Extended Linear Modulation Range and Instantaneously Balanced DC-Link Series Capacitors for an Induction Motor Drive

The voltage drift control of series-connected capacitors across a single dc-link is the major challenge for a multineutral point-clamped (NPC) converter. This drifting is caused due to uneven currents drawn from the neutral points (NPs) during the PWM operation. This work presents the working principle of instantaneous voltage control of “ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$n$ </tex-math></inline-formula> ” dc-link series-connected capacitors for an induction machine load. The mechanism of instantaneous voltage balancing is realized by ensuring zero instantaneous currents at each dc-link NP. To get zero instant currents at a dc-link NP branch, the phase terminals tapping on the dc-link are manipulated with the help of cascaded hybrid bridges (CHBs). Charge balancing of CHB capacitors is also taken care of by proper utilization of pole voltage redundancies. The detailed results are presented for a small-scaled inverter (nine-level) with three NPs (four dc-link capacitors). The simulation and experimental results reflect the capability and limitations of such inverters. The results are presented at all modulation indexes operated under low-power-factor (LPF) and high-power-factor (HPF) load conditions. It is found that the linear modulation range (LMR) can be increased to full base speed even for an HPF load.

Harmonic Current Control of OW-PMSM for Low-Voltage Traction by Nonlinear Disturbance Rejection With Improved Modulation Scheme

The open-winding permanent magnet synchronous motor (OW-PMSM) has been developed, mostly potential for low-voltage traction in electric vehicles. Yet, both the disturbance from vehicle system under driving and the motor with low-reactance (LR) feature expose the limits of traditional controllers that are prone to great current harmonics. Therefore, the current control for LR OW-PMSM becomes challenging. The main objective of this research is to provide a current harmonic control strategy for LR OW-PMSM by the nonlinear lumped disturbance observer (NLDO) combined with improved space vector modulation (SVM) scheme. The existence of nonlinear, unknown, unmodeled factors has been confirmed by current measurement and harmonic analysis in full operation range, and thus is considered in proposed controllers. The NLDO is designed for all the three axes under the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dq</i> 0 frame. The SVM algorithm is adjusted to two switching patterns in order to get widened linear voltage modulation range. In addition, in the 3-D voltage space is the possible modulation area investigated. Ultimately, the target LR OW-PMSM has been designed, prototyped, and tested. The proposed NLDO, juxtaposed with ordinary PI and deadbeat controllers, reduces current harmonics on both the motor and inverter sides, possesses high robustness, and is practical for LR motors, according to experimental results.

A Hybrid Seven-Level Dual-Inverter Scheme With Reduced Switch Count and Increased Linear Modulation Range

This work presents a hybrid seven-level dual inverter scheme with increased linear modulation range. The hybrid inverter structure is formed by supplying the load from primary side by using a cascaded structure of a two-level inverter and H-bridge (HB) and secondary side of the load is supplied by a floating-capacitor-fed two-level inverter. The combination of primary two-level space vector structure (SVS) with secondary two-level SVS and primary three-level SVS of HB form a seven-level SVS that can further be extended to an eight-level hexagonal SVS. This structure then reduced to a 12-sided eight-level SVS to avoid exceeding motor phase voltage rating. Subsequently by using this eight-level SVS in an unique pulsewidth modulation mode, the proposed topology can increase the modulation range linearly from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$0.577V_{\text{dc}}$</tex-math></inline-formula> to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$0.637V_{\text{dc}}$</tex-math></inline-formula> peak phase fundamental voltage for any load power factor (pf), where dc-link voltage is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$V_{\text{dc}}$</tex-math></inline-formula> . An 11 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\%$</tex-math></inline-formula> increase in modulation range ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$0.637V_{\text{dc}}/0.577V_{\text{dc}}$</tex-math></inline-formula> ) is possible devoid of lower order harmonics (predominantly <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$5{\text{th}}$</tex-math></inline-formula> , <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$7{\text{th}}$</tex-math></inline-formula> , <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$11{\text{th}}$</tex-math></inline-formula> , <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$13{\text{th}}$</tex-math></inline-formula> , etc.) in phase voltage for unity pf load in comparison to the conventional six-step operation of two-level and multilevel hexagonal SVS. To balance HB capacitors voltages in this work, a concept of indirect space vector redundancy is used. The efficacy of the proposed inverter scheme is verified through various experimental results at different steady-state and transient conditions.

A novel hybrid discontinuous PWM algorithm for 3L-NPC inverter

Wider linear modulation range, less switching loss and simplicity are the goals pursued by various modulation methods of multilevel inverters. This paper proposes a new hybrid discontinuous pulse width modulation (HDPWM) strategy for 3L-NPC inverter that can achieve the above goals to a certain extent. According to the position of the reference voltage vector and the actual situation of the neutral point voltage, different control modes and clamping types are selected. The neutral point voltage is controlled by DPWM strategy, which cannot only greatly reduce the switch loss, but also maintain the balance of the neutral point voltage and expand the linear modulation range. The implementation of the algorithm combines the advantages of carrier-based PWM (CBPWM) and space vector PWM (SVPWM). There is no need to select the nearest three vectors (NTV) and calculate their dwell time. Only the reference voltage needs to be modified according to the control requirements, and then by comparing the modified reference voltage with the carrier, the driver pulse required by the switching devices can be generated. Compared with the existing PWM methods, it is more simple and easy to implement. Experimental results verify the validity of the method.

A Novel Space Vector PWM Technique With Duty Cycle Optimization Through Zero Vectors for Dual Three-Phase PMSM

In this paper, a novel space vector pulse width modulation (SVPWM) technique with duty cycle optimization through zero vectors for dual three-phase (3-ph) permanent magnet synchronous machines (PMSMs) is proposed. Dual 3-ph PMSMs can be optimally controlled in vector space decomposition, which allows controls of the fundamental component and main low-frequency harmonics separately in two orthogonal subspaces, i.e., αβ and xy subspaces. However, the space voltage vector modulations of voltage references in two subspaces are not independent, because each voltage vector possesses its unique and fixed spatial location in two subspaces. Therefore, many SVPWM techniques intend to extend the modulation capability by designing the voltage vector selection principle, but the duty cycle saturation determines the limit of phase voltage regardless of the voltage vector selection principle. Therefore, a simple SVPWM technique with duty cycle optimization by adjusting dwell times of zero vectors is developed to offer a reasonable modulation capability with reduced switching frequency and no complex voltage vector selection principle. The linear modulation range is explained as well. Finally, the experimental results validate the performance of the proposed SVPWM technique through voltage injection and closed-loop current control.

A Ten-Level Inverter Fed Drive Scheme with Extended Linear Modulation Range

In this work, a ten-level inverter scheme is presented to extend the linear modulation range (LMR) by using a unique space vector pulsewidth modulation (SVPWM) technique, such that no lower order harmonics (such as 5th, 7th, 11th, and 13th, etc.) are present in the phase voltage as compared to six-step mode operation. The proposed scheme can increase the peak phase fundamental voltage of the inverter from 0.577 to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$0.637 V_{dc}$</tex-math></inline-formula> (maximum possible peak phase fundamental voltage of a conventional hexagonal space vector structure (SVS) voltage source inverters while operating in six-step mode), irrespective of the load power factor (p.f), where <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$V_{dc}$</tex-math></inline-formula> is the dc link voltage of the inverter. The ten-level inverter structure is formed using a two-level inverter and an H-bridge (HB) in cascade from one end and a floating capacitor-based two-level inverter cascaded with an HB from the other end to drive an open-end winding induction motor (OEWIM). All the HB capacitor voltages are balanced by using space vector redundancy. The claim of balancing the capacitor voltages throughout the whole modulation range is verified experimentally in this article. Experimental results at different steady-state and transient conditions are shown to validate the proposed inverter scheme’s efficacy in increasing the LMR.

Clamping Modulation Scheme for Low-Speed Operation of Three-Level Inverter Fed Induction Motor Drive With Reduced CMV

This article introduces a family of carrier-based pulse width modulation (PWM) schemes for three-level (3 L) inverter fed motor drive for low-speed operation. The proposed PWM in dual-inverter topology (DIT) simultaneously clamps two phases of each inverter throughout the fundamental cycle, which reduces the switching transition in the pole voltage and common-mode voltage (CMV). Four PWM variants in the family (i.e., PWM-1–PWM-4) are discussed and compared with conventional discontinuous PWM schemes. A mapping of the gating pulse is derived to extend the proposed PWM to a classical 3 L inverter fed star-connected motor drive. The gating pulses are generated using triangular carrier comparison with synchronous sampling. The steady-state and dynamic performances of PWM are validated both in DIT fed open-end winding induction motor (IM) drive and neutral point clamped (NPC) inverter fed star-connected IM drive. It is observed that the proposed PWM gives inherent capacitor voltage balance in the NPC topology. PWM-1 has a higher linear modulation range than conventional zero clamp PWM and leads to reduced CMV in the NPC topology. PWM-2 and PWM-3 give reduced CMV in DIT. PWM-4 has fault tolerance to single-phase open-switch and short-switch failure in DIT.

Soft-switching inverter investigation for three-phase IM drive as wind turbine emulator design

Thanks to their high reliability, minimum maintenance and reduced cost, induction motors (IM) are commonly used in industry applications especially in renewable energy field. In this paper, a three-phase IM drive based on soft-switching structure is investigated for wind profile emulation. A specific space vector modulation (SVM) for the four-switch three-phase inverter (FSTPI) is applied to select the appropriate three vectors which synthesize the desired output voltage. Although this technique seems to be complicated in terms of hardware implementation since no zero vector is used and only three active vectors are considered, it has less total harmonic distortion, larger linear modulation range and better DC bus use. The proposed approach based on compensation, which ensures a feasible alternative for low-cost motor drives, fed the IM to react effectively as a wind turbine emulator in research laboratory by controlling the speed waveform. Software and hardware results show that the system has a good static and dynamic performance. The presented curves demonstrate the control scheme accuracy for trajectory tracking under sudden load variation.

A Fault-Tolerant 24-Sided Voltage Space Vector Structure for Open-End Winding Induction Motor Drive

This article proposes a method of generating 24-sided polygonal voltage space vector structure composed of 24 real active vectors and a zero vector. Each active vector is a real vector in contrast to switched average vectors in literature. Generation of real 24-sided vectors minimizes switching losses and improves quality of phase voltage compared to switched averaged vectors technique. An important feature of the presented scheme is elimination of lower order harmonics up to 19th order from motor phase voltage throughout the modulation range that gives reduction in torque pulsation and near sinusoidal phase current. The proposed scheme extends the linear modulation range till 99.42 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\%$</tex-math></inline-formula> . Open-end winding induction motor is fed with primary and secondary inverters from either ends. Primary and secondary inverters are implemented by cascading two-level inverters. DC sources for both the inverters are realized using a simple star-delta transformer combination. The proposed concepts are verified with laboratory prototype and the respective results during the steady-state, transient, and fault scenario are presented. The supporting loss analysis and harmonic performance of the proposed drive is performed with existing topologies.

A Common-Mode Voltage Suppression Strategy Based on Double Zero-Sequence Injection PWM for Two-Level Six-Phase VSIs

A common-mode voltage (CMV) suppression strategy, namely double zero-sequence injection common-mode voltage (DZICMV), is proposed in this paper for an asymmetrical six-phase induction motor fed by two-level dual three-phase voltage source inverters (VSIs). In this strategy, the sinusoidal waveforms injected by double zero-sequence signals are employed as modulation signals, and two opposite triangular waveforms are used as carriers. The fundamental period is divided into 24 sectors. In each sector, the carrier used by the medium amplitude phase is distinct from the carriers used by the other two phases in each set of three-phase windings. Using this method, the zero vectors (000) and (111) in each set of three-phase windings can be eliminated, and the peak values of sub-CMV and total CMV can be reduced from ±Udc/2 to ±Udc/6. The experiment results show that the root mean square (RMS) value of common-mode leakage current in DZICMV can be reduced by 51.83% compared with the double zero-sequence injection PWM (DZIPWM) strategy. It is also found in the other four existing benchmark CMV suppression strategies that the peak values of sub-CMV therein are nearly all ±Udc/2, and only in the low linear modulation region could one of these strategies suppress sub-CMV peak values to ±Udc/6. However, the proposed DZICMV can suppress the sub-CMV peak values to ±Udc/6 in the whole linear modulation range. Moreover, the maximum linear modulation index of the DZICMV is 1.15, which is larger than that of the four benchmark strategies, whose maximum modulation index is 1.

A NOVEL MULTILEVEL INVERTER’S DESIGN AND IMPLEMENTATION BASED ON PHOTOVOLTAIC SYSTEMS

Inverter and rectifier controllers frequently employ the space vector pulse width modulation (SVPWM) approach. The space vector pulse width modulation is more suitable for digital implementation than sinusoidal pulse width modulation (SPWM) and can enhance the achievable maximum output voltage, with maximum line voltage nearing 70.7 % of the DC link voltage (compared to 61.2 % for SPWM) in the linear modulation range. It can also achieve a lower voltage total harmonic distortion factor. In this work, we apply these two methods to photovoltaic systems based on technical dependence MPPT INC to improve the output voltage of the photovoltaic panel.

Modulation Restraint Analysis of Space Vector PWM for Dual Three-Phase Machines Under Vector Space Decomposition

For dual three-phase machines, vector space decomposition allows the control of fundamental and main harmonic components in αβ and xy subspaces, respectively. However, the modulation of voltage references in the two subspaces using the space vector pulsewidth modulation (SVPWM) is not independent but coupled. In that, voltage references of two subspaces cannot be modulated simultaneously beyond the modulation restraints, thereby distorting the voltage regulation and causing harmonics or even system misbehavior. Meanwhile, the fundamental voltage in αβ subspace responsible for electromagnetic torque generation should be prioritized and secured. Thus, this article proposes a systematic analysis of modulation restraints of three representative SVPWM techniques, i.e., the linear modulation range of xy subspace under an assured modulation index of the fundamental voltage. Voltage references of xy subspace within this range can be modulated successfully without affecting the assured modulation index and the margin left for harmonic control in xy subspace is then acknowledged. This can be used to limit the output of current controllers not to exceed the voltage modulation restraint, thereby avoiding the modulation failure. Finally, the experimental results validate the linear modulation range and demonstrate the modulation behaviors within and out of the linear modulation range.

Composite Vector Model Predictive Control With Time-Varying Control Period for PMSM Drives

In this article, a composite vector model predictive control (MPC) with a time-varying control period for the permanent magnet synchronous motor (PMSM) drives is proposed. First, the conventional vector selection modes in the MPC method are analyzed. Then, a novel selection mode that selects two nonzero-voltage vectors as optimal voltage vector and has a time-varying control period is developed. Different from the conventional methods, this proposed method can adjust the control period to adapt to the reference voltage vector that is outside the linear modulation range and improve the steady-state control performance. Compared with the conventional three-vector method, this method has the advantages of reducing the switching frequency and suppressing the common-mode voltage due to the reduction use of the zero-voltage vector. Finally, experimental comparison results of different methods validate the effectiveness of the proposed method.