Large-signal Linearity Research Articles

Impact of Device Layout on Thermal Parameters and RF Performance of 90-nm SiGe HBTs

The present work investigates the impact of transistor layout on both the RF and thermal performance of 90-nm SiGe heterojunction bipolar transistors (HBTs). The resulting performance shows only slight degradation in small-signal RF figures-of-merit, while large-signal RF figures-of-merit relevant to power amplifiers (PAs) are improved. Thermal resistance and capacitance were extracted for five different SiGe HBT layouts with the same total emitter area. Additionally, a favorable trade-off exists between RF performance figures-of-merit and thermal parameters; namely, the thermal time constant can be reduced by up to 37% with optimal layout, with only slight degradation (up to 8%) in RF performance. These optimal device layout variations can help circuit designers mitigate thermal memory effects at the device level, thereby improving the overall large-signal linearity of PAs.

A 7–9 GHz I/Q Up-Conversion Mixer Employing a Linear Voltage-to-Current Converting Baseband Input Stage for 5G New Radio Cellular Applications

This work presents a 7–9[Formula: see text]GHz in-phase/quadrature (I/Q) direct up-conversion mixer employing a linear voltage-to-current converting baseband input stage for 5G new radio frequency range 2 cellular applications. The proposed baseband stage improves both the large-signal handling capability and small-signal linearity at the input stage of the mixer. The designed double-balanced I/Q up-conversion mixer, which is based on Gilbert-cell mixer, consists of a voltage-to-current converting input stage, switching stages, and an RLC tank. Simulated in a 40-nm CMOS process, the up-conversion mixer achieves a conversion gain of 5[Formula: see text]dB, input-referred third-order intercept point of 9.6[Formula: see text]dBm, and input 1-dB gain compression point of –0.8[Formula: see text]dBm. It draws a DC bias current of 15.8[Formula: see text]mA from a nominal supply voltage of 1.1[Formula: see text]V, and the active area is 0.129[Formula: see text]mm2.

Large-Signal Linearity and High-Frequency Noise of Passivated AlGaN/GaN High-Electron Mobility Transistors.

This study proposes AlGaN/GaN/silicon high-electron mobility transistors (HEMTs) grown by a metallorganic chemical vapor deposition (MOCVD) system. The large-signal linearity and high-frequency noise of HEMTs without and with different passivation layers are compared. The experimental data show that the addition of a TiO2 passivation layer to undoped AlGaN/GaN HEMT’s increases the value of the third-order intercept point (OIP3) by up to 70% at 2.4 GHz. Furthermore, the minimum noise figure (NFmin) of the HEMT with TiO2 passivation is significantly reduced.

A Reconfigurable Hybrid Series/Parallel Doherty Power Amplifier With Antenna VSWR Resilient Performance for MIMO Arrays

Antenna load impedance variations typically cause significant power amplifier (PA) performance degradation, including output power, large-signal linearity, and peak/average PA efficiency, which are especially critical for modern millimeter-wave (mm-Wave) communications with spectrally efficient complex modulations. To address this problem, we propose a reconfigurable hybrid series/parallel Doherty PA with a 90°coupler-based active load modulation network. By reconfiguring the series/parallel Doherty operation modes, the strengths of the Main/Auxiliary PAs, and their relative phase, linear output power (OP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dB</sub> ), as well as peak output power (P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sat</sub> ) and energy efficiency (PAE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">peak</sub> and PAE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dB</sub> ) of the PA can be largely restored under full-span 360° antenna impedance variations. The theoretical analysis and design guidelines are both presented in this article. As a proof of concept, a 39-GHz reconfigurable hybrid series/parallel Doherty PA is fabricated in the Global Foundries 45-nm RF CMOS silicon on insulator (SOI) process with a 2-V PA supply and 1-V driver supply. At 39 GHz, the PA achieves a 33.3% peak power-added efficiency (PAE) at 20.8-dBm P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sat</sub> and 32.2% PAE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dB</sub> at 20.2-dBm OP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dB</sub> at a nominal 50-Ω load. The reconfigured PA demonstrates an 18.5-19.12-dBm OP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dB</sub> with a high PAE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dB</sub> of 20.6%-25.3% at 3:1 antenna voltage standing wave ratio (VSWR) over 360° angles. The PA achieves an rms error vector magnitude (EVM) of -23.6 dB/-22.8 dB/-23.1 dB at an average P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</sub> of 13.8 dBm/12.2 dBm/11.5 dBm with 100 MSym/S/500 MSym/S/1 GSym/S single-carrier 64-quadratic amplitude modulation (QAM) signal, respectively, at a nominal load of 50 Ω. A greater-than 11.2-dBm average P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</sub> is achieved at an rms EVM of -24 dB under a full-span 3:1 antenna VSWR with a 100-MSym/S 64-QAM signal.

A Wideband Differential Linear Low-Noise Transconductance Amplifier With Active-Combiner Feedback in Complementary MGTR Configurations

A wideband differential linear low-noise transconductance amplifier (LNTA) is proposed for SAW-less applications. An active combiner provides a dual-loop feedback for wideband matching with power efficiency. Operating as an auxiliary common source (CS) stage, complementary multi-gated transistor (MGTR) configurations are employed to compensate for the second- and third-order nonlinearity of the main CS stage, improving small-signal linearity. Large-signal linearity is also enhanced due to Class AB configurations. Additionally, the push-pull operation of the main CS stage and the auxiliary CS stage preserves good large-signal input matching performance. Implemented in a 0.18-μm CMOS process, the measured LNTA chip provides a minimum noise figure (NF) of 2.5 dB, and a maximum transconductance value of 76.7 mS from 0.1 to 3.1 GHz. On average, an input 1-dB compression point (IP1 dB) of 2.3 dBm and an input third-order intercept point (IIP3) of 17.8 dBm are obtained, respectively. The blocker NF is 4.0 dB under a 0 dBm blocker injection while the S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sub> <; -10 dB is maintained even with the blocker input of -3.1 dBm. The LNTA core only draws 13.3 mA from a 1.8 V supply.

A +9-dBm Output P1db Active Feedback CMOS Wideband LNA for SAW-Less Receivers

A highly linear complementary source follower (CSF) feedback CMOS wideband LNA is implemented as a part of a highly linear receiver front end resilient to 0-dBm out-of-band blockers. Due to the linear feedback operation of the CSF, the proposed LNA greatly improves large-signal linearity performances compared to the conventional SF feedback LNA. The proposed feedback LNA shows an input P1dB close to 0 dBm while achieving an input reflection coefficient less than -10 dB, an average power gain of 10 dB, and a minimum noise figure of 3 dB. The power consumption is 18 mW at a 2-V supply voltage.

High dynamic range pixel architecture for advanced diagnostic medical x-ray imaging applications

The most widely used architecture in large-area amorphous silicon (a-Si) flat panel imagers is a passive pixel sensor (PPS), which consists of a detector and a readout switch. While the PPS has the advantage of being compact and amenable toward high-resolution imaging, small PPS output signals are swamped by external column charge amplifier and data line thermal noise, which reduce the minimum readable sensor input signal. In contrast to PPS circuits, on-pixel amplifiers in a-Si technology reduce readout noise to levels that can meet even the stringent requirements for low noise digital x-ray fluoroscopy (&amp;lt;1000 noise electrons). However, larger voltages at the pixel input cause the output of the amplified pixel to become nonlinear thus reducing the dynamic range. We reported a hybrid amplified pixel architecture based on a combination of PPS and amplified pixel designs that, in addition to low noise performance, also resulted in large-signal linearity and consequently higher dynamic range [K. S. Karim et al., Proc. SPIE 5368, 657 (2004)]. The additional benefit in large-signal linearity, however, came at the cost of an additional pixel transistor. We present an amplified pixel design that achieves the goals of low noise performance and large-signal linearity without the need for an additional pixel transistor. Theoretical calculations and simulation results for noise indicate the applicability of the amplified a-Si pixel architecture for high dynamic range, medical x-ray imaging applications that require switching between low exposure, real-time fluoroscopy and high-exposure radiography.

AlGaN/GaN polarization-doped field-effect transistor for microwave power applications

We discuss an AlGaN/GaN metal–semiconductor field-effect transistor (MESFET) structure grown without any impurity doping in the channel. A high-mobility polarization-induced bulk channel charge was created by grading the channel region linearly from GaN to Al0.3Ga0.7N over 1000 Å. This polarization-doped FET (PolFET) was fabricated and tested under dc and rf conditions. Current density of 850 mA/mm and transconductance of 93 mS/mm was observed under dc conditions. The 0.7 μm gate length devices had a cutoff frequency, fτ=19 GHz, and maximum oscillation frequency, fmax=46 GHz. We demonstrate that the PolFETs perform better than comparable MESFETs with impurity-doped channels, and are suitable for high power microwave applications. An important advantage of these devices over AlGaN/GaN high electron mobility transistors is that the transconductance versus gate voltage profile can be tailored by compositional grading for better large-signal linearity.

The dual-X current conveyor (DXCCII): a new active device for tunablecontinuous-time filters

In this work, a new active device, namely the dual-X current conveyor is proposedfor linear tunable continuous-time filtering. The proposed device avails tunabilitywith the aid of triode MOSFETs, while keeping large-signal linearity high. Besideslinearity enhancement, the dual-X structure of the active device brings interestingfeatures, which help reduce the required number of active devices and MOSFETresistors in a MOSFET-C continuous-time filter. Also, unlike most MOSFET-Cfilter structures, there does not exist a matching requirement for the utilizedMOSFETs. A CMOS implementation and two application examples (a current modeTow-Thomas biquad and a current-mode sinusoidal oscillator) are suppliedand simulated to reveal the important advantages.

Simplified technique for syllabic companding in log-domain filters

It is shown that when syllabic companding is applied to log-domain filters using dynamic biasing, their large signal linearity can be exploited to eliminate the state variable compensation circuit. Owing to its simplicity, the proposed technique has several advantages over previous approaches.

Synthesis of log-domain filters from first-order building blocks

Log-domain filters are an important class of current-mode circuits having large-signal linearity and increased tuning range over voltage-mode filter circuits of similar complexity. In this paper we describe synthesis of a single-ended, first-order filter circuit from static and dynamic translinear circuit principles, and show how higher-order filters can be easily constructed from the first-order building block. We address additional issues related to low-frequency (audio-frequency) filter design and present results measured from test circuits and a complete 15-channel filterbank system fabricated in 2 μm and 1.2 μm BiCMOS processes.

Large-signal linearity of scaled MOS transistors

The tendency toward linearity between saturated drain current and gate-to-source voltage exhibited by small-dimension MOS transistors is explored from the standpoint of possible exploitation in analog MOS circuits. Nonlinearity is calculated using a simple MOS model which includes the high field dependence of inversion-layer carrier mobility. The nonlinearity for devices with a wide range of channel lengths and gate dielectric thicknesses was measured and is compared to results from the model. Some problems associated with the use of short-channel MOS transistors in analog circuits are discussed.

Predicted large-signal performance improvement by active compensation in microwave IMPATT amplifiers

The letter describes a technique whereby the large-signal linearity of a one-port microwave amplifier can be improved significantly. It uses a technique known as active reactance compensation previously developed to improve the gain-bandwidth behaviour of amplifiers under small-signal conditions.