Abstract
A wideband differential linear low-noise transconductance amplifier (LNTA) is proposed for SAW-less applications. An active combiner provides a dual-loop feedback for wideband matching with power efficiency. Operating as an auxiliary common source (CS) stage, complementary multi-gated transistor (MGTR) configurations are employed to compensate for the second- and third-order nonlinearity of the main CS stage, improving small-signal linearity. Large-signal linearity is also enhanced due to Class AB configurations. Additionally, the push-pull operation of the main CS stage and the auxiliary CS stage preserves good large-signal input matching performance. Implemented in a 0.18-μm CMOS process, the measured LNTA chip provides a minimum noise figure (NF) of 2.5 dB, and a maximum transconductance value of 76.7 mS from 0.1 to 3.1 GHz. On average, an input 1-dB compression point (IP1 dB) of 2.3 dBm and an input third-order intercept point (IIP3) of 17.8 dBm are obtained, respectively. The blocker NF is 4.0 dB under a 0 dBm blocker injection while the S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sub> <; -10 dB is maintained even with the blocker input of -3.1 dBm. The LNTA core only draws 13.3 mA from a 1.8 V supply.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: IEEE Transactions on Circuits and Systems I: Regular Papers
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
