Junction Temperature Distribution Research Articles

Influence of the Uneven Temperature Distribution on the Electrode Warpage of PP IGBTs

The pressure and junction temperature distribution within press-pack insulated gated bipolar transistors had been proven uneven due to the thermomechanical coupling effect caused by electrode warpage. However, the root reason for the electrode warpage remains unclear, and therefore leads to confusion in optimization. In this article, the influence of vertical and lateral temperature difference on the electrode warpage is first separated and analyzed through the proper combination of boundary conditions in finite element simulation. The lateral temperature difference is found to be the main reason for the electrode warpage, which is different from the perception state of the art and provides the possibility to suppress the electrode warpage directly. Furthermore, the role of the lateral temperature difference is analyzed by a simplified model and it is found that the lateral temperature difference could be decreased by only pure thermal design rather than thermomechanical design. The electrode size and pedestal layout are discussed to alleviate the lateral temperature difference of the electrode and the simulation results also show great improvement in pressure and junction temperature distribution. Finally, the junction temperature distribution is measured by the sequential <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE</sub> ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</i> ) method to verify the root reason and also the effectiveness of the improvement.

A Novel Junction Temperature Balance Control Method for Typical Three-Phase Converters Based on a Hybrid Modulation Strategy

Unbalanced junction temperature ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T_j</i> ) distribution of a bridge leg can accelerate the development of aging defects and reduce the lifetime of the converter. Therefore, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T_j</i> balance control (TBC) is important for high reliability operation. Conventional TBC methods based on parameter adjustment cannot avoid reducing the efficiency and the power quality of converters. Other TBC methods can only be used in some switching devices in special packages. In this article, a novel TBC method is proposed based on a hybrid modulation strategy. First, temperature distributions in three space vector pulse width modulation (SVM) methods are analyzed theoretically and verified by experiments. This is the basis for <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T_j</i> balancing. Second, a hybrid modulation strategy is proposed based on the bang-bang control. It can switch from these three SVMs adaptively according to the maximum <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T_j</i> difference. In this way, the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T_j</i> difference of a bridge leg can be controlled to a fixed range. Third, the effectiveness of the proposed TBC method is verified by experiments. The <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T_j</i> difference caused by unbalanced aging can be controlled from over 20 °C to 3 °C. Compared with conventional TBC methods, the proposed method has almost no effect on the efficiency and output power quality of the converter.

Transient 2D Junction Temperature Distribution Measurement by Short Pulse Driving and Gated Integration with Ordinary CCD Camera.

The time resolution of the transient process is usually limited by the minimum exposure time of the high-speed camera. In this work, we proposed a method that can achieve nanosecond temporal resolution with an ordinary CCD camera by driving the LED under test with a periodic short-pulse signal and multiple-cycle superposition to obtain two-dimensional transient junction temperature distribution of the heating process. The temporal resolution is determined by the pulse width of the drive source. In the cooling process, the Boxcar gated integration principle is adopted to complete the two-dimensional transient junction temperature distribution with temporal resolution subject to the minimum exposure time of the CCD camera, i.e., 1 μs in this case. To demonstrate the validity of this method, we measured the two-dimensional transient junction temperature distribution of the blue LEDs according to the principle of thermoreflectance and compared it with the thermal imaging method.

Thermal performance of insulated gate bipolar transistor module using microchannel cooling base plate

• Microchannels were proposed for Insulated gate bipolar transistor module cooling. • The performance of two counter-flow microchannel base plate designs was studied. • Horizontal counter-flow microchannel showed a better thermal–hydraulic performance. • Longitudinal vortex generators enhanced heat transfer of the microchannel cooling. The insulated gate bipolar transistor (IGBT) module cannot meet industrial requirements under high-power density due to the high junction temperature and non-uniform temperature distribution. To overcome these problems, two novel microchannel designs (i.e. longitudinal counter-flow microchannel and horizontal counter-flow microchannel) were proposed for the base plate cooling of the IGBT module, in this study. A heat transfer model was developed to investigate the heat transfer performance, pressure drop, temperature distribution of a full-size IGBT module with the proposed microchannel cooling designs. The results showed that the horizontal counter-flow microchannel design had better heat transfer performance, lower pressure drop, more uniform temperature distribution and higher energy efficiency in comparison to the longitudinal counter-flow microchannel cooling design. To further improve the heat transfer performance, longitudinal vortex generators was applied in the horizontal counter-flow microchannel design. It was found that the Nusselt number of the horizontal counter-flow microchannel with longitudinal vortex generators reached 10.86, which increased by 61% compared with the basic horizontal counter-flow microchannel design.

Sequential V ce(T) Method for the Accurate Measurement of Junction Temperature Distribution Within Press-Pack IGBTs

In this article, a sequential Vce(T) method with separated gate controller is proposed to measure the junction temperature distribution within press-pack insulated gate bipolar transistors (PP IGBTs), which is not possible for traditional temperature measurement methods due to the enclosed structure and external clamping force of the pressure-type package. This proposed method is integrated into a standard dc power cycling test and the steady-state junction temperature distribution is obtained to validate its applicability and effectiveness. The measured junction temperature exhibited a bathtub type distribution within PP IGBTs. The root cause is the deformation of the copper plate, which was also discussed by the finite-element simulation in previous literature. Furthermore, the influence of static characteristic dispersion is excluded by the chip transposition and the thermomechanical coupling effect is confirmed to be the dominant factor of this junction temperature distribution. Finally, the influence of heating current and heating time on junction temperature distribution is also investigated by the proposed method.

A Microscopic Hyperspectral-Based Centroid Wavelength Method for Measuring Two-Dimensional Junction Temperature Distribution of LEDs

In this letter, we propose an experimental method for determining two-dimensional (2D) junction temperature distribution of light-emitting diodes (LEDs) using microscopic hyperspectral-based centroid wavelength. The 2D centroid wavelength matrix is extracted from the hyperspectral data cube as temperature sensitive optical parameters (TSOP), which is linearly calibrated by short pulse voltage signal in order to eliminate the influence of self-heating effect. The 2D junction-temperature distributions of LEDs under working conditions are derived by TSOP matrix. The comparative experiments by micro-thermocouple ( $\mu $ -TC) and IR imaging reveal good coincidence in both averaged temperature and temperature distribution trends.

Influence of Temperature on the Pressure Distribution Within Press Pack IGBTs

Press pack (PP) packaging technology has been applied to insulated-gate bipolar transistors (IGBTs) for high-voltage and high power density applications in recent years. The pressure distribution within PP IGBTs is very important because it affects both the electrical and thermal contact resistances, thermal cycling capability, and short-circuit current rating. Too much pressure will mechanically damage the chip and too little pressure will increase the thermal contact resistance, which eventually leads to chip thermal damage. In this paper, a finite-element multiphysics model cocoupled with an electrical field, thermal field, and mechanical field is proposed to analyze the collector current distribution, pressure distribution, and junction temperature distribution within PP IGBTs. The most important coupling variables, such as electrical and thermal contact resistances, for this cocoupled multiphysics model are calculated or measured by experiment through a single IGBT/fast-recovery diode chip submodule. Based on this multiphysics model, the influence of the high temperature generated by the chip's power dissipation on the pressure distribution within PP IGBTs (in the heating phase) is discussed, and then, compared with the pressure distribution in the clamping phase. The results show that the pressure distribution within PP IGBTs in the heating phase is extremely uneven and different from the value in the clamping phase. Furthermore, the mechanical model and its boundary conditions are verified through the pressure distribution experimental results in the clamping phase, which is measured based on the Fuji prescale film and the clamping test bench. Based on the simulation and experimental results, an optimization of the collector electrode and pedestal is proposed to improve the pressure distribution within PP IGBTs in the heating phase.

Method for predicting junction temperature distribution in a high-power laser diode bar.

A hybrid experimental/numerical method is proposed for predicting the junction temperature distribution in a high-power laser diode (LD) bar with multiple emitters. A commercial water-cooled LD bar with multiple emitters is used to illustrate and validate the proposed method. A unique experimental setup is developed and implemented first to measure the average junction temperatures of the LD bar emitters. After measuring the heat dissipation of the LD bar, the effective heat transfer coefficient of the cooling system is determined inversely from the numerical simulation using the measured average junction temperature and the heat dissipation. The characterized heat dissipation and effective heat transfer coefficient are used to predict the junction temperature distribution over the LD bar numerically under high operating currents. The results are presented in conjunction with the wall-plug efficiency and the center wavelength shift.

Thermal Analysis of High-Power Multichip COB Light-Emitting Diodes With Different Chip Sizes

This paper demonstrates the thermal analysis of high-power light-emitting diodes (LEDs) with various chip sizes, in the same chip-on-board (COB) package and with the same total chip size and input power. The 4-, 9-, 25-, and 100-chip multichip COB LEDs with chip-side lengths of 1500, 1000, 600, and 300 $\mu $ m were used. The simulation results indicate that the maximal junction temperature of the multichip COB LEDs increased as the number of chips in the multichip COB LED decreased. In addition, with the same input power, the difference between the maximal and minimal junction temperatures of the multichip COB LED increased as the number of chips in multichip COB LEDs increased. That is, if the multichip COB LED contains a few number of large chips, the output power of each chip will drop but uniform owing to the high junction temperature and low temperature difference. Oppositely, if the multichip COB LED contains a lot of small chips, the output power of the chips at the corners will be higher than other chips, but the output power of each chip will be nonuniform owing to the nonuniform junction temperature distribution.

Experimental and Numerical Investigation Into the Influence of Chip-on-Film Package on Component Operating Temperature in Natural Convection

The thermal issues of chip-on-film (COF) packages are becoming increasingly important for high-pin-count chips, whose performance is becoming increasingly limited by the maximum power that can be spread without exceeding the maximum junction temperature. This paper conducts an experimental investigation to investigate the relationship between power dissipation and the surface temperature of the thermal chip in COF applications. This paper develops an ANSYS finite-element (FE) model to simulate the junction temperature and temperature distribution within the COF package under various boundary conditions. Based on an effective methodology of equivalent models for thermal conductance, comparing the simulation results with the experimental temperature measurements confirms the validity of the numerical model. This paper uses the proposed model in a $\hbox{2}^{3}$ factorial design process to evaluate the effect of the major components of COF packages. Results show that the thickness of copper lead plays a significant role in efficient thermal power dissipation of the package due to its inherent advantage. Several parametric studies reveal the effects of various configurations of the thermal model and the effects of the voids. This paper also analyzes the thermal resistance at the junction of the package. Results show that the natural convection of the COF package with thermally conductive tape achieves a cooling function that keeps the junction temperature of the COF package under 85 $^{\circ}\hbox{C}$ without using a fan. The validated FE models in this paper have enormous potential to quickly assess the thermal limits of many future COF packages and their variations.

Switching Loss Analysis of 4.5-kV–5.5-kA IGCTs Within a 3L-ANPC Phase Leg Prototype

Three-level active neutral-point-clamped (NPC) (3L-ANPC) voltage-source converters (3L-ANPC-VSCs) enable additional switch states and commutations compared to the three-level NPC voltage-source converters (3L-NPC-VSCs). They are used to overcome one important disadvantage of the 3L-NPC-VSC, the unequal semiconductor loss distribution. With an accurate switching model (obtained directly from the measurements), it is possible to improve the junction temperature distribution among the power devices, increasing the 3L-ANPC-VSC output power and/or increasing the frequency and/or decreasing the derating of the converter. This paper presents the characterization of a 4.5-kV-5.5-kA integrated gate-commutated thyristor (IGCT) within a 3L-ANPC phase leg. A quantitative analysis of the switching losses using 5SHY55L4500 IGCTs and D1961SH45T press-pack diodes for a current range from 1 to 4.5 kA and junction temperatures between 25 ° C and 125 ° C is presented. The 3L-ANPC phase leg performs 32 different commutations. Each commutation exhibits different switching losses, as a result of the different commutation paths and their stray inductances. This switching energy range is presented and quantified. Finally, a simplified switching loss model considering the maximal switching losses in terms of the commutation current and the junction temperature is presented.

A novel electrical measurement method of peak junction temperature based on the excessive thermotaxis effect of low current

It has been a scientific and technological problem in the field of microelectronics for several decades that the electrical method is used to measure the peak junction temperature of power transistors. Based on the excessive thermotaxis effect of low current, a novel electrical measurement method of the peak junction temperature is presented in this paper. The method is called the thermal spectrum analysis method of transistors, simply designated TSA (thermal spectrum analysis method). Unlike the common method which uses a single measuring current, TSA uses multi-step currents to measure temperature-sensitive parameters. Based on the excessive thermotaxis effect of low current and the sub-transistor parallel model, the peak junction temperature and non-uniform property of junction temperature distribution are analyzed successfully.

Estimation and Measurement of Junction Temperatures in a Three-Level Voltage Source Converter

The design of a power converter must guarantee that the operating junction temperatures thetavj of all devices do not exceed their limits under all specified operating conditions. Usually, this is ensured by a simulative or analytical junction temperature estimation based on simple electrical and thermal models and semiconductor datasheet values. This paper discusses the difficulties and quantifies the limitations of this approach on the example of a three-level neutral point clamped voltage source converter (NPC VSC) with insulated gate bipolar transistors. The calculations are compared to the results of direct junction temperature measurements with an infrared camera. The paper also provides the experimental proof for the unequal loss and junction temperature distribution in the three-level NPC VSC

Micro‐EL studying of high power blue LEDs

AbstractThe micro electro‐luminescence (EL) investigation of high‐power blue flip‐chip LEDs at high currents has been performed. The studied distribution of the spectral EL characteristics over the LED emitted area allowed evaluating the current crowding effect and revealed the local overheating of the p‐n junction. The current crowding effect lead to the two times higher local EL intensity. The local p‐n junction temperature distribution was calculated from FWHM map using obtained value a FWHM temperature coefficient. Maximum local junction temperature was by 50 K higher than average value over the LED area. The high local temperature and high local current density can lead to device failure or drastically decreases the LED lifetime. (© 2006 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

Static and dynamic finite element modelling of thermal fatigue effects in insulated gate bipolar transistor modules

The aim of this paper is to demonstrate the use of finite element techniques for modelling thermal fatigue effects in solder layers of insulated gate bipolar transistor (IGBT) – modules used in traction applications. The three-dimensional models presented predict how progressive solder fatigue, affects the static and dynamic thermal performance of such devices. Specifically, in this paper, the analysis of an 800 A–1800 V IGBT module is performed. In the first part, the static analysis is realised. The parameters assessed are thermal resistance, maximum junction temperature and heat flux distribution through the different layers comprising the module construction. In the second part of the paper, transient analyses are performed in order to study the dynamic thermal behaviour of the module. The constructed thermal impedance curves allow for calculation of the device temperature variations with time. Stress parameters, such as temperature excursion and maximal temperature at chip and solder interfaces, are determined. Calibration of all simulation models is achieved by comparison with alternative theoretical calculations and manufacturers’ measured values provided in the data sheet book.

Thermal stability analysis of AlGaAs/GaAs heterojunction bipolar transistors with multiple emitter fingers

A numerical electro-thermal model was developed for AlGaAs/GaAs heterojunction bipolar transistors (HBT's) to describe the base current, gain and output power dependence on junction temperature. The model is applied to microwave HBT devices with multi-emitter fingers. The calculated results of the common-emitter, current-voltage characteristics in the linear active region show a current crush effect due to inherent nonuniform junction temperature, density and gain distribution in the device. The formation of highly localized high temperature regions, i.e., hot spots, occur when the device is operating beyond the current-crush point. This thermally induced instability imposes an upper limit on the power capability of HBT's. The dependence of this effect on various factors is discussed. These factors include the intrinsic parameters such as the base ideality factor, the apparent valence band discontinuity, and the temperature coefficient of the emitter-base turn-on voltage, as well as the extrinsic factors such as the emitter contact specific resistance, the substrate thermal conductivity and the heat source layout. >

Simulation study of peak junction temperature and power limitation of AlGaAs/GaAs HBTs under pulsed and CW operation

The authors have used a 3-D transmission-line matrix (TLM) modeling method to study the junction temperature distribution and power limitation of device geometries with multiple embedded heat sources. Peak values of the junction temperature against the dissipated power density under both pulsed and CW operation are presented for a typical power AlGaAs/GaAs HBT structure. These data should facilitate the rapid determination of junction temperature for a given output power, which is of paramount importance in power device design.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Uniform junction temperature AlGaAs/GaAs power heterojunction bipolar transistors on silicon substrates

AlGaAs/GaAs power heterojunction bipolar transistors on Si substrates exhibiting uniform junction temperature distribution are reported. Owing to a unique device design, the temperature spread across the entire device area is about 1 °C. The device exhibits a common emitter current gain of 20, a maximum collector current of 0.6 A, and a collector base junction breakdown voltage of 25 V.

Reliability engineering

The role of reliability engineering in device development is described and the close connexion between fabrication techniques and failure mechanisms is emphasized. Failure rate and mode are functions of junction temperature distribution which in turn critically depends on junction bias conditions and hence stresses comparable to device application must be employed. Test results are displayed as log normal life distributions which conveniently represent surface controlled parametric changes as well as contact failures. In conclusion, some developmental techniques to improve reliability are described.