Junction Capacitance Research Articles

Multiscale Compact Modelling of UTC-Photodiodes Enabling Monolithic Terahertz Communication Systems Design

Due to the continuous increase in data traffic, it is becoming imperative to develop communication systems capable of meeting the throughput requirements. Monolithic Opto-Electronic Integrated Circuits (OEICs) are ideal candidates to meet these demands. With that in mind, we propose a compact and computationally efficient model for Uni-Traveling Carrier Photodiodes (UTC-PDs) which are a key component of OEICs because of their high bandwidth and RF output power. The developed compact model is compatible with existing SPICE design software, enabling the design of beyond 5G and terahertz (THz) communication circuits and systems. By introducing detailed physical equations describing, in particular, the dark current, the intrinsic series resistance, and the junction capacitance, the model accurately captures the physical characteristics of the UTC-PD. The model parameter extraction follows a scalable extraction methodology derived from that of the bipolar and CMOS technologies. A detailed description of the de-embedding process is presented. Excellent agreement between the compact model and measurements has been achieved, showing model versatility across various technologies and scalability over several geometries.

A New Approach to Designing High-Sensitivity Low-Dimensional Photodetectors

Photodetectors fabricated from low-dimensional materials such as quantum dots, nanowires, and two-dimensional materials show tremendous promise based on reports of very high responsivities. However, it is not generally appreciated that maximizing the internal gain may compromise the detector performance at low light levels, reducing its sensitivity. Here, we show that for most low-dimensional photodetectors with internal gain the sensitivity is determined by the junction capacitance. Thanks to their extremely small junction capacitances and reduced charge screening, low-dimensional materials and devices provide clear advantages over bulk semiconductors in the pursuit of high-sensitivity photodetectors. This mini-review describes and validates a method to estimate the capacitance from external photoresponse measurements, providing a straightforward approach to extract the device sensitivity and benchmark against physical limits. This improved physical understanding can guide the design of low-dimensional photodetectors to effectively leverage their unique advantage and achieve sensitivities that can exceed that of the best existing photodetectors.

High-Performance Exploration of Buried Channel In0.53Ga0.47/InP Stepped Poly Gate MOSFET Using Asymmetric Underlap Gate Spacer

In recent times the double gate In0.53Ga0.47As/InP heterostructure MOSFET offers excellent electrostatic/RF performance in comparison with conventional Si-bulk MOSFET. Drain capacitance of DG-MOSFETs are mostly dominated by overlap capacitance due to the reduction junction capacitance and this can be minimized by inserting an underlap area between the source and drain region. Further, source side underlap contributes substantial deterioration of On current and increased threshold voltage variation. So, to overcome this problem, a high K spacer is introduced in the drain side of the gate region which reduces the parasitic capacitance without hampering the On current. This works investigates the impact of drain side spacer underlap on stepped poly gate In0.53Ga0.47As/InP asymmetric heterostructure (ASSH) double-gate (DG) MOSFET to improve the device performance. In the proposed model the poly gate splits into three steps with an expansion of gate oxide width from the source region to the drain region. So ASSH-DG MOSFET exhibits the exceptional benefits mainly owing to, (a) the reduced oxide thickness at the source, which results in a good electrostatic gate control along the channel, (b) the larger oxide thickness near the drain lowering the gate-to-drain capacitance, henceforth there is an improvement of On resistance in the linear region. The device performance metrics are examined using a 2D TCAD device simulator by considering the underlap length ranging from 0 nm to 8 nm with a step of 2 nm. Simulated results show ASSH-DG MOSFET exhibits a significant improvement of analog /RF parameters as compared to conventional hetero (H)-DG MOSFET.

Novel RF energy harvesting using Rectenna

In this paper an experimental RF energy harvester using rectifying antenna (rectenna) to harvest ambient energy from cellular device operating at 900 MHz GSM band is proposed. The circuit is a combination of antenna and rectifying circuit using Schottky barrier diode for microwave (RF) to DC conversion. The performance results of the rectenna shows radiation efficiency of around 58.81%, gain of 3.9 dB and directivity of 5.972 dBi. The proposed rectenna design can prove to be a low cost device for wireless power transmission and RF energy harvesting. The prototype is fabricated with simulated and measured results in good agreement, having a return loss of 21 dB at frequency of around 885 MHz. The overall efficiency is enhanced by using ISS351-TB-E Schottky diode which is categorized by a low junction capacitance and a low threshold voltage to achieve higher conversion efficiency.

The negative interface capacitance and its anisotropy in magnetic tunnel junctions

The capacitance of magnetic tunnel junctions (MTJs) with the tunneling magnetocapacitance (TMC) effect has drawn lots of attention but there is still a lack of research on the capacitance anisotropy. In this work, a study of the capacitance in MgO-based MTJ is performed. The negative capacitance is observed and indicates the importance of interface capacitance in the MTJ. In further research, the interface capacitance depends on the relative orientation of magnetization in the two ferromagnetic layers (FMs), exhibiting a strong anisotropy. The Debye-Fröhlich model combined with the magnetization dependence of relaxation time is introduced to explain the behavior. Theory and experiment results of the relaxation time as a function of the relative angle of the two FM magnetizations are well fitted. It reveals that the TMC originates from the interface charge accumulation and spin-dependent tunneling. All the results suggest that the interface capacitance with apparent anisotropy plays an essential role in the TMC.

High-speed and large-responsivity synchronous-traveling carrier photodetector.

A synchronous-traveling carrier photodetector (STC-PD) with a thick absorption region and large diameter is presented and investigated for 100 Gbps PAM4 applications. In the STC structure, a suitable electric field is introduced to synchronize the traveling of electrons and holes, which achieves high bandwidth while maintaining large responsivity. The characteristics of STC-PD, including electric field distribution, energy band diagram, responsivity, junction capacitance, and frequency response, have been studied carefully.

Analysis of the subthreshold characteristics in AlGaN/GaN HEMTs with a p-GaN gate

In this letter, we analyze the subthreshold characteristics in p-GaN/AlGaN/GaN high electron mobility transistors (HEMTs) with two different Mg flow, i.e., 300 sccm and 750 sccm. The device with 750 sccm Mg flow shows a high threshold voltage and large subthreshold swing (SS). The frequency dependent C-V measurement is reported in p-GaN/AlGaN/GaN heterostructure, showing an obvious frequency dispersion in the device with a high Mg flow. Furthermore, the equivalent circuit network with considering the series of a Schottky metal/p-GaN junction capacitor (CSchottky) and the AlGaN barrier capacitor (CAlGaN) is proposed to calculate the interface state density (Dit) via the conduction method. Finally, a strong correlation between SS, Dit and Mg flow can be concluded, pointing out that the optimization of Mg out-diffusion in p-GaN is crucial to improve the subthreshold characteristics.

Gate Voltage-Dependence of Junction Capacitance in MOSFETs

The gate–bulk/body voltage ${V}_{\text {gb}}$ -dependent effect of the source or drain–bulk/body junction capacitance ${C}_{j}$ that is originated from the variation in the gate-edge sidewall junction area due to the modulation of the channel depletion depth in the OFF-state region of bulk/PD-SOI MOSFETs is physically revealed. This ${V}_{\text {gb}}$ -dependent ${C}_{j}$ is accurately extracted from the measured S-parameters and newly modeled in the wide off-bias range. The geometry-dependent model and parameter extraction method are proposed to make the new ${C}_{j}$ model applicable in SPICE.

Ferroelectric HfO2-based synaptic devices: recent trends and prospects

Neuro-inspired deep learning algorithms have shown promising futures in artificial intelligence. Despite the remarkable progress in software-based neural networks, the traditional von-Neumann hardware architecture has suffered from limited energy efficiency while facing unprecedented large amounts of data. To meet the performance requirements of neuro-inspired computing, large-scale vector-matrix multiplication is preferred to be performed in situ, namely compute-in-memory. Non-volatile memory devices with different materials have been proposed for weight storage as synaptic devices. Among them, HfO2-based ferroelectric devices have attracted great attention because of their low energy consumption, good complementary-metal-oxide-semiconductor (CMOS) compatibility and multi-bit per cell potential. In this review, recent trends and prospects of the ferroelectric synaptic devices are surveyed. First, we present the three-terminal synaptic devices based on the ferroelectric field effect transistor (FeFET), and discuss the switching physics of the intermediate states, the back-end-of-line integration and the 3D NAND architecture design. Then, we introduce a hybrid precision synapse concept that leverages the volatile charges on the gate capacitor of the FeFET and the non-volatile polarization on the gate dielectric of the FeFET. Lastly, we review two-terminal synaptic devices using the ferroelectric tunnel junction (FTJ) and ferroelectric capacitor (FeCAP). The design margins of the crossbar array with FTJ and FeCAP analyzed.

Electronic Properties and Structure of Boron–Hydrogen Complexes in Crystalline Silicon

The subject of hydrogen–boron interactions in crystalline silicon is revisited with reference to light and elevated temperature‐induced degradation (LeTID) in boron‐doped solar silicon. Ab initio modeling of structure, binding energy, and electronic properties of complexes incorporating a substitutional boron and one or two hydrogen atoms is performed. From the calculations, it is confirmed that a BH pair is electrically inert. It is found that boron can bind two H atoms. The resulting BH2 complex is a donor with a transition level estimated at E c–0.24 eV. Experimentally, the electrically active defects in n‐type Czochralski‐grown Si crystals co‐doped with phosphorus and boron, into which hydrogen is introduced by different methods, are investigated using junction capacitance techniques. In the deep‐level transient spectroscopy (DLTS) spectra of hydrogenated Si:P + B crystals subjected to heat‐treatments at 100 °C under reverse bias, an electron emission signal with an activation energy of ≈0.175 eV is detected. The trap is a donor with electronic properties close to those predicted for boron–dihydrogen. The donor character of BH2 suggests that it can be a very efficient recombination center of minority carriers in B‐doped p‐type Si crystals. A sequence of boron–hydrogen reactions, which can be related to the LeTID effect in Si:B is proposed.

Terahertz Rectennas on Flexible Substrates Based on One-Dimensional Metal–Insulator–Graphene Diodes

Flexible energy harvesting devices fabricated in scalable thin-film processes are important components in the field of wearable electronics and the Internet of Things. We present a flexible rectenna based on a one-dimensional junction metal-insulator-graphene diode, which offers low-noise power detection at terahertz (THz) frequencies. The rectennas are fabricated on a flexible polyimide film in a scalable process by photolithography using graphene grown by chemical vapor deposition. A one-dimensional junction area reduces the junction capacitance and enables operation in the D-band (110 - 170 GHz). The rectenna on polyimide shows a maximum voltage responsivity of 80 V/W at 167 GHz in free space measurements and minimum noise equivalent power of 80 pW/$\sqrt{\text{Hz}}$.

Stretchable and self-healable hydrogel artificial skin.

Hydrogels have emerged as promising materials for the construction of skin-like mechanical sensors. The common design of hydrogel-based artificial skin requires a dielectric sandwiched between two hydrogel layers for capacitive sensing. However, such a planar configuration limits the sensitivity, stretchability and self-healing properties. Here, we report the design of single-layer composite hydrogels with bulk capacitive junctions as mechanical sensors. We engineer dielectric peptide-coated graphene (PCG) to serve as homogenously dispersed electric double layers in hydrogels. Any mechanical motions that alter the microscopic distributions of PCG in the hydrogels can significantly change the overall capacitance. We use peptide self-assembly to render strong yet dynamic interfacial interactions between the hydrogel network and graphene. The resulting hydrogels can be stretched up to 77 times their original length and self-heal in a few minutes. The devices can effectively sense strain and pressure in both air and aqueous environments, providing tremendous opportunities for next-generation iontronics.

Nonlinearity and parameterization of Schottky diodes-based battery-free harmonic transponder for millimeter-wave 5G applications

Deployment of 5G network infrastructure is a timely opportunity for millimeter-sized battery-free sensors. However, millimeter-wave (mmW) devices often suffer from high conversion loss and path loss that are heavily limiting their communication/detection distance, especially for the case of harmonic transponders based on Schottky diodes. A deep and comprehensive parametric understanding of the second-harmonic generation mechanism of Schottky diodes in the mmW 5G bands can help us to identify suitable diodes or guide diode fabrication to reduce transponder conversion loss. This work reveals that both diode nonlinear junction resistance and capacitance contribute to the second-harmonic generation across the mid-band (sub-7 GHz) and high-band (mmW) 5G frequency bands. However, the nonlinear junction capacitance dominates the second-harmonic generation in the mmW bands. Without Joule heating during the conversion process, the capacitive nonlinearity is more efficient than the resistive nonlinearity, which means that a Schottky diode with a lower junction capacitance will efficiently reduce its associated conversion loss. The VDI GaAs zero bias diode with a low zero bias nonlinear junction capacitance (19.19 fF) shows superior conversion loss performance, which indicates that it can be employed to enhance the detection distance of battery-free harmonic transponders in the mmW 5G bands.

Phase interference for probing topological fractional charge in a BiSbTeSe2-based Josephson junction array

Fractional charges can be induced by magnetic fluxes at the interface between a topological insulator (TI) and a type-II superconductor due to axion electrodynamics. In a Josephson junction array with a hole in the middle, these electronic states can have phase interference in an applied magnetic field with period, in addition to the 2π interference of the Cooper pairs. Here, we test an experimental configuration for probing the fractional charge and report the observation of phase interference effect in superconducting arrays with a hole in the middle in both Au- and TI-based devices. Our numerical simulations based on resistive shunted capacitive junction model are in good agreement with the experimental results. However, no clear sign of an axion charge-related interference effect was observed. We will discuss possible reasons and perspectives for future experiments.

Capacitive sensor based on GaN honeycomb nanonetwork for ultrafast and low temperature hydrogen gas detection

Passive devices are highly desired for the detection of H2 gas due to its high safeness and low energy consumption. In this study, GaN with honeycomb nanonetwork structure (GaN-HN) epitaxially grown on Si wafer by molecular beam epitaxy technique was utilized for the fabrication of capacitive H2 gas sensors, on which 10 nm thick Pd layer was deposited as the sensing electrode. XRD, SEM, and AFM results show that the cubic phase Pd is uniformly coated on the surface of GaN-HN and maintains an interesting structure of honeycomb nanonetwork. It is found that the response time decreases gradually with the increase of the operating temperature and it reaches a steady value ∼3 s at temperatures higher than 50 °C. Ultrafast response time of 1.3 s towards 1000 ppm H2 was observed for the Pd-GaN/Si capacitive sensor operated at the temperature of 70 °C. The low limit of detection (LOD) is also evaluated by experiment and IUPAC definition, 500 ppb and 440 ppb, respectively. Moreover, the capacitive sensor exhibits ignorable response to CH4, NO2 and common VOCs gases. The long-term stability and humidity effect on H2 gas detection were also studied. Schottky junction capacitance of Pd/GaN might be dominated by the hydrogen dipole layer. The proposed Pd-GaN/Si capacitive sensor investigated here exhibits ultrafast response speed, low operating temperature, high selectivity and stability, making it attractive for applications in timely H2 leakage detection.

TSPEM Parameter Extraction Method and Its Applications in the Modeling of Planar Schottky Diode in THz Band

In this paper, a new method for the parameter extraction of Schottky barrier diode (SBD) is presented to eliminate the influence of parasitic parameters on the intrinsic capacitance-voltage (C-V) characteristics of the Schottky diodes at high frequencies. The method is divided into the de-embedding and parameter extraction, including six auxiliary configurations and, is referred tos as Two-step Six-configuration Parameter Extraction Method (TSPEM). Compared to the traditional junction capacitance extraction method, this method can extract the value of junction capacitance at higher frequencies with higher accuracy. At the same time, compared to the other de-embedding methods, this method shows better performance in de-embedding the contributions of parasitic structures from the transmission line measurements. The intrinsic junction capacitances obtained by this method and the three-dimensional (3-D) electromagnetic model are combined to form a diode simulation model, which accurately characterizes the capacitance characteristics of the SBD. It was verified with a 200 GHz double frequency multiplier, and the simulation results and measurement results showed good consistency.

Characterization of Shapiro steps in the presence of a 4π-periodic Josephson current

The Majorana zero-energy modes (MZMs) residing at the boundary of topological superconductors have attracted a great deal of interest recently, as they provide a platform to explore fundamental physics such as non-Abelian statistics, as well as fault-tolerant quantum computation. Period doubling of Shapiro steps in a Josephson junction under microwave irradiation has been regarded as strong evidence for the emergence of the MZMs at the junction edges. However, questions remain as to how the Shapiro steps respond to the presence of a 4{\pi}-periodic Josephson current. In this study, we investigated the characteristic features of Shapiro steps with respect to the ratio ({\alpha}) of the 4{\pi}-periodic current to the topologically trivial 2{\pi}-periodic one, as well as the reduced microwave frequency ({\Omega}) and McCumber parameter ({\beta}) of the junction. Our analysis reproduced Shapiro steps similar to those observed experimentally for specific parameter sets of {\alpha},{\Omega} ({\lesssim 0.1}), and {\beta} ({gtrsim 1.0}). Full suppression of the first lobe of the n=1 step guarantees the presence of a 4{\pi}-periodic Josephson current.In addition, we discuss the range of {\Omega} and {\beta} needed for full suppression of the first lobe of the {n=1} step, even for small {\alpha} ({<0.1}). To observe "period-doubled Shapiro steps", even with a small {\alpha}, the junction should have a large {I_c}{R_N} product and sufficiently large junction capacitance.

The design of a high voltage responsivity terahertz detector based on improved grounding model

AbstractA high voltage responsivity detector in G‐band is designed in this paper. Different grounding models for the terahertz detector are analyzed and designed. Gold wire grounding design is superior to traditional grounding designs, which reduce the influence caused by the doping concentration, position and thickness error of conductive adhesive. Detectors are based on the Virginia Diodes Inc G‐band zero‐bias Schottky diode with low zero‐bias junction capacitance. The voltage responsivity test result of the gold wire grounding detector is about 1800 mV/mW in 210–220 GHz. The development of the detector provides the device basis for the realization of a terahertz focal plane imaging system.

Multi-channel AlGaN/GaN Schottky barrier diodes with a half through-hole

The cutoff frequency of Schottky barrier diode (SBD) depends on its junction capacitance and series resistance. The two-dimensional electron gas (2DEG) at AlGaN/GaN interface has high carrier mobility and carrier concentration. However, AlGaN/GaN heterostructure SBD usually shows a high series resistance because of the thin 2DEG channel. In this work, multiple AlGaN/GaN heterojunctions are vertically stacked for forming multiple parallel 2DEG channels to reduce the series resistance. Multi-channel AlGaN/GaN-based air-bridge structure planar SBDs with a half through-hole are demonstrated. The series resistance of quintuple-channel SBD is only 39.5% of the single-channel SBD's. Moreover, a low capacitance is obtained by the Schottky electrode with a half through-hole structure. The low series resistance and the low capacitance contribute to a 16 GHz cutoff frequency in millimeter-wave band.

Analyzing the Effect of Parasitic Capacitance in a Full-Bridge Class-D Current Source Rectifier on a High Step-Up Push–Pull Multiresonant Converter

This paper presents an analysis on the effect of a parasitic capacitance full-bridge class-D current source rectifier (FB-CDCSR) on a high step-up push–pull multiresonant converter (HSPPMRC). The proposed converter can provide high voltage for a 12 VDC battery using an isolated transformer and an FB-CDCSR. The main switches of the push–pull and diode full-bridge rectifier can be operated under a zero-current switching condition (ZCS). The advantages of this technique are that it uses a leakage inductance to achieve the ZCS for the power switch, and the leakage inductance and parasitic junction capacitance are used to design the secondary side of the resonant circuit. A prototype HSPPMRC was built and operated at 200 kHz fixed switching frequency, 340 VDC output voltage, and 250 W output power. In addition, the efficiency is equal to 96% at maximum load. Analysis of the effect of the parasitic junction capacitance on the full-bridge rectifier indicates that it has a significant impact on the operating point of the resonant tank and voltage. The proposed circuit design was verified via experimental results, which were found to be in agreement with the theoretical analysis.