Junction Barrier Schottky Research Articles

Repetitive-Avalanche-Induced Electrical Parameters Shift for 4H-SiC Junction Barrier Schottky Diode

The electrical parameters shift of 4H-SiC junction barrier Schottky diode under the repetitive avalanche current stress has been experimentally investigated. Using technical computer-aided design simulation and high resolution transmission electron microscopy analysis at atomic scale, it has been demonstrated that the forward voltage drop of the device has no variation during the stress due to the intactness of active area. However, the reverse breakdown voltage is gradually increased with the stress time, which results from hot electron injection and trapping into the SiO2 dielectric at the outer edge of p-type junction termination.

Electrical and photovoltaic characteristics of Ni/(n)Bi2S3 Schottky barrier junction

Ni doped nanocrystalline Bi2S3 thin films are chemically deposited on Fluorine Doped Tin Oxide (FTO) substrate from the solution containing Ni(NO3)2, Bi(NO3)3.5H2O, C6H15NO3 and CH2CS.NH2 at deposition temperature 318K. The Current–voltage (I–V) characteristics of the junctions are measured in the temperature range 300–340K and junction parameters are calculated. The ideality factor (n) and barrier height (ϕb) at different temperature are found to vary from 4.7 to 3.8 and 0.74 to 0.79 respectively. It is observed that the ideality factor decreases while the barrier height increases with increase of temperature. The calculated junction parameters are strongly temperature dependent. The discrepancy between the barrier height obtained from capacitance–voltage (C–V) and current–voltage (I–V) characteristics is analyzed. The carrier concentration determined from the C–V plot is found to be of the order 1017/cm3.

Fabrication and High Temperature Characterization of 1200V-15A 4H-SIC JBS Diode

1200V-15A 4H-SiC junction barrier schottky (JBS) diodes were designed and fabricated based on SiC epitaxy and device technology. By adopting the proper SBD metal,optimized structures and fabrication process, we succeeded in achieving good balance between blocking voltage and on-resistance, especially at high temperature to 200°C. Furthermore, the fabricated diode have a fast recovery time of 30ns, and its dynamic characteristics are constant at high temperature.

High-Voltage Large-Current 4H-SiC JBS Diodes

3.3kV and 4.5kV 4H-SiC junction barrier Schottky (JBS) diodes with floating guard rings edge termination have been fabricated. The 3.3kV device with 33μm 2.7E15 cm-3epilayer and 5.5Х5.5mm2schottky contact area has a blocking voltage (Vb) of 3.9 kV and a specificon-resistance (Ron) of 10.5 mΩ.cm2, with a forward current measured up to 50A at VF=3.0V. The 4.5kV device with 50 um 1.2E15 cm-3epilayer and 5.5Х5.5mm2schottky contact area has a blocking voltage (Vb) of 5.1 kV and a specificon-resistance (Ron) of 22.9 mΩ.cm2, with a forward current of 30A at VF=3.7V.

Formation of PtSi Schottky barrier MOSFETs using plasma etching

PtSi Schottky barrier (SB) MOSFETs were fabricated and their device performance was characterized. PtSi was selected instead of NiSi to form the p-type SB junction since such a configuration would be easy to fabricate through SF6 based plasma etching. The addition of He-O2 in SF6 decreases the etching rate of PtSi while the etching rate of Pt remains unchanged. The retardation in the etching rate of PtSi in He-O2/SF6 is attributed to the formation of a metal oxide on the etched PtSi surface, as evidenced by the x-ray photoelectron spectroscopy results. Optical emission spectroscopy was conducted to establish the endpoint where the wavelength from the feed gas was traced instead of tracing the etching by-products since the by-products have little association with the plasma reaction. The IDS–VDS curves at various VG–VTH indicate that plasma etching resulted in the successful removal of the Pt on the sidewall region, with negligible damage to the S/D area.

An Analytical Model With 2-D Effects for 4H-SiC Trenched Junction Barrier Schottky Diodes

This paper presents an analytical model with 2-D effects for 1200 V 4H-silicon carbide trenched junction barrier Schottky (TJBS) diodes. Energy band diagrams of junction barrier Schottky and TJBS diodes in reverse biases are analyzed in detail. An analytical model of potential and electric field distributions with 2-D effects is proposed. Based on the modeling results of the surface electric field, a physical model accounting for three main mechanisms, namely, thermionic emission, tunneling, and avalanche multiplication is developed for the device reverse I-V characteristics. The models are verified by experimental results. Based on the physical model, optimization of the TJBS parameters including barrier height, junction depth, and junction spacing can be carried out with the target of achieving the lowest device ON-state voltage while limiting the reverse leakage current to a reasonable level. As a result, for a given breakdown voltage, an optimum set of parameters can be obtained.

Analytical models of on-resistance and breakdown voltage for 4H-SiC floating junction Schottky barrier diodes

The analytical models of on-resistance and reverse breakdown voltage for 4H-SiC floating junction SBD are presented with the analysis of the transport path of the carriers and electric field distribution in the drift region. The calculation results from the analytical models well agree with the simulation results. The effects of the key structure parameters on specific on-resistance and breakdown voltage are described respectively by analytical models. Moreover, the relationship between BFOM and parameters of floating junction are investigated. It is proved that the analytical models are more convenient for the design of the floating junction SBDs.

1.4 kV Junction barrier Schottky rectifier with mixed trench structure

Junction barrier Schottky (JBS) rectifier with mixed trench structure on 4H-SiC for improving the electrical performance is proposed. The device shows the increasing forward current density compared to the common JBS rectifier on 4H-SiC because of the larger Schottky contact area without considerable degradation of breakdown voltage. This work is solely based on simulations with Silvaco TCAD tool. The forward current density of this device with 1.5 µm Schottky region depth of the trench structure is 102 A/cm2 at the forward voltage drop of 3 V while the current density of the common JBS is 70 A/cm2. The proposed structure improves the forward voltage drop at 100 A/cm2 effectively by 23%. The reverse characteristic and output capacitance of this device are similar to common JBS rectifier. In addition, in this work the forward and reverse characteristic of the proposed device at room and high temperatures is simulated.

Improving the Electrostatic Discharge Robustness of a Junction Barrier Schottky Diode Using an Embedded p-n-p BJT

The high-voltage (H-V) junction barrier Schottky (JBS) diode is often incorporated into the input or output of H-V integrated circuits. When the chip is connected to the external environment, it inevitably suffers electrostatic discharge (ESD) stress. However, the JBS diode can only withstand the forward-mode ESD but it is highly vulnerable to reverse-mode ESD. In this letter, a new kind of JBS diode that is incorporated with a p-n-p bipolar is developed. The experimental results demonstrated that the new device can improve the failure threshold voltages of the human body mode and machine mode by at least four times. The area increase for the new device is 2.2%.

Reliability impacts of high-speed 3-bit/cell Schottky barrier nanowire charge-trapping memories

This study experimentally examines the reliability impacts of high-speed 3-bit/cell Schottky barrier nanowire charge-trapping memories. Unique Schottky barrier junctions strongly enhance hot-carrier generation, ensuring high-speed multi-level programming at low gate voltages. However, strong injected gate currents might cause potential retention and endurance concerns when the programming voltage is beyond 9V. The effective number of deep-level traps is insufficient for capturing injected electrons, such that some electrons occupy shallower states, producing retention degradation after thermal stress. The charge-trapping layers are susceptible to additional trap generation under strong gate currents, leading to considerable threshold-voltage shifts after cycling stress. A compromise of cell characteristics exists between excellent reliability and high-speed programming in 3-bit/cell Schottky barrier nanowire cells. The application of sub-8-V multi-level programming can alleviate the potential reliability generated by strong injected currents, preserving a favorable cycling endurance and thermal retention in 3-bit/cell Schottky barrier nanowire charge-trapping cells.

Temperature effects on the ruggedness of SiC Schottky diodes under surge current

This work analyzes the effects of temperature on the destruction of 1.2kV–10A silicon carbide (SiC) tungsten-based Schottky barrier diodes (W-SBD’s) under surge current tests. First, W-SBD’s were aged and tested up to failure under surge current pulses, showing no ageing at 40A amplitudes and a surge current capability of 64A and 59A when they are tested at room temperature (RT) and 200°C, respectively. Then, they were inspected by IR lock-in thermography and Small sIgnal Modulation for Thermal Analysis (SIMTA) technique, all they showing physical failure signatures at the active area periphery. Scanning Electron Microscope inspections after Focused Ion Beam millings at these locations revealed that metal degradation due to field stopper bipolar activation was the failure mechanism. At RT, the samples showed lighter degradation (electromigration and thermomigration, contact reconstruction), while at 200°C, the metal contact was also sputtered off at the periphery. This correlates with the peripheral bipolar current density enhancement (bipolar activation voltage reduction) with temperature. These results are extensible to junction barrier Schottky diodes, as they present the same structure leading them to fail: Schottky and bipolar diodes parallel connected. Considering this, new solutions were proposed to enhance the W-SBD’s ruggedness under overloading conditions.

Medium Voltage Hybrid Si IGBT/SiC JBS Diode Module Development

Medium voltage SiC Junction Barrier Schottky (JBS) diodes are considered as a replacement for conventional Si freewheeling PiN diodes in phase-leg applications. While lower voltage SiC Schottky diodes are commercially available, medium voltage SiC JBS diodes are also attractive due to their relative simplicity and thus potential for low cost. In this work, the performance of 4.5 kV SiC JBS diodes paired with Si IGBTs is reviewed and compared to legacy components. Hybrid Si/SiC module design and performance are reviewed and potential reliability issues are examined.

Full Epitaxial Trench Type Buried Grid SiC JBS Diodes

The paper presents the advanced concept of fully epitaxial SiC junction barrier Schottky (JBS) diodes. It combines trench etching with embedded epitaxial re-growth and enables cost-efficient manufacturing. Fabricated devices are rated for 20A / 1200V and have leakage currents below 0.1µA at 1000V blocking voltage.

Novel catalytic functions induced by charge accumulation at subnano interface between unisize metal cluster disk and semiconductor surface

We have successfully accumulated electrons in a subnano‐space according to the Schottky barrier junction between a subnano metal cluster and a semiconductor surface. The scanning–tunneling microscopy/spectroscopy measurements depicted spatial distributions of the accumulated charges. Taking advantages of their large charge‐transfer efficiency to molecules, novel catalytic functions driven by the subnano‐space charges were studied by means of ultrahigh‐sensitive temperature‐programmed desorption mass spectroscopy. As a representative function, we have found high‐performance catalytic activity of Pt30 monatomic‐layered disks constructed on the Si(111) surface in CO oxidation. Copyright © 2014 John Wiley & Sons, Ltd.

Medium Voltage Hybrid Si IGBT/SiC JBS Diode Module Development

Wide bandgap semiconductors are an obvious choice for high voltage applications due to their large critical electric field. While both SiC and GaN will support large electric fields, approximately 10x that of the dominant power semiconductor Si, the wide availability of SiC substrates up to 150 mm diameter provides a cost effective platform over GaN for which even 50 mm substrates are in high demand. Besides substrate technology, high growth rate epitaxy, ion implantation and anneal technologies are well established for SiC. The typical insertion path begins with majority carrier devices such as Schottky diodes which are robust and relatively simple to manufacture. Junction barrier Schottky diodes have been shown to be stable at 10kV [1] and are commercially available up to 1.7 kV. The obvious application for JBS diodes is as a substitute for Si PiN diode freewheeling diodes. The key advantage is the transition from the minority carrier Si bipolar device to the majority carrier unipolar SiC device. This transition to the SiC Schottky virtually eliminates the reverse recovery effects typical of Si PiN diodes. Further, the adoption of the junction barrier Schottky structure results in low reverse leakage current and stable blocking voltages. In this work medium voltage, 4.5 kV SiC JBS diodes matched to commercially available 4.5 kV IGBTs are joined to form efficient hybrid modules. Dynamic and static characteristics as well as reliability phenomena are evaluated. Compared to the all-Si module, the hybrid module shows up to a factor of six reduced turn-on loss as is demonstrated in Fig. 1 where 4.5 kV Si PiN diode compared to a SiC JBS diode. The recovery current is shown on the left and the impact on the IGBT turn-on characteristics is shown on the right. Through simulations and hardware testing the modules have been optimized for the IGBT/JBS die are ratio in terms of total power dissipation. Other considerations include surge capability which is limited by the JBS diode and the reverse blocking voltage of the IGBT. An external circuit that clamps the voltage across the diode is developed and demonstrated greatly increasing the surge rating. Reliability considerations such as high temperature dV/dt and HTRB are assessed and will be presented.Overall, the hybrid modules are extremely efficient and robust. Total power losses are reduced by one-half by replacing only the freewheeling Si PiN diode with a SiC JBS diode. The optimized solution reduces the needed SiC die area and thus module costs. Reliability assessments show that the modules are robust.

Modeling of the High-Frequency Rectifier With 10-kV SiC JBS Diodes in High-Voltage Series Resonant Type DC–DC Converters

The superior material properties of the wide bandgap silicon carbide (SiC) semiconductors enable excellent device characteristics such as low on-resistance, high breakdown voltage, fast switching speed, high temperature operation, etc. 10-kV SiC junction barrier Schottky (JBS) diode prototype made by Cree was characterized in this paper first. The high-voltage (HV) and high-frequency rectifier consisting of SiC JBS diodes in dc-dc converters can potentially benefit from the device characteristics. However, capacitive current in both forward and reverse recovery process is observed due to the junction capacitance when the SiC JBS diode is turned on and off, which increases the reactive power and reduces the rectifier output power and voltage. To better utilize the devices, the rectifier operation is analyzed in consideration of the impact of the JBS diode parasitic capacitance. Two equivalent circuit models, the series and the parallel input impedance model, are proposed. The distributed junction capacitance of JBS diodes is lumped into the equivalent input capacitance such that the input impedance and output voltage, two critical parameters in HV dc-dc converter design, can be predicted from the models. Experiment setup of SiC JBS diode rectifier was built and the test results verified the modeling work.

Design and Experimental Study of 4H-SiC Trenched Junction Barrier Schottky Diodes

This paper presents the design, fabrication, and experimental analysis of 1200 V 4H-SiC trenched junction barrier Schottky (TJBS) diodes. Design considerations and device performances of the TJBS devices are compared with those of the conventional planar JBS diodes via numerical simulation, analytical modeling, and experiments. It was found that, for conventional planar JBS diodes, due to its limited P <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> implantation depth, there is a tight tradeoff between forward ON-resistance and blocking voltage. This does not only put stringent requirement on obtaining a narrow photolithography line width ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="TeX">\(\sim 1.5\) </tex-math></inline-formula> <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="TeX">\(\mu \) </tex-math></inline-formula> m), but also makes the device design window narrow. The TJBS diodes can substantially alleviate such tradeoff and obtain a larger design window that enables good reverse blocking and forward conduction capabilities at the same time. As a result, this structure demands less restriction on line width control (2.2–3.2 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="TeX">\(\mu \) </tex-math></inline-formula> m) of the fabrication process and hence can improve the device yield.

Recovery of Electrical Characteristics of Au/n-Si Schottky Junction Under &lt;inline-formula&gt; &lt;tex-math notation="TeX"&gt;${}^{60}\hbox{Co}$&lt;/tex-math&gt;&lt;/inline-formula&gt; Gamma Irradiation

The electrical transport characteristics of a Au/n-Si metal-semiconductor Schottky barrier junction under exposure to <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">60</sup> Co gamma rays have been reported in this paper. The role of energy loss mechanisms in the Schottky junction due to gamma irradiation is studied using the current-voltage (I-V ) and capacitance-voltage (C-V ) measurements. The electrical characteristics were measured at various doses of gamma by incrementally increasing the exposure from 0.85 Mrad (Si) to 340 Mrad (Si) to systematically study the dose effects on electrical transport across the Schottky interface. After irradiation, the ideality factor was found to decrease initially up to a dose of 17 Mrad (Si), and thereafter, it started increasing. At a dose of 340 Mrad (Si), the characteristics of the Schottky interface were found to recover toward the pristine characteristics. The recovery effect is attributed to annealing of interface defects due to the electronic energy loss S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">e</sub> of gamma ray photons.

Experimental and numerical analyses of high voltage 4H-SiC junction barrier Schottky rectifiers with linearly graded field limiting ring

This paper describes the successful fabrication of 4H-SiC junction barrier Schottky (JBS) rectifiers with a linearly graded field limiting ring (LG-FLR). Linearly variable ring spacings for the FLR termination are applied to improve the blocking voltage by reducing the peak surface electric field at the edge termination region, which acts like a variable lateral doping profile resulting in a gradual field distribution. The experimental results demonstrate a breakdown voltage of 5 kV at the reverse leakage current density of 2 mA/cm2 (about 80% of the theoretical value). Detailed numerical simulations show that the proposed termination structure provides a uniform electric field profile compared to the conventional FLR termination, which is responsible for 45% improvement in the reverse blocking voltage despite a 3.7% longer total termination length.

Characterization of deep electron traps in 4H-SiC Junction Barrier Schottky rectifiers

Conventional deep level transient spectroscopy (DLTS) technique was used to study deep electron traps in 4H-SiC Junction Barrier Schottky (JBS) rectifiers. 4H-SiC epitaxial layers, doped with nitrogen and grown on standard n+−4H-SiC substrates were exposed to low-dose aluminum ion implantation process under the Schottky contact in order to form both JBS grid and junction termination extension (JTE), and assure good rectifying properties of the diodes. Several deep electron traps were revealed and attributed to impurities or intrinsic defects in 4H-SiC epitaxial layers, on the basis of comparison of their electrical parameters (i.e. activation energies, apparent capture cross sections and concentrations) with previously published results.