A very low dark current (VLDC) temperature-resistant approach which best suits a wide dynamic range (WDR) complementary metal oxide semiconductor (CMOS) image sensor with a lateral over-flow integration capacitor (LOFIC) has been developed. By implementing a low electric field photodiode without a trade-off of full well-capacity, reduced plasma damage, re-crystallization, and termination of silicon–silicon dioxide interface states in the front end of line and back end of line (FEOL and BEOL) in a 0.18 µm, two polycrystalline silicon, three metal (2P3M) process, the dark current is reduced to 11 e-/s/pixel (0.35 e-/s/µm2: pixel area normalized) at 60 °C, which is the lowest value ever reported. For further robustness at low and high temperatures, 1/3-in., 5.6-µm pitch, 800×600 pixel sensor chips with low noise readout circuits designed for a signal and noise hold circuit and a programmable gain amplifier (PGA) have also been deposited with an inorganic cap layer on a micro-lens and covered with a metal hermetically sealed package assembly. Image sensing performance results in 2.4 e-rms temporal noise and 100 dB dynamic range (DR) with 237 ke- full well-capacity. The operating temperature range is extended from -40 to 85 °C while retaining good image quality.