Integrated Power Electronics Research Articles

Thermal Design and Optimization Methodology for Integrated Power Electronics Modules

A methodology was developed and implemented to optimize the design layout for i_ntegrated p_ower e_lectronics m_odules (IPEMs) by considering both the electrical and thermal performances. This paper is primarily focused on the thermal aspects, which were analyzed using three-dimensional (3D) computational software tools. Implementation of the design methodology resulted in a 70 percent reduction in the common mode current, a 4 percent reduction in the size of the geometric footprint, and a 7°C reduction in the maximum temperature rise for the case studied, thus, providing an increase in the IPEM’s overall performance.

Volumetric Optimal Design of Passive Integrated Power Electronics Module (IPEM) for Distributed Power System (DPS) Front-End DC/DC Converter

In most power electronics converters, the overall footprint and profile of the whole system are in large part determined by the footprint and profile of the passive components and the interconnections between them. Planar magnetics, integrated magnetics, and passive integration have been topics of research for the past few years to reduce the count, footprint, and profile of the passive components and, hence, increase the power density of the whole converter. This becomes especially prominent in distributed power system (DPS) front-end converters, as the trend is moving from the 2U (1U=1.75 in) standard toward the 1U standard. Chen, Strydom, and van Wyk presented an integration technology, which combines the planar magnetics, integrated magnetics, and passive integration techniques, to integrate all the high-frequency passive components in a DPS front-end dc/dc converter into a single passive integrated power electronics module (IPEM) to reduce the size and volume of the overall system. To optimally design the passive IPEM, an ac loss model and a thermal model are needed. Based on these models, the volumetric optimal design algorithm is presented. To evaluate the performance of the optimally designed passive IPEM, a passive IPEM prototype is constructed and tested. Comparisons are made between the passive IPEM and the discrete components from viewpoints of volume, profile, efficiency, and thermal management. The optimal design is verified by experimental results.

Dynamic Reduced Electrothermal Model for Integrated Power Electronics Modules (IPEM)

Background: This paper presents a reduced mathematical model using a practical numerical formulation of the thermal behavior of an integrated power electronics module (IPEM). This model is based on the expanded lumped thermal capacitance method (LTCM), in which the number of variables involved in the analysis of heat transfer is reduced only to time. Method of Approach: By applying the LTCM, a simple, nonspatial, but highly nonlinear model is obtained for the case of the IPEM Generation II. Steady and transient results of the model are validated against results from a three-dimensional, transient thermal analysis software tool, FLOTHERM™ 3.1. The electrothermal coupling was obtained by implementing the reduced-order thermal model into the SABER™ circuit simulator. Two experimental setups, for low- and high-speed thermal responses, were developed and used to calibrate the reduced model with actual data. Results: The comparison of the LTCM model implemented in a Generation II IPEM with FLOTHERM 3.1 results compared very favorably in terms of accuracy and efficiency, reducing the computational time significantly. Additional validations of the reduced thermal model were made using experiment data for the low-speed thermal response at different constant powers, and good agreement was demonstrated in all cases. A comparison between SABER™ simulations, which incorporated the proposed LTCM, and the fast thermal experimental response results is also presented to validate the dynamic electrothermal model response, and excellent agreement was found for this case. Conclusions: The good agreement found for all three cases presented, the three-dimensional, transient numerical formulation, and the low- and high-speed experimental data indicates that reduced electrothermal models are an excellent alterative for design methodologies of new generations of IPEMs.

Frequency-Domain Modeling of Integrated Electromagnetic Power Passives by a Generalized Two-Conductor Transmission Structure

This work treats the modeling of integrated electromagnetic power passives for integrated power electronics modules by using a distributed conductive structure approach. The distributed L-C cell is chosen as the basis for modeling. This work presents the modeling of an L-C cell through the proposed generalized transmission structure theory that can be applied to both balanced and unbalanced current distributions. The load characteristics of a generalized transmission structure are investigated. The proposed theory has been extended to cascaded structures as well. The calculation results correlate well with the impedance measurement results. Some practical design issues are also discussed.

Motor-Integrated Circular Converter for Hybrid Electric Vehicles

An electric drive with motor integrated power electronics for the use in hybrid electric vehicles is presented. Novel technologies and specially designed components to fulfil the excessive temperature and restricted space requirements are shown. They allow a low cost full integration of the electric drive in a passenger car power train. The converter has circular shape and is inserted in the stator housing around the end windings of the induction motor (see Fig. 1). The projected peak power of the electric drive is 50 kW. The battery voltage range is 200 – 400 V. Experimental results of investigations at a first prototype show the potentials of the proposed integration technologies

Magneto-optical current sensing for applications in integrated power electronics modules

We investigated the potential of using rare-earth ion Garnets, a type of magneto-optical (M-O) material, to sense magnetic field and thus currents in integrated power electronics modules (IPEMs). Firstly, we characterized the M-O materials by determining their Verdet constants, absorption coefficients, and M-O figure-of-merits (FOMs). Then dc and ac current sensing setups were specially designed and built and the characterized M-O materials were attached into a power module to sense the local magnetic field. The best location for the M-O materials was found by finite element modeling (FEM) of electromagnetic field distribution in the module. The dc current sensing results match well with both direct measurements and FEM results. In the ac current sensing, some issues on electromagnetic interference (EMI) were discussed and the sensing speed is tested up to 100 kHz. Finally, we provided miniaturizing designs for future integration and packaging of the M-O current sensors in IPEMs.

Flip-chip on flex integrated power electronics modules for high-density power integration

Three-dimensional flip-chip on flex (FCOF) integrated power electronics modules (IPEMs) have been fabricated for high-density power applications. In this FCOF-IPEM structure, solder-bumped devices were flip-soldered to a flexible substrate with electrical circuits etched on both sides. One side of the flex provides interconnection to power devices while the other is used to construct a simple gate-drive circuit; via holes through the flex integrate the power stage and gate-drive together. Solder-bumped MOSFET devices were obtained by a metallization processing and were used in the FCOF power module construction to improve thermal performance, power density, and integration. With this packaging approach, the multiple solder bumps, instead of the thin, long bonding wires were utilized to connect the power devices to the flex substrate and to improve heat dissipation, lower parasitic oscillations, and reduce package size. Reliability of solder joints has been dealt with through selection of materials, such as use of flexible substrates and underfill encapsulation, and design of joint shape for lower thermomechanical stresses. A comparative study of continuous switching test results have shown that the FCOF-IPEMs have better electrical performance than commercial wire bonded power modules.

High Power Densities with Three Dimensional Integration

A trend exists towards higher power densities in power electronic, driven by the applications market and new technologies.The hybrid integration of semiconductor devices represents the first level of power electronic integration. At higher levels passive components will be included in the same package and eventually complete power electronic converters could be integrated. This calls not only for more compact three dimensional packaging techniques but electromagnetic integration of the passive circuit functions and integrated heat management of all the circuit components. In the paper various issues for achieving high power densities and higher levels of integration are discussed including geometrical packaging, electromagnetic and thermal issues. Some practical examples will also be presented ad case studies.

Pd measurement system for predicting the long-term behaviour of ignition transformers

High requirements have to be met with regard to the quality of ignition systems due to the integration of power and sensor electronics in ignition transformers and the simultaneous more compact form of construction of Otto engines. This has to be proved by means of short-time tests with the newly-produced systems. Partial discharge diagnosis has been an important measure for quality checks in the field of high voltage engineering since many years. The use of partial discharge diagnosis for the prognosis of the long-term behaviour of ignition transformers with an acceptable amount of technical devices is documented in the following.

Technology trends toward a system-in-a-module in power electronics

Currently, assemblies of power semiconductor switches and their associated drive circuitry are available in modules. From a few 100 watts downward, one finds silicon monolithic technology as the integration vehicle, while upward into the multi-kilowatt range, mixed mode module construction is used. This incorporates monolithic, hybrid, surface mount and wirebond technology. However, a close examination of the applications in motor drives and power supplies indicates that there has been no dramatic volume reduction of the subsystem. The power semiconductor modules have shrunk the power switching part of the converter, but the bulk of the subsystem volume still comprises the associated control, sensing, electromagnetic power passives and interconnect structures. The paper addresses the improvement of power processing technology through advanced integration of power electronics. The goal of a subsystem in a module necessitates this advanced integration. The central philosophy of this technology development research is to advance the state of the art by providing the concept of integrated power electronics modules (IPEMs). The technology underpinning such an IPEM approach is discussed. The fundamental functions in electronic power processing, the materials, processes and integration approaches and future concepts are explained.

An improved approach to application-specific power electronics education-switch characterization and modeling

An integrated power electronics curriculum has been implemented in the Department of Electrical and Computer Engineering at the University of Illinois, Chicago. This paper describes the development of a set of hands-on laboratory experiments to accompany classroom lectures. Content is based on switching converter topologies and commercial power semiconductor devices. Unlike most experiments, which focus on circuit- or control-level characteristics, our approach emphasizes the circuit-device-load interactions. The concept presented is innovative in that it creates a 3/spl times/3 matrix of experiment variation-devices, circuits-control, and machines-loads-with one set of hardware. The lab development is ongoing with future experiments to address three-phase converters and motor control applications. Experiment content is described, as well as the means by which the material has been integrated within the course sequence. Lab station construction and safety issues are also addressed. The experiments require hands-on measurement and circuit connection and complement the established course elements of theory and computer-based circuit modeling. Laboratory experiments and computer simulations collectively provide quantitative evidence of mixed circuit and device optimization.

Chip-scale packaging of power devices and its application in integrated power electronics modules

A power electronics packaging technology utilizing chip-scale packaged (CSP) power devices to build three-dimensional (3-D) integrated power electronics modules (IPEMs) is presented in this paper. The chip-scale packaging structure, termed die dimensional ball grid array (D/sup 2/BGA), eliminates wire bonds by using stacked solder joints to interconnect power chips. D/sup 2/BGA package consists of a power chip, inner solder caps, high-lead solder balls, and molding resin. It has the same lateral dimensions as the starting power chip, which makes high-density packaging and module miniaturization possible. This package enables the power chip to combine excellent thermal transfer, high current handling capability, improved electrical characteristics, and ultralow profile packaging. Electrical tests show that the V/sub CE/(sat) and on-resistance of the D/sup 2/BGA high speed insulated-gate-bipolar transistors (IGBTs) are improved by 20% and 30% respectively by eliminating the device wirebonds and other external interconnections, such as the leadframe. In this paper, we present the design, reliability, and processing issues of D/sup 2/BGA package, and the implementation of these chip-scale packaged power devices in building 30 kW half-bridge power converter modules. The electrical and reliability test results of the packaged devices and the power modules are reported.

Three-dimensional flip-chip on flex packaging for power electronics applications

We have extended the concept of flip-chip technology, which is widely used in IC packaging, to the packaging of three-dimensional (3-D) integrated power electronics modules (IPEMs). We call this new approach flip-chip on flex IPEM (FCOF-IPEM), because the power devices are flip-chip bonded to a flexible substrate with control circuits. We have developed a novel triple-stacked solder bump metallurgy for improved and reliable device interconnections. In this multilayer structure, we have carefully selected packaging materials that distribute the thermo-mechanical stresses caused by mismatching coefficients of thermal expansion (CTEs) among silicon chips and substrates. We have demonstrated the feasibility of this packaging approach by constructing modules with two insulated gate bipolar transistors (IGBTs), two diodes, and a simple gate driver circuit. Fabricated FCOF-IPEMs have been successfully tested at power levels up to 10 kW. This paper presents the materials and reliability issues in the package design along with electrical, mechanical, and thermal test results for a packaged IPEM.