Inductor Current Research Articles

Controller Design of a Novel Interleaved Parallel Bi-Directional DC-DC Converter

To improve the dynamic performance of the output voltage of the new interleaved shunt bi-directional DC-DC converter, a double closed-loop control method of voltage and current based on fuzzy PI control is proposed. Firstly, based on the study of the operating principle and steady-state performance of the new interleaved parallel DC-DC converter, a small-signal mathematical model of the interleaved parallel bidirectional DC-DC converter with different modes is established, and based on the model, the transfer functions from duty cycle to output voltage and inductor current are derived, and accordingly, the double-closed-loop controller of the bidirectional DC-DC converter is designed. Then the design method of the fuzzy PI controller is described in detail, and the fuzzy control is applied to the voltage outer loop of the double closed-loop control so that the system can adjust the PI parameters in real time. Simulation experiments are carried out by Matlab/Simulink to compare the simulation experimental waveforms using fuzzy PI control and conventional PI control, and it is verified that the fuzzy PI control improves the output voltage response speed of the new interleaved shunt bi-directional DC-DC converter, reduces the voltage peak of the system, and reduces the overshoot.

Dead-time compensation and single-loop control strategy for ground power unit

Instead of the auxiliary power system, the ground power unit supplies to airplanes during stopovers in airports, which is an important means of reducing carbon emissions of airport. However, under the restraint of switching frequency and high dynamic response speed, a single control loop is usually implemented in 400 Hz voltage-source inverter, the sampling and control of the inductor current in the LC filter are avoided, result in the design of the control system being more difficult, and the direction of the dead-time compensation can not be obtained due to the lack of the current polarity. In view of the above problem, this paper firstly analyzes the influence on the output voltage of inverter due to the dead-time, including the errors of fundamental amplitude and phase, and the low-order harmonic distortion. Then, according to the state equation of the inductor current, a current observation model without zero drift is proposed to obtain the polarity of the inductor current. On this basis, feedforward compensation is carried out for the voltage error generated by the dead-time. Combined with the amplitude-frequency characteristic curve, the parameter optimization design method of the single closed-loop proportional-resonant controller is presented. Finally, a simulation model and an experimental platform are established to verify the feasibility and effectiveness of the current observation model, dead-time compensation method and controller parameter optimization design method proposed in this paper.

Hybrid approach for 3 phase bridgeless AC to DC Cuk converter for WECS

ABSTRACT This manuscript proposes a novel hybrid method based on a single-stage three-phase bridgeless alternating current (AC) to direct current (DC) Cuk converter for wind energy conversion systems (WECS). The proposed hybrid method is the combination of Mexican Axolotl Optimization (MAO) and Fuzzy Wavelet Neural Network (FWNN), hence it is named as MAO-FWNN method. Moreover, the proposed method enhanced the system performance by distributing the defined reactive-power to harmonic reduction and doubly fed induction generator (DFIG). The proposed converter is modelled under a discontinuous mode of the inductor current. The converter’s output inductor is modelled as a continuous inductor current mode, and it functions to provide enhanced power quality (PQ) and low DC (Direct Current) voltage ripple. At that point, the MATLAB platform is used to execute the performance of the proposed method, and it is compared with existing methods. The performance of the proposed method provides the 0.095 to 0.096 times/sec, which is higher than the existing methods. As a result, the proposed technique is well established compared to the existing techniques.

Modeling, Analysis, and Winding Loss Calculation of Different Litz and Solid Wire on Coupled Inductor in DC–DC Cuk Converter for DCM

In this article, the coupled inductor is designed using a litz wire, an enameled litz wire, and a solid wire separately. All the coupled inductors wound with litz and solid wires are tested in a Cuk converter operated in DCM with a 25 kHz switching frequency for 15 W power, and winding losses of each wire, including proximity and skin effect loss, are calculated analytically without using any software, by using different techniques presented in literature, and the results are compared. Also, state-space modeling of the converter using a coupled inductor for DCM is derived as a contribution of the article because such a modeling is not derived for the Cuk converter in the literature. Thanks to the applications, inductor currents, switch voltage, input–output voltage, and output current are measured for coupled inductors with different wires. In addition, FEM simulation and co-simulation of all coupled inductors are realized, and the results obtained by applications are verified by them. Besides, it is shown that while the number of turns is the same, increasing the bundle of wires increases efficiency and inductance, reducing the window area and coupling coefficient.

A simple zero-voltage switching technique for a single-phase inverter based on bi-directional inductor current

The majority of soft-switching inverters often use auxiliary semiconductor switches that run for extremely brief periods to provide ZVS conditions for the main switches, potentially raising the inverter system’s cost. This work presented a simple zero-voltage switching (ZVS) approach by employing a bi-directional inductor current for the single-phase inverter, which reduced the cost of auxiliary switches and simplified the soft-switching inverter design. All switches can achieve ZVS operation without additional resonant components. The conventional PWM control strategies are applied in the proposed technique, and thus the problems existing in variable switching frequency converters are removed. This article describes the soft-switching approach and detailed circuit functioning. Different key parameters are optimized to improve efficiency. To confirm the suggested ZVS method, a hardware inverter prototype is created, built, and tested. To validate the inverter’s characteristics and validity, experimental results are presented.

Extension of Zero-Voltage Switching Region of Wide Volage Ratio Range Dual-Active-Bridge Converter by LC Antiresonant Network

Zero-voltage switching (ZVS) for dual active bridge (DAB) with wide voltage conversion ratio has a contradiction with low conduction loss, especially under light power transmission. Root mean square (RMS) increase of inductor current is unavoidable just by optimizing modulation schemes. Inspired by the various frequency (VF) and various inductor (VI), this article proposes a DAB converter with the capability of regulating the impedance of the resonant tank to extend the ZVS region. With an <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LC</i> antiresonant circuit in series with original inductor, the equivalent inductance of the resonant network of the proposed converter increases along with the switching frequency within the designed frequency range. Thereby, when the voltage mismatches and the transferred power decreases, a large impedance is obtained by slightly increasing frequency to help to achieve ZVS. Moreover, the proposed DAB is found that single phase shift (SPS) has nearly identical characteristics of ZVS and conduction loss compared with multiple phase shift modulation. The benefit of this is that the complexity of close-loop control is significantly reduced just considering the switching frequency and external shift phase. In addition, ZVS characteristics and optimal control method are analyzed in detail. Finally, a 2 kW 360-400V/40-60V prototype is built, and the main experimental results are provided to verify the feasibility of the proposed converter and soft switching range of all switches.

Spin-Valve-Controlled Triggering of Superconductivity

We have studied the proximity effect in an SF1S1F2s superconducting spin valve consisting of a massive superconducting electrode (S) and a multilayer structure formed by thin ferromagnetic (F1,2) and superconducting (S1, s) layers. Within the framework of the Usadel equations, we have shown that changing the mutual orientation of the magnetization vectors of the F1,2 layers from parallel to antiparallel serves to trigger superconductivity in the outer thin s-film. We studied the changes in the pair potential in the outer s-film and found the regions of parameters with a significant spin-valve effect. The strongest effect occurs in the region of parameters where the pair-potential sign is changed in the parallel state. This feature reveals new ways to design devices with highly tunable inductance and critical current.

Dc/dc Boost Converter Topologies and Experimental Comparison in Electric Vehicle to Grid Applications

In applications that transfer energy from the electric vehicle (EV) to the grid, the direct current (dc)/dc boost converter circuits on the vehicle must be light, low volume, and high efficiency. To achieve this advantage, the inductor sizes used in non-isolated dc/dc converter circuits must be reduced. Synchronous and interleaved synchronous topology structures are used in dc/dc boost converter circuits. This study conducted experimental performance analyses of these two dc/dc boost circuits in a system with a battery group and a wireless EV charging structure. The study presents that in the interleaved synchronous dc/dc boost topology at the same power values, inductor currents and output voltage/current ripple decrease, and efficiency increases. The performance characteristics of the two circuit topologies under different operating conditions have been experimentally proven. It has been shown that using interleaved synchronous dc/dc boost converter topology is advantageous in EVs' high charge/discharge applications.

Design, Modeling, and Validation of Grid-Forming Inverters for Frequency Synchronization and Restoration

This paper focuses on the modeling, analysis, and design of grid-forming (GFM) inverter-based microgrids (MGs). It starts with the development of a mathematical model for three-phase voltage source inverters (VSI). The voltage and current controllers consist of two feedback loops: an outer feedback loop of the capacitance-voltage and an inner feedback loop of the output inductance current. The outer voltage loop is employed to enhance the controller’s response time. The inner current loop is used to provide active damping for the resonance created by the LCL filter. A two-layer control scheme is adopted for the GFM inverter control. The primary decentralized control uses droop control and virtual impedance loops to share active and reactive power. Simultaneously, the centralized secondary control addresses frequency and amplitude deviations induced by the droop control. Additionally, a synchronization loop is proposed for seamless reconnection of GFM inverters to the MG and to connect the GFM-controlled MG to the main grid. It has the advantage that the inverter operates in GFM mode even after the synchronization has occurred. The simulation results have shown that the voltage controller ensures a 0.005 s settling time and maintains the steady-state error at its minimum value of 0.1 V. Similarly, the current controller ensures a 0.006 s settling time with a 10−5 steady-state error. The system with the designed controller has a low total harmonic distortion (THD) of 1.46% and improved power quality of the output voltage. Furthermore, a quick restoration time is observed during load steps and tripping events, with a restoration time of 1 s with 10−10 steady-state error. Synchronization is achieved within 0.8 s for the incoming inverters and requires 3 s to synchronize the MG with the main grid, maintaining a steady-state error of 10−9.

Fault-tolerant single-input dual-output converter with preserved output under fault operation

DC-DC converters have played an important role in the auxiliary power supply to electric vehicles, DC micro-grids, and portable electronic applications. To reduce the number of components and to improve the power density, multiport DC-DC converters have been recently proposed. Many multi-output converters are designed based on specific operational constraints on duty ratio or inductor currents. Further, simultaneous control of outputs is critical and involves cross-regulation issues. This paper proposes a single-input dual-output (SIDO) DC-DC converter with fault-tolerant circuit configuration to circumvent these challenges. The designed converter is helpful for the simultaneous control of loads by cross-regulation issues and has simple control without any control constraints on duty ratio or inductor currents. The topology proposed in this paper, can most significantly tolerate the failure during open-circuit for single and multiple switches and gives the preserved output voltage under fault case. The effectiveness and feasibility of the proposed configuration is validated using MATLAB/Simulink.

A Multi-Frequency PCCM ZVS Modulation Scheme for Optimizing Overall Efficiency of Four-Switch Buck–Boost Converter With Wide Input and Output Voltage Ranges

The pseudo-continuous conduction mode (PCCM) zero-voltage-switching (ZVS) modulation scheme is widely used in the four-switch buck-boost (FSBB) converter to achieve high efficiency and voltage step-up/step-down without modulation mode transition. There are two degrees of modulation freedom in the PCCM ZVS modulation scheme. The previous schemes typically only optimize one of them to reduce root mean square (rms) inductor current, which results in relatively lower efficiency in the condition when the difference between input voltage and output voltage is large. In this paper, a multi-frequency PCCM ZVS modulation scheme is proposed for the FSBB converter with wide input and output voltage ranges. By optimizing both of the two degrees of modulation freedom to reduce rms inductor current, the heavy-load efficiency can be effectively improved when the difference between input voltage and output voltage is large. Thus, the overall efficiency of the FSBB converter can be optimized. A 1500W FSBB prototype with input and output voltage ranges of 200-400V is built to verify the proposed modulation scheme.

Particle-in-cell simulations of high frequency capacitively coupled plasmas including spatially localised inductive-like heating

High frequency (HF) capacitively coupled plasmas (CCPs) are ubiquitous, having several industrial applications, especially in the semiconductor industry. Inductive heating effects within these plasmas play an important role and therefore understanding them is key to improve industrial applications. For this purpose kinetic research, using particle-in-cell (PIC) codes, offers significant opportunity to study, and improve, industrial plasma processes that operate at the atomic level. However, PIC codes commonly used for CCPs are electrostatic and thus cannot be used to simulate electromagnetically induced currents. Therefore we have developed EPOCH-LTP, a 1D PIC code with a current heating model, that enables the simulation of inductive heating effects in HF CCPs. First simulation results, from an HF CCP (60 MHz) operated at 1 mTorr of argon, show that inductive currents couple most of their power to the electrons at the interface between the bulk plasma and the sheath. Furthermore, the simulation of a dual-frequency CCP, where a HF inductive current and a low-frequency (LF) voltage waveform at 400 kHz are applied, have shown a synergy between the HF and LF waveforms that increase the inductive heating rate.

Reduction in the Number of Current Sensors of a Semi-Bridgeless PFC Rectifier Based on GaNFET Characteristics

The semi-bridgeless power factor correction (PFC) rectifier is widely used due to its high power factor, high efficiency, and low electromagnetic interference. However, in this rectifier, the inductor current will flow through the body diode of the metal–oxide–semiconductor field-effect transistor (MOSFET) when the MOSFET does not work, causing a problem in detecting the inductor current. Consequently, the current transformers are generally used as current sensors. This means that using many current sensors will make the cost and the peripheral detection circuit complicated. In this paper, our new method is to use a gallium nitride field-effect transistor (GaNFET) to replace the metal–oxide–semiconductor field-effect transistor (MOSFET) in the main switch selection. The reverse-biased conduction voltage of the third quadrant of the GaNFET is higher than the forward-biased conduction voltage of the diode, which solves the problem in detecting the inductor current, reduces the number of current sensors, and simplifies the corresponding peripheral circuits and components. Eventually, via mathematical deduction and hardware implementation, a semi-bridgeless PFC prototype with a GaNFET was built to verify the effectiveness of the proposed structure.

The Hodge decomposition of shell current on the Keda Torus eXperiment device

The Hodge decomposition is a valuable tool for uniquely decomposing total currents on the composite shell into three types: inductive current, halo current, and harmonic current, each with its specific physical meaning. During plasma disruptions, halo currents appear, essential for studying the wall’s thermal load and electromagnetic force. Furthermore, understanding halo currents is crucial for improving the existing methodologies by removing their effects on equilibrium reconstructions and instability analyses based on boundary magnetic probe data. On the Keda Torus eXperiment (KTX) device, radial and tangent halo currents can be simultaneously provided to locate the contact region during a minor disruption experimentally. Additionally, experimental results demonstrate that, in addition to the occurrence of halo current during minor disruption events, halo current is already present simultaneously with the generation of inductive current when a resistive wall mode exists. For devices that lack the capability to measure the two-dimensional shell current distribution on the entire shell, we propose a method to estimate inductive and halo currents only using a set of shell currents along the toroidal direction. This technique is demonstrated on the KTX device and provides an overall good approximation of the inductive and halo current distribution.

A Multilevel Boost Converter with Reduced Inductor Current

DC–DC converters are gaining attention due to their importance in key applications like renewable energy generation. A desirable feature in new DC–DC converters is a reduction in the size, which can be achieved with a reduction in the energy stored in the inductors. This article introduces a new step-up DC–DC converter topology with the following advantages: (i) a larger relation of duty cycle vs. voltage gain compared with the classical boost topology and (ii) an inductor with smaller current and smaller inductance (for the same power conversion characteristics) compared to the traditional boost converter. The smaller inductor current is an advantage against many step-up topologies with the inductor in series with the input (and then the input and the inductor currents are equal). The necessary inductance to achieve a certain current ripple is also reduced compared to the classical boost topology. This results in an inductor with a smaller amount of stored energy, lower inductance, and lower current. The proposed topology can be scaled to have a full family of large-voltage-gain converters. This paper presents the mathematical analysis, simulations, and experiments to assess the benefits of the proposition.

Multiloop Control With Two Duty-Ratio Feedforward Current Loops via Sensing Series-Capacitor Current for Voltage Doubler PFC Converter

In this paper, the voltage doubler PFC converter with two boost inductors and one series-capacitor is studied. Only when both symmetrical duty ratios are larger than 0.5, the conventional multiloop control with one inner current loop and one voltage loop can be directly applied to the voltage doubler PFC converter due to its topology asymmetry. To remove this duty-ratio limit, the multiloop control with two duty-ratio feedforward current loops is proposed where the series-capacitor current is sensed to reconstruct two inductor currents. It follows that the number of sensor in the proposed control is three equal to the number of sensor in the conventional multiloop control. The proposed method is implemented in a Field Programmable Gate Array (FPGA) chip. The provided simulation and experimental results validate the effectiveness.

Hybrid-Level Modulation Scheme for Dual-Bridge Series-Resonant Converter

This paper proposes a hybrid level modulation (HLM) scheme to achieve full load range zero voltage switching (ZVS) over various voltage gains for dual-bridge series-resonant converter. According to the load conditions, HLM includes two parts. At heavy load, a variable-frequency symmetrical level modulation (VFSLM) scheme is offered to ensure the complete commutation of the bridge legs with soft-switching operation. In addition, the optimal root mean square (rms) of the inductor current can be achieved, which further benefits the transfer efficiency. At light load, the switching frequency demanded by VFSLM is much higher than the resonant frequency. So, a dual asymmetric level modulation (DALM) scheme is proposed to prevent devices from hard-switching operation within a moderate range of changes in frequency. Furthermore, the method of identifying control variables with DALM is analyzed for overall efficiency optimization. The developed approach is validated on a 6.6kW on-board-charger whose output voltage varies from 220V to 470V.

Adaptive neural network control of DC–DC power converter

This article proposes a novel Zernike radial neural network based adaptive control architecture for the closed-loop control of output DC voltage in DC-DC buck power converter. The proposed combination of novel Zernike radial neural network estimator and the adaptive backstepping controller effectively compensates for wide range of perturbations affecting the converter system, in an online manner. The closed loop stability of the DC-DC buck power converter with the proposed neuro-adaptive backstepping controller is proven by Lyapunov stability criterion. Numerical simulations are conducted to examine the effectiveness of the proposed controller under start-up response and step changes in the load, source voltage and reference output voltage. Furthermore, the simulation findings are validated by conducting extensive real-time investigation on a laboratory prototype, under a wide range of operating points. The results obtained shows a significant improvement in the transient response of both output voltage and inductor current of the converter, relative to the relevant control methods proposed in the recent past.

Exploration of non-resonant divertor features on the Compact Toroidal Hybrid

Non-resonant divertors (NRDs) separate the confined plasma from the surrounding plasma facing components (PFCs). The resulting striking field line intersection pattern on these PFCs is insensitive to plasma equilibrium effects. However, a complex scrape-off layer (SOL), created by chaotic magnetic topology in the plasma edge, connects the core plasma to the PFCs through varying magnetic flux tubes. The Compact Toroidal Hybrid (CTH) serves as a test-bed to study this by scanning across its inductive current. Simulations observe a significant change of the chaotic edge structure and an effective distance between the confined plasma and the instrumented wall targets. The intersection pattern is observed to be a narrow helical band, which we claim is a resilient strike line pattern. However, signatures of finger-like structures, defined as heteroclinic tangles in chaotic domains, within the plasma edge connect the island chains to this resilient pattern. The dominant connection length field lines intersecting the targets are observed via heat flux modeling with EMC3-EIRENE. At low inductive current levels, the excursion of the field lines resembles a limited plasma wall scenario. At high currents, a private flux region is created in the area where the helical strike line pattern splits into two bands. These bands are divertor legs with distinct SOL parallel particle flow channels. The results demonstrate the NRD strike line pattern resiliency within CTH, but also show the underlying chaotic edge structure determining if the configuration is diverted or limited. This work supports future design efforts for a mechanical structure for the NRD.

Switching Strategy to Reduce Inductor Current Ripple and Common Mode Voltage in Quasi Z-Source Ultra Sparse Matrix Converter

This paper aims to reduce the ripple current in the inductor used in a Quasi Z-source Ultra Sparse Matrix Converter (QZSUSMC). The main limitations of the conventional Ultra Sparse Matrix Converter (USMC) are limited voltage gain <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$(\leq 0.866)$</tex-math></inline-formula> and high common mode voltage (CMV). By integrating a quasi Z-source network in the DC link of USMC and providing a shoot-through (ST) state in a switching cycle, a voltage gain greater than unity can be achieved. Inductors are magnetised during the ST state and demagnetized during the nonshoot-through (NST) state. Hence with a proper arrangement of the ST and NST states, ripple in the inductor current can be minimised. In the proposed modulation, the total ST time is divided into six unequal parts and arranging them to minimize the inductor ripple current. in addition to it, proposed method also offers proper switching arrangements by using active vectors to attenuate peak-peak common mode voltage (CMV). As compared to the earlier reported methods, the proposed method produces a better inductor current ripple and a reduced peak of the CMV. Simulation and developed testing circuit results show the effectiveness of the proposed method.