Indium Gallium Zinc Oxide Thin-film Transistors Research Articles

Depth-Profiling Study on Amorphous Indium–Gallium–Zinc Oxide Thin-Film Transistors by X-ray Photoelectron Spectroscopy

We performed an X-ray photoelectron spectroscopy (XPS) depth-profiling study on the materials used in amorphous indium–gallium–zinc oxide thin-film transistors (a-IGZO TFTs) with Ti and Mo source/drain (S/D) electrodes. The XPS results suggested that there are some differences between the interface regions of Ti/a-IGZO and Mo/a-IGZO for different chemical states of the materials. The chemical states of the back-channel surfaces were also found to be different between the TFTs with Ti and Mo S/D electrodes. In addition, we fabricated indium–gallium–zinc–titanium oxide composite thin films by deposition using multitarget co-sputtering. The electronic structure of these films observed by XPS is similar to that of the Ti/a-IGZO interface region. The fabricated films were found to have a very low resistivity, much lower than that of an a-IGZO film using typical TFT fabrication processes.

Effect of Exposure to Ultraviolet-Activated Oxygen on the Electrical Characteristics of Amorphous Indium Gallium Zinc Oxide Thin Film Transistors

An exposure of the back channel of an indium gallium zinc oxide (IGZO) thin film transistor (TFT) to ultraviolet (UV)-activated oxygen can effectively shift the threshold voltage (Vth )o f the TFT. The Vth decreases linearly with the exposure time while the on-state current greatly increase with the exposure time. The exposure doesn't have a strong impact on other device parameters. The effect of the exposure on the Vth is attributed to the increase in the electron concentration of the channel layer as a result of the Transparent oxide semiconductors (TOS) have attracted much at- tention for the application of flat-panel displays due to their high car- rier mobility (> 1c m 2 /V s) and high transparency in visible range. 1-3 Amorphous indium gallium zinc oxide (a-IGZO) is one of the most attractive TOS that can be used in the next-generation active-matrix flat panel displays, because it has a few superior properties including relatively high mobility, good uniformity, low temperature process, high optical transparency, high threshold voltage stability, etc. 4,5 It has been recently reported that the threshold voltage (Vth) of a-IGZO thin film transistors (TFTs) is affected by the process parameters such as deposition pressure, target composition, channel thickness, post annealing temperature. 6,7 The oxygen content and the thickness of the a-IGZO channel layer are also reported to play an important role in the electrical characteristics including the Vth of the TFTs. 8,9 The Vth is determined by the electron concentration in the channel layer of the TFT, thus it is related to the oxygen vacancies which provide the free charge carriers for electrical conduction in the oxide layer. Control- ling the Vth is required in the TFT application; however, it is not an easy task as the oxygen vacancies can be easily generated during the fabrication processes. In the present work, we have demonstrated that the Vth can be easily changed by exposing the back channel of the IGZO TFT to ultraviolet (UV)-activated oxygen. The Vth of the TFT is found to be highly sensitive to the exposure to UV-activated oxygen, and a linear relationship between the Vth shift and the exposure time is observed. However, the exposure does not have a large impact on other device parametersincludingthefield-effectmobilityandsubthresholdswing. The IGZO TFTs were fabricated on a heavily-doped n-type Si substrate with resistivity lower than 0.001 � ·cm, which served as the bottom gate of the TFTs. Firstly, a 30 nm Al2O3 layer was deposited onto the Si substrate by an atomic layer deposition (ALD) process to form the gate insulator. A 50 nm IGZO thin film was subsequently deposited on the Al2O3 thin film layer by radio-frequency sputtering in Ar ambient at room temperature using a IGZO target (In:Ga:Zn mole ratio = 1:1:1). The IGZO thin film was then subject to the expo- sure to UV-activated oxygen for different durations. Photolithography process followed by wet etching was used to pattern the active region. Finally, 200 nm thick Al source and drain electrodes were deposited by electron-beam evaporation and patterned through the standard lift- off processes to form the TFT structures. The channel length (L )a nd channel width (W) of the a-IGZO TFTs were 20 μm and 20 μm, respectively. The device structure of the bottom-gated TFTs device structure and the experimental setup for the UV-activated oxygen treatment are shown in Fig. 1. An UV lamp with the light wavelength

The preparation and characteristics research of high mobility amorphous indium gallium zinc oxide thin-film transistors

Indium gallium zinc oxide (IGZO) is widely used in thin-film transistors (TFT) as an active layer due to its high mobility and transmittance. The amorphous n-type indium gallium zinc oxide thin-film transistors (IGZO-TFT) of bottom gate with high mobility were prepared, the active layer, source and drain electrode of the TFT were prepared by using magnetron sputtering method, and a low cost mask was used to control the size of the channel. The diffraction pattern and transmittance spectrum were measured by using X-ray diffraction and ultraviolet-visible spectrophotometer, respectively. The structural and optical properties of the IGZO thin film were studied. The dependence of active layer thickness on the performance was analyzed by testing the output characteristics and transfer property of IGZO-TFT. The field effect mobility of the IGZO-TFT reaches 15.6 cm2·V-1·s-1, and the on/off ratio is higher than 107.

Self-Aligned Indium–Gallium–Zinc Oxide Thin-Film Transistor With Source/Drain Regions Doped by Implanted Arsenic

Self-aligned top-gate amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with source/drain (S/D) regions doped by implanted arsenic are developed in this letter. The resulting a-IGZO TFTs exhibit much better thermal stability than those with S/D regions doped by hydrogen or argon plasma. They also show good electrical performance, including field-effect mobility of 12 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V·s, threshold voltage of 3.5 V, subthreshold swing of 0.5 V/dec, and on/off current ratio of 9 ×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> .

Role of incorporated hydrogen on performance and photo-bias instability of indium gallium zinc oxide thin film transistors

This study examined the effects of hydrogen incorporation in amorphous indium gallium zinc oxide (IGZO) on the performance and photo-bias stability of the resulting thin-film transistors (TFTs). It was found that the threshold voltage of IGZO TFTs was negatively shifted without significant loss of the field-effect mobility and ION/OFF ratio with increasing hydrogen concentration, suggesting that interstitial hydrogen can act as a shallow donor. The hydrogen-doped device, however, showed more negative bias illumination stress (NBIS) instability than the undoped device, which cannot be explained by the simple shallow donor model. This NBIS-induced degradation might be associated with the increased tailing state distribution, which may stem from a hydrogen-related complex defect or compensation.

Investigation of defect generation and annihilation in IGZO TFTs during practical stress conditions: illumination and electrical bias

This investigation elucidates the influence of standalone-bias stress and standalone-illumination stress, and their combinatory effect on indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs). Each phenomenon associated with illumination (wavelengths of 410, 467, 532 and 632 nm) and bias (Vg = ±20 V; Vd = 0, 20 V) stresses is categorized individually. Wavelengths below 532 nm are responsible for ionized vacancy creation, carrier generation and interface state creation while only gate stresses of +20 V create excessive charge trap states. Failure conditions are identified as gate stresses of −20 V with 410 nm illumination. An improvement in the Ion/Ioff ratio from 106 to 107 is due to increased charge contribution for on currents, and trapping of holes at the intermetallic dielectric near the source–channel junction in the off region. Upon stress removal TFTs exhibit incomplete recovery due to slow trapping of excited carriers from dielectric layers and inability created by the passivation layer to absorb oxygen for vacancy regeneration. The low-temperature fabrication and optimized post-fabrication anneal have created reduced defect and vacancy densities that make the IGZO TFTs more stable than the previous generation TFTs.

Nonvolatile Memory With Extremely Low-Leakage Indium-Gallium-Zinc-Oxide Thin-Film Transistor

Emerging nonvolatile memory with an oxide–semiconductor-based thin-film transistor (TFT) using indium-gallium-zinc-oxide (IGZO) was developed. The memory is called nonvolatile oxide–semiconductor random access memory (NOSRAM). The memory cell of the NOSRAM (NOSRAM cell) consists of an IGZO TFT for data writing, a normal Si-based p-channel metal-oxide-semiconductor (PMOS) for data reading, and a cell capacitor for storing charge and controlling the PMOS gate voltage. The IGZO TFT and the cell capacitor are formed over the PMOS. Owing to extremely low-leakage-current characteristics of the IGZO TFT, the charge stored in the 2-fF cell capacitor is maintained for a long time. This long data retention realized innovative nonvolatile memory. The NOSRAM cell fabricated with the 0.8- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu$</tex> </formula> m process technology demonstrated an on/off ratio of 10 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$^{7}$</tex></formula> and an endurance over 10 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$^{12}$</tex> </formula> write cycles. In addition, NOSRAM with a memory capacity of 1 Mb was fabricated; the cell size was 12.32 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu{\hbox {m}}^{2}$</tex></formula> and the cell array size was 13.5 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\hbox {mm}}^{2}$</tex> </formula> . The 1-Mb NOSRAM achieved basic operation at 4.5 V or less, write operation at 150 ns/page, read distribution of data “1” with <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$3\sigma=\hbox{ 0.10~V}$</tex></formula> , and a data retention over 60 days at 85 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$^{\circ}\hbox{C}$</tex></formula> .

Self-Aligned Indium–Gallium–Zinc Oxide Thin-Film Transistor With Phosphorus-Doped Source/Drain Regions

Self-aligned top-gate amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with phosphorusdoped source/drain regions are developed in this letter. The resulting a-IGZO TFT exhibits high thermal stability and good electrical performance, including field-effect mobility of 5 cm2/V · s, a threshold voltage of 5.6 V, a subthreshold swing of 0.5 V/dec, and an on/off current ratio of 6 × 107. With scaling down of the channel length, good characteristics are also obtained with a small shift in the threshold voltage and no degradation in the subthreshold swing.

Mechanical bending of flexible complementary inverters based on organic and oxide thin film transistors

Flexible complementary inverters composed of p-channel pentacene thin-film transistors (TFTs) and n-channel amorphous indium gallium zinc oxide TFTs were fabricated on polymer substrates. The characteristics of the TFTs and inverters were evaluated at different bending radii. Throughout the bending experiments, the relationship between the performances of the inverters and the characteristics of the TFTs under mechanical deformation was analyzed. The mechanically applied strain led to a change in the voltage transfer characteristics of the complementary inverters, as well as the source–drain saturation current, field-effect mobility and threshold voltage of the TFTs. The switching threshold voltage of the fabricated inverters decreased with decreasing bending radius, which was related to changes in the field-effect mobility and the threshold voltage of the TFTs.

Dry etch damage and recovery of gallium indium zinc oxide thin-film transistors with etch-back structures

We studied the degradation and recovery of gallium indium zinc oxide (GIZO) thin-film transistors (TFTs) with etch-back (EB) structures during the fabrication process. EB GIZO TFTs were degraded by a source/drain dry etch process that formed a conductive surface layer. Their switching performance was recovered using an O2 ashing process that oxidized the conductive surface layer. In addition, a wet etch of the backside of the GIZO recovered the performance of the GIZO TFTs. EB GIZO TFTs with a field-effect mobility of 14.5cm2V−1s−1 and a subthreshold swing of 0.1V/dec were obtained without plasma treatment.

N2O plasma treatment suppressed temperature-dependent sub-threshold leakage current of amorphous indium–gallium–zinc-oxide thin film transistors

N2O plasma treatment suppressed the temperature-dependent sub-threshold leakage current of amorphous indium–gallium–zinc-oxide thin film transistors (a-IGZO TFTs). For untreated devices, the transfer curve exhibited abnormal electrical properties at high temperature. The abnormal electrical properties are explained by the energy band diagrams for both forward and reverse sweep. Above 400K, holes can be generated from trap-assisted transition, and drift to the source side which induces source barrier lowering. The source side barrier lowering enhances electron injection from the source to channel and causes an apparent sub-threshold leakage current. This phenomenon, which is experimentally verified, only appears in the device without N2O plasma treatment, but not in the device with N2O plasma treatment. The results suggested that the density of states for a-IGZO with N2O plasma treatment is much lower than that without plasma treatment.

Amorphous indium–gallium–zinc oxide thin-film transistors instability and stress evaluation by Stretched-Exponential model

We have successfully fabricated large sized amorphous indium–gallium–zinc-oxide based active-matrix liquid-crystal displays, which uses Molybdenum/Aluminum/Titanium as source/drain electrode. In this study, an oxygen-rich etch stop layer acts as the oxygen atom supplier and converts the titanium layer into titanium oxide layer, which is found to induce instability of the device. Sample without titanium oxide has an initial threshold voltage shift is less than ±0.1V after the repeatedly measuring over a period of two weeks. In addition, the IGZO based device demonstrated superior transfer characteristic. This paper established that the stability of the amorphous indium–gallium–zinc-oxide based active-matrix liquid-crystal display can be predicted by Stretched-Exponential model.

Effect of Channel Length on the Reliability of Amorphous Indium–Gallium–Zinc Oxide Thin Film Transistors

We investigated the effect of the channel length on the reliability of amorphous indium–gallium–zinc oxide (IGZO) thin-film transistors (TFTs) under the negative and positive gate bias stress. The threshold voltage (Vth) was barely changed at the channel length of 8 µm under the negative bias stress. When the channel length was 10 and 15 µm, Vth shifted negatively about 0.7 and 2.5 V. However, Vth shift did not depend on the channel length under the positive bias stress. Under the negative gate bias stress, the holes might not be accumulated uniformly at the channel. Because the band gap of IGZO is large, the effect of negative gate bias is decreased when the back interface is fixed by source/drain electrode. When the channel length decreases, the amount of accumulated hole decreases and Vth shift decreases.

Effect of Channel Length on the Reliability of Amorphous Indium–Gallium–Zinc Oxide Thin Film Transistors

Effect of Channel Length on the Reliability of Amorphous Indium–Gallium–Zinc Oxide Thin Film Transistors

Determination of flat band voltage in thin film transistors: The case of amorphous-indium gallium zinc oxide

Accurate knowledge of the gap density of states (DOS) is of paramount importance for process control and modelling of thin-film transistors (TFTs). We present here an approach for flat band determination, based on the combined analysis of transfer and capacitance-voltage characteristics. The method is independent from the DOS knowledge and requires no fitting parameters. Applied here to the case of amorphous indium gallium zinc oxide TFTs, our approach yields key device parameters, helping identification of the physical mechanisms responsible for device to device variations and degradation phenomena. It appears in particular capable to differentiate between interface and bulk effects.

Effect of channel widths on negative shift of threshold voltage, including stress-induced hump phenomenon in InGaZnO thin-film transistors under high-gate and drain bias stress

We investigated the degradation of indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) for various channel widths under high-gate and drain bias stress. The threshold voltage of IGZO TFT with wide-channel width (W > 100 μm) was significantly shifted. This included stress-induced hump-effect in a negative direction after the stress, whereas IGZO TFT with narrow-channel width (W < 100 μm) shifted in a positive direction. This phenomenon may be attributed to the hole trapping into the back-interface region. In order to enhance the reliability of IGZO TFTs, we developed and verified that the multiple-channel device showed better bias-temperature stability (ΔVTH: −0.1 V), whereas the single-channel device exhibited a −0.4 VΔVTH shift.

N2O Plasma表面处理对SiNx基IGZO-TFT性能的影响

Indium-gallium-zinc oxide thin film transistor(IGZO-TFT) was fabricated using N2O plasma treated SiNx film as gate insulator and room-temperature deposited IGZO film as active layer.Comparing with the conventional IGZO-TFT,the saturation mobility increased from 4.5 to 8.1 cm2·V-1·s-1,threshold voltage reduced from 11.5 to 3.2 V,threshold swing varied from 1.25 to 0.9 V/dec.The trap states in the N2O plasma treated IGZO-TFT is obviously smaller than that in the conventional IGZO-TFT.Our results indicate that using N2O plasma treated SiNx film as gate insulator is an effective approach for improving IGZO-TFT performance.

Migration of indium ions in amorphous indium–gallium–zinc-oxide thin film transistors

Electromigration of In in amorphous indium–gallium–zinc-oxide thin film transistors under repeated switching operation was investigated by analyzing the distribution of component elements. During the repeated switching operations up to 300 times, threshold voltage of this device increased gradually implying alteration to the internal device structures. Energy dispersive X-ray spectroscopy revealed noticeable redistribution of metallic components, especially In, in the channel layer beneath the source electrode during switching operations by the migration of metallic ions away from the source electrode, which is attributed to electromigrations similar to those observed in organic light emitting diodes having indium tin oxide electrodes.

Effect of annealing time on bias stress and light-induced instabilities in amorphous indium–gallium–zinc-oxide thin-film transistors

Thermal post annealing was employed for amorphous indium–gallium–zinc-oxide (a-IGZO) thin-film transistors (TFTs) to optimize performance by a low-temperature process, in view of the envisaged role of a-IGZO in plastic electronics. The effect of annealing time at T = 250 and 280 °C on bias stress and light-induced instabilities was investigated. We find that long anneals are effective in reducing bias stress and light-induced instabilities, as well as hysteresis in the transfer characteristics. The time constant τ for positive bias stress and for negative bias stress increases after long anneal, attaining for positive bias stress the value of 1.05 × 106 s, the highest so far reported for these devices. The beneficial effect of long anneals appears to be because of a reorganization of the amorphous network, resulting in a more stable configuration.

Electrical Properties and Stability of Dual-Gate Coplanar Homojunction DC Sputtered Amorphous Indium–Gallium–Zinc–Oxide Thin-Film Transistors and Its Application to AM-OLEDs

The electrical characteristics and stability of dual-gate (DG) coplanar homojunction amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) on glass substrates are described herein. In this device structure, both top gate (TG) and bottom gate are defined by lithography, allowing independent biasing when adjacent TFTs are present. The DG a-IGZO TFT demonstrates excellent electrical performance with subthreshold swing (SS) of 99 mV/dec, field-effect mobility of 15.1 , and on- off current ratio of . By applying various bias voltages on the TG electrode, it is found that the TFT threshold voltage can be controlled without any change of the SS and off current. Under conditions of negative bias temperature stress (BTS), the transfer curves of the TFT exhibit negligible shifts after 10 000 s. Larger shifts are observed under conditions of a positive BTS. Finally, the application of this DG device to active-matrix organic light-emitting displays is suggested.