Indium Gallium Zinc Oxide Thin-film Transistors Research Articles

The effect of a zinc–tin-oxide layer used as an etch-stopper layer on the bias stress stability of solution-processed indium–gallium–zinc-oxide thin-film transistors

We investigated the bias stress stability of solution-processed indium–gallium–zinc-oxide thin-film transistors (IGZO TFTs) using zinc–tin-oxide (ZTO) as the etch-stopper layer, the so-called dual-active-layered ZTO/IGZO TFT (DALZI TFT). The DALZI TFT can use a low-cost back-channel-etch structure because of the high chemical stability of the upper ZTO layer. The DALZI TFT exhibited only a threshold voltage shift of −1.86 V under negative bias illumination stress (NBIS) conditions (stress time = 1000 s), while the unpassivated IGZO TFT suffered from a threshold voltage shift of −19.59 V under NBIS conditions (stress time = 1000 s). The superior bias stress stability of the DALZI TFT is attributed not only to the densification effect by the multi-stacking process but also to the lower sensitivity to ambient gases (e.g., oxygen and water vapour) due to the low oxygen vacancy in the upper ZTO layer.

The effect of nitrous oxide plasma treatment on the bias temperature stress of metal oxide thin film transistors with high mobility

In this work, the effects of nitrous oxide plasma treatment on the negative bias temperature stress of indium tin zinc oxide (ITZO) and indium gallium zinc oxide (IGZO) thin film transistors (TFTs) were reported. ITZO TFTs were more suitable for the back channel etched-type device structure because they could withstand both Al- and Cu-acid damage. The initial threshold voltage range could be controlled to within 1V. The root cause of poor negative bias temperature stress for ITZO was likely due to a higher mobility (∼3.3 times) and more carbon related contamination bonds (∼5.9 times) relative to IGZO. Finally, 65″ active-matrix organic light-emitting diode televisions using the ITZO and IGZO TFTs were fabricated.

In-Situ Metallic Oxide Capping for High Mobility Solution-Processed Metal-Oxide TFTs

Transparent and highly conductive indium-zinc oxide (IZO) was utilized as a metallic capping layer in solution-processed indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs) to enhance their electrical performance. By applying an in-situ metallic oxide (IZO) as a capping layer, which can be monolithically patterned with source/drain electrodes, the IGZO TFTs have shown enhanced mobility as high as ~60 cm2/V-s, subthreshold slope of <;0.1 V/decade, and threshold voltage of ~1-2 V. We found that metallic capping layers having work function lower than that of the channel material can induce a significant reduction in series resistance and enhance the apparent field-effect mobility of the device.

Light-induced hysteresis and recovery behaviors in photochemically activated solution-processed metal-oxide thin-film transistors

In this report, photo-induced hysteresis, threshold voltage (VT) shift, and recovery behaviors in photochemically activated solution-processed indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs) are investigated. It was observed that a white light illumination caused negative VT shift along with creation of clockwise hysteresis in electrical characteristics which can be attributed to photo-generated doubly ionized oxygen vacancies at the semiconductor/gate dielectric interface. More importantly, the photochemically activated IGZO TFTs showed much reduced overall VT shift compared to thermally annealed TFTs. Reduced number of donor-like interface states creation under light illumination and more facile neutralization of ionized oxygen vacancies by electron capture under positive gate potential are claimed to be the origin of the less VT shift in photochemically activated TFTs.

Effects of electron trapping and interface state generation on bias stress induced in indium–gallium–zinc oxide thin-film transistors

The electrical characteristics of bias temperature stress (BTS) induced in amorphous indium–gallium–zinc oxide thin-film transistors (a-IGZO TFTs) were studied. We analyzed the threshold voltage (VTH) shift on the basis of the effects of positive bias temperature stress (PBTS) and negative bias temperature stress (NBTS), and applied it to the stretched-exponential model. Both stress temperature and bias are considered as important factors in the electrical instabilities of a-IGZO TFTs, and the stretched-exponential equation is well fitted to the stress condition. VTH for the drain current–gate voltage (IDS–VGS) curve and flat-band voltage (VFB) for the capacitance–voltage (C–V) curve move in the positive direction when PBTS is induced. However, in the case of NBTS, they move slightly in the negative direction. To clarify the VTH shift phenomenon by electron and hole injection, the average effective energy barrier (Eτ) is extracted, and the extracted values of Eτ under PBTS and NBTS are about 1.33 and 2.25 eV, respectively. The oxide trap charges (Not) of PBTS and NBTS calculated by C–V measurement are 4.4 × 1011 and 1.49 × 1011 cm−2, respectively. On the other hand, the border trap charges of PBTS and NBTS are 6.7 × 108 and 1.7 × 109 cm−2, respectively. This indicates that the increased interface trap charge, after PBTS is induced, captures electrons during detrap processing from the border trap to the conduction band, valence band, and interface trap.

The Dependence of Carrier Distribution on Gate Capacitance of α-IGZO TFTs

The capacitance-voltage (C–V) characteristics of inverted staggered amorphous indium–gallium–zinc-oxide thin film transistors (α-IGZO TFTs) with various dimensions are investigated by physics-based technology computer aided design (TCAD) simulation. For gate bias lower than the threshold voltage of the TFT, the electrons in the channel region are nearly fully depleted. It causes that the total gate capacitance is determined by the overlap region of gate, α-IGZO, and source/drain metals. When the applied gate bias is higher than the threshold voltage, the high electron density channel with density of ~6 × 1017 cm-3 and thickness of ~3-4 nm is observed near the interface of α-IGZO and gate dielectric. It results that the total gate capacitance is dominated by the gate to channel overlap. Quantitative analysis of the carrier distribution and energy band structures are utilized to study the physical mechanism underlying the C–V characteristics of the α-IGZO TFTs.

Large-scale complementary macroelectronics using hybrid integration of carbon nanotubes and IGZO thin-film transistors.

Carbon nanotubes and metal oxide semiconductors have emerged as important materials for p-type and n-type thin-film transistors, respectively; however, realizing sophisticated macroelectronics operating in complementary mode has been challenging due to the difficulty in making n-type carbon nanotube transistors and p-type metal oxide transistors. Here we report a hybrid integration of p-type carbon nanotube and n-type indium-gallium-zinc-oxide thin-film transistors to achieve large-scale (>1,000 transistors for 501-stage ring oscillators) complementary macroelectronic circuits on both rigid and flexible substrates. This approach of hybrid integration allows us to combine the strength of p-type carbon nanotube and n-type indium-gallium-zinc-oxide thin-film transistors, and offers high device yield and low device variation. Based on this approach, we report the successful demonstration of various logic gates (inverter, NAND and NOR gates), ring oscillators (from 51 stages to 501 stages) and dynamic logic circuits (dynamic inverter, NAND and NOR gates).

Self-aligned indium–gallium–zinc oxide thin-film transistors with SiNx/SiO2/SiNx/SiO2 passivation layers

Self-aligned top-gate amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs) with SiNx/SiO2/SiNx/SiO2 passivation layers are developed in this paper. The resulting a-IGZO TFT exhibits high reliability against bias stress and good electrical performance including field-effect mobility of 5cm2/Vs, threshold voltage of 2.5V, subthreshold swing of 0.63V/decade, and on/off current ratio of 5×106. With scaling down of the channel length, good characteristics are also obtained with a small shift of the threshold voltage and no degradation of subthreshold swing. The proposed a-IGZO TFTs in this paper can act as driving devices in the next generation flat panel displays.

Investigating electron depletion effect in amorphous indium–gallium–zinc-oxide thin-film transistor with a floating capping metal by technology computer-aided design simulation and leakage reduction

The electron distribution in an amorphous indium–gallium–zinc-oxide (a-IGZO) thin-film transistor (TFT) with a floating metal–semiconductor (MS) back interface is analyzed using a technology computer-aided design (TCAD) model. The channel geometry (i.e., length and thickness) effect is carefully investigated. At a high work function (i.e., 5 eV) of the capping metal, electrons inside a-IGZO are mostly removed by the capping metal (electron depletion effect). The depletion of the IGZO film leads to an increase in threshold voltage in a-IGZO TFT. TCAD simulation reveals that increasing channel length and decreasing IGZO thickness significantly enhance such an electron depletion effect. Finally, the electron depletion effect is applied to a-IGZO TFT with a high-conductivity IGZO film to greatly suppress the leakage current by over 5 orders.

An a-InGaZnO TFT Pixel Circuit Compensating Threshold Voltage and Mobility Variations in AMOLEDs

In this paper, we proposed a novel voltage-programmed pixel circuit based on amorphous indium gallium zinc-oxide thin-film transistor (a-InGaZnO TFT) for active-matrix organic light-emitting display (AMOLED) with an enhanced electrical stability and uniformity. Through an extensive simulation work based on a-InGaZnO TFT and OLED experimental data, we confirm that the proposed pixel circuit can compensate for both mobility variation and threshold voltage shift of the driving TFT.

Low operating voltage InGaZnO thin-film transistors based on Al2O3 high-k dielectrics fabricated using pulsed laser deposition

Low-voltage-driven amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) with an Al2O3 dielectric were fabricated on a Si substrate by using pulsed laser deposition. Both Al2O3 and IGZO thin films are amorphous, and the thin films have very smooth surfaces. The Al2O3 gate dielectric exhibits a very low leakage current density of 1.3 × 10−8 A/cm2 at 5 V and a high capacitance density of 60.9 nF/cm2. The IGZO TFT with a structure of Ni/IGZO/Al2O3/Si exhibits high performance with a low threshold voltage of 1.18 V, a high field effect mobility of 20.25 cm2V−1s−1, an ultra small subthreshold swing of 87 mV/decade, and a high on/off current ratio of 3 × 107.

Low-frequency noise in amorphous indium–gallium–zinc oxide thin-film transistors with an inverse staggered structure and an SiO2 gate insulator

We report the low-frequency noise (LFN) behavior of amorphous indium–gallium–zinc oxide thin-film transistors with an inverse staggered structure and an SiO2 gate insulator. The normalized noise power spectral density depended on channel length, L, with the form 1/L2, and on the gate bias voltage, VG, and threshold voltage, VTH, with the form 1/(VG − VTH)β where 1.5 < β < 2.1. In addition, the scattering constant α was less than 105 Ω. These results suggest that the contact resistance has a significant role in the LFN behavior and the charge-carrier density fluctuation is the dominant origin of LFN.

Defect generation in amorphous-indium-gallium-zinc-oxide thin-film transistors by positive bias stress at elevated temperature

We report on the generation and characterization of a hump in the transfer characteristics of amorphous indium gallium zinc-oxide thin-film transistors by positive bias temperature stress. The hump depends strongly on the gate bias stress at 100 °C. Due to the hump, the positive shift of the transfer characteristic in deep depletion is always smaller that in accumulation. Since, the latter shift is twice the former, with very good correlation, we conclude that the effect is due to creation of a double acceptor, likely to be a cation vacancy. Our results indicate that these defects are located near the gate insulator/active layer interface, rather than in the bulk. Migration of donor defects from the interface towards the bulk may also occur under PBST at 100 °C.

Influence of Al2O3 Gate Dielectric on Transistor Properties for IGZO Thin Film Transistor

Introduction Recently, indium-gallium-zinc oxide (IGZO) thin film transistor (TFT) has attracted attention for their applications to active matrix liquid crystal display and active matrix organic light-emitting diode. As a typical IGZO TFT, the Si3N4/SiO2 structure has been widely developed. To archive the requirements of a low leakage current and a high k value, several high-k dielectrics, such as Al2O3, HfO2, Ta2O5, ZrO2 and Y2O3 have been intensively investigated as gate dielectric [1-3].Hence, we paid attention to the Al2O3 as gate dielectrics because of its low leakage current. However, it is well known that Al2O3 film, which fabricated by conventional ALD at low temperature, contains some defects [4] and results in mobility degradation and abnormal threshold voltage (Vth) shift. Plasma-enhanced ALD (PE-ALD) is expected to reduce impurities and increases the film density because of oxidation reaction.In this paper, we report on electrical performance of IGZO TFTs with Al2O3 dielectrics grown by PE-ALD process. We especially discuss about influence of quality of Al2O3 films on transistor properties. Experimental Bottom-gate-type IGZO TFT with Al2O3 dielectric was fabricated as follows. A 30-nm-thick SiO2 layer was fabricated on p++-Si as a back gate electrode. Next, the Al2O3 layer was deposited on SiO2/Si substrate by the PE-ALD method at 300 °C using TMA precursor and plasma oxygen gas. The thicknesses of the Al2O3 were varied to 5, 10, 15 and 25 nm by changing ALD cycles. A 50-nm-thick IGZO layer was subsequently deposited at room temperature by DC-sputtering using an IGZO target (In2O3:Ga2O3:ZnO = 1:1:1 mol%). Finally, the Au (100 nm) layers as source/drain electrodes were deposited by thermal evaporation method. The channel length and width of the TFTs are 50 and 1200 mm, respectively. Post annealing was performed at 300 °C for 1 h. In addition, Pt/Al2O3/SiO2 MOS capacitor was prepared to examine quality of Al2O3 film. A 4-nm-thick SiO2 layer was fabricated on p-Si substrate, and subsequently Al2O3 films with 5-25 nm thicknesses were deposited by PE-ALD at 300 °C. Finally, Pt electrode (150 nm) was deposited on Al2O3 films by DC-sputtering. Results and Discussion Figure 1 shows transfer characteristics (Id-Vg) of the IGZO TFTs with Al2O3 dielectrics. Note that saturated mobility of TFT without Al2O3 is slightly larger than those of TFTs with Al2O3 dielectrics. Furthermore, the TFTs with Al2O3 dielectrics show almost same saturated mobility regardless of Al2O3 thickness. The positive Vth shift (~1V) in the TFTs with Al2O3 dielectrics significantly appears compared to that of TFT without Al2O3 dielectric. No thickness dependence of Al2O3 on Vth shift is clear.The Vfb change as a function of the equivalent oxide thickness (EOT) of the Al2O3 films for Pt/Al2O3/SiO2 MOS capacitors is shown in Fig. 2. It is clear that these data satisfy the linear equation. This indicates that the fixed charge in Al2O3 film, which deposited by PE-ALD process, is a negligible small. The fixed charge (QIL) at Al2O3/SiO2 interface can be obtained the following equation:Vfb = (Φm,eff – ΦSi) – QIL / εsio2 × EOTAl2O3 (1)where fm,eff, fSi, eSiO2 and EOTAl2O3 are the effective work function of the gate electrode on Al2O3, the Fermi-level of silicon substrate, the dielectric constant of SiO2 and EOT of Al2O3 film, respectively. The QIL value was estimated about -2.0 × 1012/cm2.Hence, when the fixed charge is assumed to occur at SiO2/Si interface for Metal/SiO2(30nm)/Si capacitor, the QIL value of -2.0 × 1012/cm2 leads to positive Vfb shift of 1.5V. We notice that the positive Vth shift of ~1V in the TFTs with Al2O3 dielectrics might be due to the fixed charge at Al2O3/SiO2 interface. Conclusions We have systematically investigated transistor properties of Bottom-gate-type IGZO TFTs with Al2O3 dielectric grown by PE-ALD process. We found that mobility of TFTs with Al2O3 dielectrics decreases slightly irrespective of the Al2O3 thickness. Note that the positive Vth shift of TFTs with Al2O3 dielectrics is dominantly due to the fixed charge at Al2O3/SiO2 interface from data of Pt/Al2O3/SiO2 capacitors.

TFT‐based, multi‐stage, active pixel sensor for alpha particle detection

A multi-stage thin film transistor (TFT)-based active pixel sensor (APS), capable of successfully detecting small impulses of charge resulting from incident alpha particle strikes, is presented. Detection of alpha particles is important in the field of neutron detection, where fully integrated thin-film-based detectors are an attractive alternative to conventional 3He-based proportional counters owing to their low-cost and large-area scaling capability, combined with the use of readily available materials. A typical TFT process, however, produces only N-type devices with low electron mobilities – making high-gain CMOS amplifier designs unfeasible. The disadvantages of using a TFT-only APS design are mitigated by cascading multiple low-gain TFT amplifiers, which results in a higher overall pixel gain – subsequently allowing for the successful detection and readout of alpha particle strikes. Presented is a new APS fabricated in an indium gallium zinc oxide TFT process is presented, and successful initial alpha response measurements are reported.

Investigation of LaAlO 3 /ZrO 2 / a ‐InGaZnO thin‐film transistors using atmospheric pressure plasma jet

Amorphous indium–gallium–zinc-oxide thin-film transistors (a-IGZO-TFTs) with the LaAlO3/ZrO2 gate dielectric stack employing a novel atmospheric pressure plasma jet process that results in small subthreshold swing and low threshold voltage are proposed and fabricated. The influence of post-deposition annealing (PDA) temperature on LaAlO3/ZrO2 gate dielectric stack and device performance was investigated. The equivalent oxide thickness of the LaAlO3/ZrO2 dielectric stack decreases from 11.5 nm without annealing to 7 nm after a 500°C annealing was applied. The LaAlO3/ZrO2/a-InGaZnO TFT with a 500°C annealing exhibits a small subthreshold swing of 77 mV·dec−1, a high field-effect mobility of 9 cm2·V−1·s−1 and an excellent current ratio of 1.8 × 107, which could be attributed to the improved gate dielectric quality by the PDA. The LaAlO3/ZrO2/a-InGaZnO TFTs with excellent gate control ability allow the device to operate at a low operating voltage with low power consumption.

Impact of Annealing on Contact Formation and Stability of IGZO TFTs

Oxide semiconductors are candidate materials to replace amorphous silicon in thin-film transistors (TFTs) for LCD and OLED backplanes where the demand on performance is increasing. Indium-Gallium-Zinc-Oxide (IGZO) has shown promise because it exhibits high electron mobility and can utilize the existing fabrication infrastructure for flat-panel display manufacturing. However the acceptance of IGZO requires exceptional uniformity and stability in device performance. The necessity to anneal sputtered IGZO for improved device operation has been widely established; however the temperature, gas ambient, and process integration details vary. In this work, bottom-gate top-contact TFTs are fabricated using sputtered IGZO. Molybdenum and aluminum were investigated as contact metals which defined the working source/drain electrodes. Annealing processes applied either before or after metal deposition were investigated. Annealing was done at 400 °C in various gas ambients including air, oxygen, nitrogen, forming gas (5% H2 in N2) and vacuum. Channel passivation materials including SiO2 and Al2O3 were also investigated. The annealing ambient and arrangement of process steps were found to have a significant influence on the contact behavior and the uniformity and stability of electrical characteristics. These details have a significant impact on circuit operation, which will be discussed along with results of test circuits including inverters and ring oscillators.

Impact of Annealing on Contact Formation and Stability of IGZO TFTs

Annealing processes were investigated on Indium-Gallium-Zinc-Oxide (IGZO) thin-film transistors (TFTs). Molybdenum and aluminum were used as contact metals which defined the working source/drain electrodes. Annealing was performed either pre-metal or post-metal deposition, in various gas ambients including air, oxygen, nitrogen, forming gas (5% H2 in N2) and vacuum. Pre-metal annealing in air ambient resulted in similar I-V characteristics on Mo-contact and Al-contact devices. A post-metal anneal for Mo-contact devices resulted in higher on-state current and steeper subthreshold slope, whereas the Al-contact devices experienced severe degradation suggesting the formation of an AlOx interface layer. A post-metal anneal at 400 °C in N2 followed by an air ambient ramp-down yielded Mo-contact devices with SS ~ 200 mV/dec, channel mobility µsat ~ 8.5 cm2/V∙s, and improved stability over other anneal conditions.

电极材料对IGZO薄膜晶体管性能的影响

Indium gallium zinc oxide thin film transistors(IGZO-TFTs) with bottom-gate top structure were fabricated on n-type silicon substrates using radio frequency(RF) magnetron sputtering method.Three kinds of metal material such as Au,Cu,and Al were used to fabricate electrode,respectively,and the effects of different electrode materials on IGZO TFT performance were investigated. The output characteristic and transfer characteristic of the TFT devices were tested. The best performance was obtained when Au was used to fabricate electrode,its saturation output current was 17. 9 μA,and on-off current ratio was up to 1. 4 ×106. In addition,the contact characteristics between three kinds of electrodes and IGZO thin film were analyzed based on their work function. Au electrode had the smallest contact resistance of these three metal according to the TLM(transmission line model) theory.

Charge emission induced transient leakage currents of a ‐Si:H and IGZO TFTs on flexible plastic substrates

The transient off-state thermal emission leakage currents of hydrogenated amorphous silicon ( a -Si) and indium gallium zinc oxide (IGZO) metal oxide thin-film transistors (TFTs) fabricated on flexible plastic substrates have been examined for the first time. The transient leakage currents resulting from the detrapping of charge in the TFT active layer were observed to decay in a 1/ t power law behaviour from 2 to 100 ms after switching the TFT test structures off. The results demonstrated a uniform density of states for both types of thin-film devices and an ~1.3× higher transient leakage current for the IGZO TFTs. It was also shown that the observed transient leakage currents result in a shot noise at the input to the data-line charge integration amplifiers that is 20 × larger than predicted by using only the conventional static DC TFT leakage current measurements.