Indium Gallium Zinc Oxide TFTs Research Articles

Electrical Characteristics of Atmospheric-Pressure Plasma Enhanced Chemical Vapor Deposition Fabricated Indium-Gallium-Zinc-Oxide Thin-Film Transistors with In-Situ Hydrogenation and Neutral Beam Oxidation

Low temperature poly-crystalline silicon thin-film transistors (LTPS-TFTs) and indium-gallium-zinc-oxide TFTs (IGZO-TFTs) are potential candidates for future technology of various displays. Due to its simple manufacturing process, low cost and good uniformity, IGZO-TFTs have been developed as main stream display technology. From the viewpoint of device electrical characteristics, a-IGZO TFTs have better field-effect mobility (>10 cm2/V * s), larger Ion/Ioff ratio (>106), smaller subthreshold swing (S.S) and good stability. In this study, atmospheric-pressure PECVD (AP-PECVD) is used to deposit a-IGZO active layer, during the deposition process In-Situ hydrogenation is applied to enhance the layer characteristics. Also, the layer is then surface oxidation treated by neutral beam system (NBS). The optimal TFTs device characteristics is reached with In-Situ hydrogenation of H2 90 sccm, and surface oxidation of 400 W NBS treatment. The field-effect mobility is 34.05 cm2/V * s, threshold voltage is 1.74 V, subthreshold swing is 62 mV/decade, and current ratio Ion/Ioff is 2.04×107. Compared with conventional plasma, NBS used in this study provides charge-free plasma which could enhance device electric characteristics.

(Digital Presentation) High Performance Back-Channel-Etch Igzo TFT with Self-Passivate HfO2 By Backside Exposure Technology

Recently, amorphous oxide semiconductor (AOS)-based TFTs have drawn much attention for the backplane technologies of the ultra-high resolution TFT-LCDs and AMOLEDs [1-2]. To overcome the degradation of electrical characteristics caused by the ambient, a passivation layer capsulation is proposed to solve the problem. In this work, a capping layer of HfO2 film is studied acting as both a passivation layer and an etch stop layer for TFT device structure with the back channel etching (BCE) process. The BCE type of indium-gallium-zinc-oxide (IGZO) TFT is successfully demonstrated with a self-aligned backside exposure method for the photo-mask reduction, which not only decreases the complexity of the device fabrication but also lowers the manufacturing cost [3-4].ExperimentAmorphous IGZO TFTs with a bottom gate staggered structure were fabricated in this work. A layer of metallic Mo thin film was first deposited on a glass substrate by DC sputtering and patterned as the gate electrode. It was followed by the deposition of HfO2 film as gate insulator and a-IGZO as channel layer by RF sputtering. Besides, a HfO2 capping layer was deposited on top of IGZO channel layer as the passivation and etch stop layer (ESL). The self-aligned backside exposure process was then implemented to pattern the IGZO channel layer and ESL simultaneously. And Mo source/drain (S/D) electrodes were formed to finish the BCE a-IGZO TFT manufacture. The IGZO TFT was also fabricated with a lift-off S/D process. Firstly, the exposure of the S/D area patterns was executed by removing the photoresist covered on the top of the S/D in the development process. Then, a layer of Mo film was deposited by DC sputtering, and followed by performing the lift-off process in acetone for the photoresist stripping. Thus, the open hole on S/D pattern areas will be filled with Mo and form S/D electrodes. The manufacture of lift-off S/D IGZO TFT was completed, and it will be compared with the characteristics of BCE a-IGZO TFT.Result and DiscussionThe experimental results have shown that the HfO2 capping layer can keep IGZO channel from exposing to oxygen and hydrogen in the atmosphere. Also, HfO2 capping layer could be acting as etching stop layer to protect IGZO channel from the damage during BCE process. As compared with a lift-off S/D process without BCE damage, the nearly non-degraded BCE a-IGZO TFT in this work demonstrates the compatible performance such as threshold voltage of 0.03 V, an approximately ideal sub-threshold swing of 65.8 mV/dec., field-effect mobility of 9.91 cm2/V·s, on/off current ratio of 6×107 (at VD=0.1 V), and extremely low electrical hysteresis loop of ~ 0 mV was obtained successfully. Furthermore, the self-aligned process with backside exposure could lower the cost for device fabrication by decreasing the number of photomasks, and the BCE process have the ability for channel size scaling. With the excellent characteristics mentioned above, the BCE a-IGZO TFT is highly applicable to the emerging high-resolution display technologies.Reference[1] T. Kamiya, K. Nomura , and H. Hosono, Science and Technology of Advanced Materials, vol. 11, no. 4, pp. 044305, 2010.[2] P. Y. Kuo, C. M. Chang, I. H. Liu, and P. T. Liu, Scientific reports, vol. 9, no. 1, pp. 1-7, 2019.[3] Y. Kuo, Journal of The Electrochemical Society, vol. 138, no. 2, pp. 637, 1991.[4] N. Münzenrieder, P. Voser, L. Petti, C. Zysset, L. Büthe, C. Vogt, G. A. Salvatore, and G. Tröster, IEEE Electron Device Letters, vol. 35, no. 1, pp. 69, 2014. Figure 1

Surface Energy Characterized Self-Assembled Monolayer for Improving Electrical Stability of IGZO Thin Film Transistor

The surface energy characterized self-assembled monolayer (SAM) for improving the electrical stability of Indium gallium zinc oxide (IGZO) semiconductor is proposed. In order to compare properly, the head group and body group were fixed with silane and alkyl chains, respectively, and only the functional group was changed, NH2, CH3, CF3 respectively. The surface energies of NH2, CH3 and CF3 functional group SAMs were measured as 50 mJ/m2, 29 mJ/m2 and 24 mJ/m2, respectively by Owens-Wendt model with the contact angle values. The SAM treatment for IGZO TFT backchannel passivation amazingly improves the positive bias stability (PBS) and clockwise hysteresis stability to the very similar tendency by making oxygen-related molecules difficult to be adsorbed onto IGZO backchannel depending on the surface energies of SAMs. In case of NH2 SAM treated IGZO TFT, the PBS improvement ratio by the treatment was 78.7 % (from 11.6 V to 2.5 V) and the clockwise hysteresis improvement ratio was 70.5 % (from 0.8 V to 0.2 V). Furthermore, it was confirmed that the better result was obtained at a lower surface energy functional group. The IGZO TFT PBS further improved 87.0 % after the lowest surface energy with CF3 SAM treatment (from 2.5 V to 0.3 V), and the IGZO TFT clockwise hysteresis was also further enhanced 52.2 % (from 0.2 V to 0.1 V) without any deterioration of TFT characteristics. The field-effect mobility and sub-threshold swing of the IGZO reference TFT with non-SAM treated were 11.2 cm2 / Vs and 0.2 V / decade, respectively. NH2, CH3, and CF3 functional group SAM treated IGZO TFTs show the field-effect mobility of 13.5 cm2 / Vs, 13.0 cm2 / Vs, 13.1 cm2 / Vs, and sub-threshold swing of 0.18 V / decade, 0.20 V / decade, 0.18 V / decade, respectively. As a result, the simple and economical SAM treatment with lower surface energy functional group surface at same head and body group can be a better way in passivating and protecting the IGZO backchannel region from oxygen molecules in the atmosphere in order to enhance the electrical stability of IGZO TFT. Figure 1

Lowering the Trap-State Density of Transparent Amorphous Oxide Semiconductor-Based Thin Film Transistors Through Microwave Irradiation.

In this study, a low-thermal-budget microwave irradiation (MWI) technique was applied as a post-deposition annealing (PDA) process to lower the trap densities that exist in transparent amorphous oxide semiconductor thin film transistors (TAOS TFTs). As channel layers of TAOS TFTs, two types of indium gallium zinc oxide (IGZO) with different compositions as well as aluminum zinc tin oxide (AZTO) and zinc oxide (ZnO) thin films were deposited with various thicknesses through radio frequency (RF) magnetron sputtering at 25°C. Cost-effective and energy-efficient MWI was conducted to enhance the electrical performance of transistors by removing traps and defects. The electrical characteristics of IGZO (1:1:1 and 4:2:3)-, ZnO-, and AZTO-based TFTs treated by MWI were evaluated by measuring the transfer curves. In particular, the relation between the interface trap density (Dit) and bulk trap density (Nt) of microwave-irradiated TFTs was quantitatively evaluated by the subthreshold swing (SS) variation based on channel thickness. The results indicated that of the four types of channel layers, the performance of IGZO (4:2:3) TFTs was the best and that of AZTO TFTs was the worst, in terms of electrical properties such as on/off current ratio, mobility SS, and trap density. In particular, it was demonstrated that the trap density of MWI-treated TAOS TFTs was much lower than that of conventional furnace annealing (CFA)-treated devices. Despite the short annealing duration of a few minutes, the MWI more effectively reduced the trap sites than did the furnace treatment, and significantly enhanced the electrical properties of the TAOS TFTs. It is expected that high-performance TAOS TFTs can be fabricated by applying MWI, which is a highly efficient and low-thermal-budget annealing method, to the PDA process and can thus reduce trap density.

Interpretation of Donor Activation in Boron and Argon Implanted Self-Aligned Bottom-Gate IGZO TFTs

This work provides an interpretation of donor activation in self-aligned bottom-gate (SA-BG) Indium-Gallium-Zinc Oxide (IGZO) TFTs with ion-implantation of boron (11B+) and argon (40Ar+) species as the source/drain treatment. Device fabrication strategies that switched the order of ion implantation and passivation annealing processes were investigated. Hypotheses in the mechanisms involved with donor activation have been developed from observed similarities and differences in the electrical operation of SA-BG TFTs fabricated using both implant-last and anneal-last approaches. Results suggest a defect-induced mechanism is responsible for donor behavior associated with argon implantation, whereas donor behavior associated with boron is attributed to the formation of an electrically active donor species involving chemical bonding. A detailed discussion on developed arguments arrived at through analysis of TFT electrical characteristics is presented. Materials analysis in support of the interpretation and associated arguments is in progress.

Improvement of Electrical Performance by Neutron Irradiation Treatment on IGZO Thin Film Transistors

The effects of the neutron irradiation treatment on indium-gallium-zinc oxide (IGZO) are investigated as a function of the neutron irradiation time. With an increase in neutron irradiation time, the oxygen vacancies associated the oxygen deficient states increase, and both shallow and deep band edge states below the conduction band also increase. Moreover, the conduction band offset continuously decreases because of the increase in the oxygen vacancies with increasing the neutron irradiation time. In IGZO TFTs with the neutron irradiation time for 10 s, superior device performance demonstrates such as the lower threshold voltage, higher field effect mobility, smaller sub-threshold gate swing, larger on-off current ratio, and improved bias stability, comparing those of other IGZO TFTs.

Self-Aligned IGZO TFTs with Boron Implanted Source/Drain Regions

This study investigates techniques to realize self-aligned Indium-Gallium-Zinc Oxide (IGZO) TFTs that are not subject to gate-source/drain misalignment due to overlay error or process bias. The working source/drain electrodes in IGZO TFTs can be direct metal contact regions to the IGZO, however this typically requires several microns of gate overlap in order to provide ohmic behavior with minimal series resistance and ensure tolerance to overlay error. Boron ion implantation has been demonstrated to successfully dope IGZO, resulting in an estimated electron concentration level n ~ 1019 cm-3. Top-gate co-planar TFTs were fabricated using boron implantation to selectively form IGZO:B n+ regions, with the channel region masked by the gate electrode. A novel lithographic strategy to extend this technique to the more traditional bottom-gate staggered TFT configuration has also been explored which utilizes top-side exposure rather than a back-side through-glass exposure, and would enable self-aligned devices on non-transparent substrates. Details of the self-aligned top-gate TFTs, and the top-side exposure lithographic process will be presented.

Plasma Polymerization Enabled Polymer/Metal–Oxide Hybrid Semiconductors for Wearable Electronics

A facile fabrication of polymer/metal-oxide hybrid semiconductors is introduced to overcome the intrinsically brittle nature of inorganic metal-oxide semiconductors. The fabrication of the hybrid semiconductors was enabled by plasma polymerization of polytetrafluoroethylene (PTFE) via radio frequency magnetron sputtering process which is highly compatible with metal-oxide semiconductor manufacturing facilities. Indium-gallium-zinc oxide (IGZO) and PTFE are cosputtered to fabricate PTFE-incorporated IGZO thin-film transistors (IGZO:PTFE TFTs) and they exhibit a field-effect mobility of 10.27 cm2 V-1 s-1, a subthreshold swing of 0.38 V dec-1, and an on/off ratio of 1.08 × 108. When compared with conventional IGZO TFTs, the IGZO:PTFE TFTs show improved stability results against various electrical, illumination, thermal, and moisture stresses. Furthermore, the IGZO:PTFE TFTs show stable electrical characteristics with a threshold voltage ( Vth) shift of 0.89 V after 10 000 tensile bending cycles at a radius of 5 mm.

A 2D Empirical Model for On-State Operation of Scaled IGZO TFTs Exemplifying the Physical Response of TCAD Simulation

The existence of band-tail states (BTS) in indium-gallium-zinc oxide (IGZO) results in TFTs with electrical characteristics that are not well represented by conventional device models. Common parameters such as threshold voltage and channel mobility that are extracted from measured electrical characteristics can be misrepresentative due to discrepancies between the chosen operational model and the underlying device physics. There have been several reports of analytical solutions for the electrostatic operation of IGZO transistors that have been motivated by model accuracy and efficiency in circuit simulation. While developed compact models may be physics based, the addition of fitting parameters to exceedingly complex solutions results in a loss of physical connection and limits the applications to circuit design. Similarly fitting parameters can be added to conventional SPICE models used by device researchers; however the modifications will only have merit if the physical connection to device operation is maintained. This is especially important as channel lengths are scaled and device structures exhibit short channel effects (SCE). A device model for the on-state operation of accumulation-mode IGZO TFTs which maintains consistency with the gradual channel approximation was recently developed and presented as an adaptation of a Level 2 SPICE model. The model accounts for the ionization and deionization of acceptor-like BTS, as controlled by both the gate and drain bias conditions. Long-channel TFT I-V characteristics are well represented by the physical channel length and width along with five operational parameters shown in equations (1-4). The model fit for a representative long-channel device is virtually indistinguishable from measured data, as shown in Fig. 1. The threshold voltage (VT) and field-independent channel mobility (μo) have traditional meaning, whereas the introduced BTS parameters (θBTS, VBTS, α) regulate the level of free channel charge and account for spreading of the output conductance. Model parameters were extracted using regression analysis on output characteristics with fine gate voltage increments. Parameter values for the representative device are shown in Table 1, with the resulting threshold voltage and channel mobility values consistent with TCAD analogs. The ηG and ηD model elements preserve the distinction between the gate-impressed and drain-impressed response, respectively, with dissociation from an effective channel mobility. This distinction is important to avoid confounding with SCE as devices are scaled and E-fields are increased. This work extends the device model to represent long-channel and scaled devices (i.e. L ≤ 3 μm) with bottom-gate (BG) and double-gate (DG) electrode configurations. BG and DG TFTs have different levels of gate control and influence over BTS, which becomes more pronounced as the channel length is decreased. For scaled devices, channel length modulation as well as conventional field-effect mobility parameters that account for normal-field degradation and velocity saturation have been added. TCAD simulation is used to discriminate between the influence of BTS and SCE. The physical correlation of the model to device operation is demonstrated through comparisons with measured characteristics and TCAD simulation. Figure 1

12‐4: Late-News Paper: Reliability Improvement of IGZO and LTPS Hybrid TFTs Array Technology

We report fabrication processes of indium gallium zinc oxide (IGZO) and low temperature poly silicon (LTPS) hybrid TFTs array technology. And the SiOx/IGZO interface quality modification and the performance of different thickness of active layer of IGZO device has been investigated by positive gate bias temperature stress method. The optimum processes conditions have been used on the 1.4” inch circular LCD to improve and pass operation tests of high temperature operation (HTO) 274hrs and temperature‐humidity‐bias (THB) 462 hrs to reach mass production phase.

Nitroacetylacetone as a Cofuel for the Combustion Synthesis of High-Performance Indium–Gallium–Zinc Oxide Transistors

Thin-film combustion synthesis has been utilized for the fabrication of solution processed high-performance metal-oxide thin-film transistors (MOTFTs) at lower temperatures than conventional sol–gel processes. The fuel-oxidizer ensemble in the MO precursor solution/film plays an important role in achieving high-efficiency and low-residual combustion byproducts. However, unlike conventional bulk combustion, only a very limited number of thin-film fuels have been investigated. Here we report the use of an efficient new cofuel, 3-nitroacetylacetone (NAcAcH), incorporating a −NO2 group, for the combustion synthesis of display-relevant indium–gallium–zinc-oxide (IGZO) thin films. Compared to the traditional acetylacetone (AcAcH) fuel, a higher enthalpy of combustion (988.6 vs 784.4 J/g) and a lower ignition temperature (107.8 vs 166.5 °C) are achieved for NAcAcH-based formulations. The resulting NAcAcH-derived IGZO TFTs exhibit far higher average electron mobilities (5.7 cm2 V–1 s–1) than AcAcH-derived TFTs (2...

P‐10.3: A full‐swing inverter based on IGZO TFTs for flexible circuits

It is well known that amorphous oxide semiconductors (AOS) are of high mobility and reliable stability, especially indium‐gallium‐zinc oxide (IGZO). It is the most promising material applied in the manufacture of both displays and integrated circuits in the near future. Taking the advantages of electrical and flexible properties, in particular, IGZO TFT has drawn a great amount of attention. In our work, IGZO TFTs are fabricated on the hydroxylated polyethylene terephthalate (PET) substrate at the temperature of 180 °C, which is apparently lower than that in the conventional process. The experimental performance of the IGZO TFTs show that the mobility and on‐off ration are up to 8 cm2V−1s−1 and 105 respectively. In addition, an inverter based on IGZO TFTs has been achieved on the PET substrate, and its gain reaches the value of −20, showing its potential for flexible logic circuits based on oxide TFTs.

Precise Patterning of Large‐Scale TFT Arrays Based on Solution‐Processed Oxide Semiconductors: A Comparative Study of Additive and Subtractive Approaches

AbstractPrecise patterning of solution‐processed oxide semiconductors is critical for cost‐effective, large‐scale, and high throughput fabrication of circuits and display application. In this paper, demonstration and comparison are made using the additive and subtractive patterning strategies to precisely fabricate wafer‐scale thin film transistor arrays (1600 devices), which are based on high‐quality solution‐processed indium zinc oxide (IZO) and indium gallium zinc oxide (IGZO). The IZO and IGZO TFTs exhibit field‐effect mobility up to 8.0 and 5.2 cm2 V−1 s−1 when using the additive method, whereas the highest mobility of 24.2 and 13.7 cm2 V−1 s−1 for IZO and IGZO TFTs is achieved when using the subtractive method. The X‐ray photoelectronic spectroscopy studies and quantitative 2D device simulations together reveal that good device performance is attributed to moderate shallow donor‐like states (providing electrons) from oxygen vacancy and few accepter‐like states (trapping electrons) resulted from the dense structural framework of MO bonds. After examining the uniformity and reliability of the devices, the solution‐patterned inverters are demonstrated using negative‐channel metal oxide semiconductors, which show full swing output transfer characteristics and thus provide a promising method for solution‐based fabrications of circuits.

Recovery of Bias-Stress Ionized Igzo/SiO2 Interface States Via Cryogenic Relaxation

Indium gallium zinc oxide (IGZO) has been considered a potential replacement for hydrogenated amorphous silicon in TFT applications due to process compatibility and an order of magnitude improvement in electron channel mobility. However the mechanisms responsible for instability under bias-stress remain an active research topic. Silicon dioxide serving as the gate dielectric and back-channel passivation layer in bottom-gate IGZO TFTs results in high quality interfaces. Applied bias-stress conditions demonstrate a voltage shift that can be attributed to ionization and/or alteration of oxygen-related defects at these IGZO/SiO2interfaces. Bottom-gate IGZO TFTs with SiO2 gate dielectric and passivation layers were fabricated and tested under rigorous positive bias-stress (PBS) and negative bias-stress (NBS) conditions. The devices demonstrate good stability under PBS (t > 104 s), with minor distortion in the subthreshold region and a slight characteristic left-shift from an initial pre-stress state. This PBS-shift is attributed to a change in the energy distribution of defect states at the front-channel interface. During NBS the devices exhibited a significant left-shift (ΔV ~ 1-2 V), which is attributed to the transformation of neutral oxygen vacancies to ionized donor states at the back-channel interface. This transformation appears to improve the electrical homogeneity of the back-channel interface, inferred by a suppression of DIBL-like behavior. The NBS-shift was found to be reversible over long recovery times at room temperature. The recovery time was dramatically reduced when samples were subjected to cryogenic temperature (77 K), which represents an accelerated return to the pre-stress condition. TCAD simulation provides additional support to the interpretation of bias-induced stress on IGZO TFTs.

Analytical approximation of the InGaZnO thin-film transistors surface potential

Surface-potential-based mathematical models are among the most accurate and physically based compact models of thin-film transistors, and in turn of indium gallium zinc oxide TFTs, available today. However, the need of iterative computations of the surface potential limits their computational efficiency and diffusion in CAD applications. The existing closed-form approximations of the surface potential are based on regional approximations and empirical smoothing functions that could result not accurate enough in particular to model transconductances and transcapacitances. In this work we present an extremely accurate (in the range of nV) and computationally efficient non-iterative approximation of the surface potential that can serve as a basis for advanced surface-potential-based indium gallium zinc oxide TFTs models.

Dynamics of Threshold Voltage Instability in IGZO TFTs: Impact of High Pressurized Oxygen Treatment on the Activation Energy Barrier

The effect of oxygen high pressurized treatment (OHPT) on the gate-bias thermal stress (BTS) instability of amorphous indium–gallium–zinc-oxide (IGZO) TFTs was investigated. OHPT at 10 atm and 300 °C produces TFTs with better reliability under the positive/negative BTS conditions, which can be attributed to the reduction in the oxygen vacancy defect. However, OHPT at a higher pressure (15 atm) deteriorated the BTS-induced stability of the IGZO TFTs. The rationale for this strong OHPT dependence on the BTS instability of IGZO TFTs was discussed based on the single-frame oxygen-related defect model.

64.2: Panel and Circuit Designs for the World's First 65‐inch UHD OLED TV

We have developed the world's first 65‐inch UHD (also called 4K, 3840×2160) OLED TV with a coplanar‐type IGZO(Indium Gallium Zinc Oxide) TFTs. In this paper, we discuss our excellent WRGB panel designs and circuits to achieve the high frame frequency and the product reliability.

Hydrogenated IGZO Thin-Film Transistors Using High-Pressure Hydrogen Annealing

Hydrogenation of thin-film indium-gallium-zincoxide (IGZO) is carried out by applying a high-pressure hydrogen annealing (HPHA) process under 5-atm pressure at different temperatures of 260°C, 270°C, and 280°C. The HPHA effectively increases the carrier concentration and the Hall mobility up to ~ 1019 cm-3 and ~ 6.4 cm2/Vs, respectively. The HPHA-IGZO films exhibit smoother surfaces as compared with the as-grown films. The HPHA performs at a temperature of 260 °C that greatly enhances the electrical characteristics of IGZO TFTs, leading to a saturation field effect mobility of 7.4 cm2/Vs, a subthreshold slope of 0.37 V/decade, a threshold voltage of 2.2 V, and an ION/IOFF of 2.0×106.

Anomalous Stress-Induced Hump Effects in Amorphous Indium Gallium Zinc Oxide TFTs

In this paper, we investigated the anomalous hump in the bottom gate staggered a-IGZO TFTs. During the positive bias stress, a positive threshold voltage shift was observed in the transfer curve and an anomalous hump occurred as the stress time increased. The hump became more serious in higher gate bias stress while it was not observed under the negative bias stress. The analysis of constant gate bias stress indicated that the anomalous hump was influenced by the migration of positively charged mobile interstitial zinc ion towards the top side of the a-IGZO channel layer.

Effect of high-energy electron beam irradiation on the gate-bias stability of IGZO TFTs

We explored the effects of high-energy electron beam irradiation (HEEBI) on the gate-bias and light stabilities of indium-gallium-zinc-oxide (IGZO)-based transparent thin film transistors (TTFTs). The developed TTFTs had a top gate structure, which used IGZO and Al2O3 films for the active layer and the gate dielectric, respectively. The developed TTFTs were treated with HEEBI in air at room temperature at an electron beam energy of 0.8 MeV and a dose of 1 × 1014 electrons/cm2. Without the gate bias and/or light stresses, the HEEBI-treated devices showed a positive threshold voltage (Vth) shift (+ΔVth), suggesting that acceptor defects might have been generated by HEEBI treatment near the valence band edge. The HEEBI-treated devices also exhibited a lower +ΔVth, a higher negative Vth shift (−ΔVth), and a much lower −ΔVth under positive gate bias, negative gate bias, and light stresses compared to those for the HEEBI-untreated devices, respectively. These Vth instabilities were observed without significant change in the sub-threshold slope, indicating that charge trapping in the gate dielectric and/or at the active layer/dielectric interface was the dominant mechanism of the device instability.