Drain Current Increases Research Articles

Impact evaluation of DC operating condition on DPD linearizability and power efficiency in GaN-based power amplifiers

AbstractThe paper presents the results of studies on the effect of transistor DC operating conditions on GaN power amplifiers’ (PAs) power efficiency and linearity improved by digital predistortion (DPD). The single-ended 10 W (ISM2.45 GHz) and 150 W (3.4/3.6 GHz) GaN HEMT PAs excited by wideband LTE20 E-TM1.1 signal were tested. To check the applicability of the small-signal approach for designing of LTE signals’ PAs, the 150 W PA using transistor model extracted from S-parameters measured at the properly selected operating points was designed. The conventional DPD based on the indirect learning architecture and the memory polynomial model of PA non-linearity was implemented. The results of the research show that in case of class A and B PAs operating up to several dozen watts, an additional improvement in adjacent channel leakage ratio (ACLR) of the order of a few dB only by an increase in the quiescent drain current of PA transistor can be achieved. However, a noticeable ACLR improvement with a coincident increase in power-added efficiency (PAE) can be obtained by choosing the compromise DC operating point and using DPD. In the case of high-PAs, the linearity and efficiency are strongly dependent on the load of a transistor, thus the role of DPD is significantly increased.

Gate Reliability of p-GaN Gate AlGaN/GaN High Electron Mobility Transistors

The gate reliability of p-GaN gate AlGaN/GaN high electron mobility transistors with a ring-gate structure is investigated by step-stress experiments under a gate bias, combined with electroluminescence imaging and pulsed measurements. For gate stress ( ${V} _{\text {Gstress}}$ ) from 0 to 13 V, the drain current is found to be stable and decreases at 13 V at OFF-state and increases at ON-state. For ${V} _{\text {Gstress}}$ from 13 to 31 V, the drain current increases at OFF-state and decreases at ON-state, whereas ${V} _{\text {TH}}$ is stable and increases slightly. The changes in drain current characteristic and ${V} _{\text {TH}}$ values of the device after applying various ${V} _{\text {Gstress}}$ are associated with the injection and trapping of holes from the p-GaN layer to the AlGaN layer, supported by the results of pulsed measurements and by the simulation of energy band diagrams. When ${V} _{\text {Gstress}}$ is further increased to a high voltage of 31 V, ${V} _{\text {TH}}$ becomes noisy and a strong luminescence signal occurs with a sudden reduction in the drain current, and finally, a catastrophic failure happens in the gate-channel region.

High Channel Conductivity, Breakdown Field Strength, and Low Current Collapse in AlGaN/GaN/Si <inline-formula> <tex-math notation="LaTeX">$\delta$ </tex-math> </inline-formula>-Doped AlGaN/GaN:C HEMTs

This paper reports the AlGaN/GaN/ Si δ-doped AlGaN/GaN:C HEMT device on silicon with high channel conductivity, high breakdown field (E-field) strength, and low current collapse by using the Si-doped AlGaN back barriers. The Si δ-doped AlGaN back barrier was used to compensate for the reduction of channel conductivity as a result of a carbon-doped semiinsulating GaN buffer layer. The maximum drain current increases from 412 to 720 mA/mm, and peak extrinsic transconductance is improved from 103 to 210 mS/mm. Due to the reduction of electric field between the gate and drain along the GaN channel by inserting the Si δ-doped AlGaN back barrier layer, it can effectively suppress the capture of electrons in channel by carbon-induced accepted traps in the GaN:C buffer. Combined with the high conductivity of Si δ-doped AlGaN back barrier and high resistance of GaN:C buffer, the device showed the high breakdown E-field strength and the low specific on-resistance. Our proposed device is observed to hold a gate-drain voltage of 769 Vat 10 μA/mm (7-μm gate-drain spacing) and 0.53 mQ · cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and the gateto-drain electric field corresponds to 1.1 MV/cm.

Mitigation of Threshold Voltage Shift Due to Negative Bias Temperature Instability by Exploiting Solgel-Derived TiO2 Incorporation

To ensure reliability inside complementary metal oxide semiconductor transistors, the results on the basis of negative bias temperature instability by incorporating aged TiO2 gels on SiO2 dielectric have been reported. TiO2 was chosen for the incorporation. Precursor aging has been carried out for 2, 3 and 4 days. Samples with maximum dielectric constant after aging and UV treatment were extracted. Under DC stress, exploiting cured sample (4 days aged and 3 h UV exposed) of TiO2 results in a 70% (70% decrease in threshold voltage) increase in drain current. Under AC or dynamic bias stress, exploiting cured sample (4 days aged and 3 h UV exposed) of TiO2 results in a 65% increase (65% decrease in threshold voltage).

Field emission energy distribution and three-terminal current-voltage characteristics from planar graphene edges

We demonstrate field emission from an integrated three-terminal device using a suspended planar graphene edge as the source of vacuum electrons. Energy spectra of the emitted electrons confirm the field-emission mechanism. The energy spectra produced by graphene grown by chemical vapor deposition and reduced graphene oxide are compared. The drain-source voltage required to produce a given drain current increases when negative voltages are applied to the gate, confirming field-effect transistor operation. The emission current rises exponentially with inverse voltage over the measured current range from 1 pA to 10 nA. The current-voltage characteristics are consistent with tunneling through barrier potentials calculated numerically from the device geometry.

Temperature dependent electrical characteristics of a junction field effect transistor for cryogenic sub-attoampere charge detection

Junction field effect transistors (JFET) at cryogenic temperatures can be employed as almost perfect charge detectors with leakage currents of less than 1 aA. The electrical input and output characteristics of the commercial n-channel silicon JFET BF545B is studied as a function of temperature in the range between 30 and 300 K. As long as the charge carrier concentration is constant an increasing drain current is observed for reduced temperatures and low gate voltages. Using a constant mobility model for the device this behaviour can be explained with the higher electron mobility in the source-drain channel. The mobility is found to increase with T−1 at lower temperatures which corresponds to a dopant concentration of 7 ⋅ 1016/cm3. For larger negative gate voltages a source-drain voltage is found at which the drain current is almost temperature independent. As soon as the charge carriers freeze out the input characteristics changes significantly due to the exponential decrease of the carrier concentration. The effective reduction of the gate leakage current is crucial for ultimate sensitive charge detection. Hence, the current is measured through the entire temperature range in an open gate configuration. The leakage current decreases exponentially with lower temperatures across more than six orders of magnitude and reaches values of 10−20 A below 160 K. It is exclusively due to the generation of electron-hole pairs in the depletion layer since the data are in full agreement with the Shockley-Read-Hall model of the generation current.

Comparison between nMOS and pMOS Ω-gate nanowire down to 10 nm width as a function of back gate bias

This paper presents a comparison between nMOS and pMOS Ω-Gate Nanowire for different channel width (WNW) down to 10 nm as a function of the large back gate bias variation (from +20 to −20 V) experimentally and by simulation. The main digital and analog parameters are analyzed in these devices as threshold voltage, subthreshold swing (SS), transconductance, transistor efficiency, Early Voltage and intrinsic voltage gain for transistor channel width from 220 nm down to 10 nm. It is shown that narrow channel devices (WNW = 10 nm) present a small variation on the analyzed parameters as a function of back gate voltage due to stronger electrostatic control between gate and channel considering that they are effectively working like a gate-all-around devices. In general, all the nMOS parameters presents better results compared to pMOS due to the mobility enhancements. For wider devices (WNW = 220 nm), it depends on the back interface condition. For a large enough back gate bias that tends to create a back interface conduction (+20 V for nMOS and −20 V for pMOS), the SS degrades from 61 mV dec−1 (WNW = 10 nm) to 68 mV dec−1 (WNW = 220 nm). However for a large enough back gate bias that induces a non-conduction region (tends to accumulation) at back interface (−20 V for nMOS and +20 V for pMOS) the SS changes from 60 to 62 mV dec−1 at the same WNW range, which is a very acceptable results. Additionally, the drain current (ION) and transconductance (linear and saturation regions) increase for this back gate bias condition (tends to accumulation), working almost like a pseudo nanosheet device for these parameters, avoiding also the parasitic conduction at the back interface. However, in spite of the intrinsic voltage gain is almost independent of the back gate bias, it improves of at least 10 dB for narrow devices due to the higher Early voltage and almost similar transistor efficiency than the wider ones.

Effect of mole fraction, doping concentration and gate length on the electrical characteristics of nanoelectronic High Electron Mobility Transistor

Abstract In this work, we have optimized the device structure to achieve a maximum drain current of Nanoelectronic AlGaN/GaN single-heterojunction high electron mobility transistors (HEMTs) by the variations of mole fraction, doping concentration and gate length, using the SILVACO-ATLAS software tool. The drain current increases at higher aluminium mole fraction of AlGaN nano-layer. The drain current increases at higher doping concentration of AlGaN nano-layer. The drain current reduces at higher gate length of HEMTs. The conduction band engineering in terms of quantum wells is investigated in detail by involving the Bose-Einstein expression. The simulation results of this work are supported by the available previous experimental results and analytical modelling. This work will be useful to fabricate the AlGaN/GaN HEMTs experimentally for bioengineering applications.

Electrical Transport Properties of Self-Organized ZrO2 Nanotube

Self-organized ZrO2 nanotubes are prepared via the conventional anodization method. Back-gate field effect transistors are fabricated for the first time to study the electrical transport properties of single ZrO2 nanotube The drain current increases with the applied negative gate voltage, which is suggesting the ZrO2 nanotube works under hole accumulation mode. The room temperature hole mobility of 0.03 cm2 V-1s−1 and average hole concentration of 2.8 × 1018 cm−3 are obtained at low drain bias. Temperature dependent I-V characteristics show that the hole concentration and hole mobility have an opposite changing trend with the temperature. The current of the device is controlled by the offset effect between the hole concentration and hole mobility.

Gas sensing characteristics of the FET-type gas sensor having inkjet-printed WS2 sensing layer

This paper investigates the gas sensing characteristics of the MOSFET-type sensor having an inkjet-printed WS2 sensing layer. The drain current of the gas sensor increases when NO2 gas is injected into the test chamber since NO2 gas is an oxidizing gas that extracts electrons from the sensing layer. On the contrary, the drain current decreases when H2S gas is injected into the test chamber since H2S gas is a reducing gas that donates electrons to the sensing layer. In both cases, the change of the drain current increases as the gas concentration increases. However, for other gases (NH3 and CO2), the gas sensor has a small change of the drain current. The responses of the gas sensor to 10 ppm NO2, H2S, NH3, and CO2 gases are 15.20%, 7.18%, 1.66%, and 3.02%, respectively. Therefore, the WS2 sensor has a high selectivity for NO2 gas among the four target gases.

Temperature-Dependent Transport in Ultrathin Black Phosphorus Field-Effect Transistors.

We studied the temperature-dependent transport properties of ultrathin black phosphorus (BP). We present measurements of BP Schottky barrier (SB) metal-oxide-semiconductor field-effect-transistors (MOSFETs) with various channel lengths, constructed from a single BP sample with nanoscale uniformity in thickness and width. The electrical characterization reveals a reversal in the temperature dependence of drain current as a function of gate voltage. This reversal indicates a transition in the charge conduction limiting mechanisms as the device is swept from the off-state into the on-state. In the off-state, charge transport is limited by thermionic emission over the energy barriers at the source/drain SB contacts, and drain current increases with temperature. In the on-state, carriers can easily tunnel across the SB at the contacts, and charge transport is limited by scattering in the channel. As a result, drain current decreases with temperature in the on-state, as scattering increases with temperature. Using Landauer transport theory, we derive a closed-form expression for thermionic emission current in SB-MOSFETs with two-dimensional channels. We use this expression to extract the SB height at metal contact interface with BP and demonstrate the impact of scattering on the extraction. We then use a comprehensive BP SB-MOSFET model to analyze on-state current as a function of temperature and demonstrate the effects of charged impurity and phonon scattering on the transport properties of BP through extractions of mobility at fixed carrier density.

Vertical GaN n-channel MISFETs on ammonothermal GaN substrate: Temperature dependent dynamic switching characteristics

Switching of GaN-based vertical-trench gate MISFET on ammonothermal n-type GaN substrate are studied as a function of temperature. Pulsed on-state IV characterization revealed three unexpected independent effects. First, drain current increases with temperature, although electron mobility decreases with temperature. Second, drain current decreases with pulse length, which cannot be explained by heating. Third, dynamic Ron increases with off-state drain bias, which usually is considered as an issue of lateral GaN HFETs only. The drain current temperature dependence is most likely dominated by the low electron mobility in the inversion layer beneath the gate. The field effect channel mobility is estimated as < 10 cm2/V s and can thus be considered as trap limited and thermally activated, Ron decreases from 133 Ω mm at 20 °C to 62 Ω mm at 110 °C. Longer on-state pulses lead to negative charging of the ALD-Al2O3 gate oxide and shift the threshold voltage (DC-Vth ~8 V) positively. With the maximum applicable Vgs = 10 V, the drain current is not saturated yet and Ids thus drops by a factor 2 when increasing the on-state pulse width from 0.2 µs to 20 µs due to the Vth-shift. The observed 10-times dynamic Ron increase with off-state drain bias up to 30 V can be related to possible charging mechanism in the gate oxide as well. Activation energies for different off-state stress voltage are ranged linear between 0.08 eV and 0.26 eV for drain bias stress of Vds = 0 V and 30 V respectively.

Floating top gate-induced output enhancement of a-InGaZnO thin film transistors under single gate operations

This work compares dual gate and single gate a-InGaZnO thin film transistor devices under single gate operations. In both devices, an abnormal drain current increase in the dual gate structures was observed. The results of structural geometry experiments, Technology Computer-Aided Design, and theoretical calculations matching the experimental results provide evidence for a larger voltage potential distribution located near the top gate even when the top gate is floating. Since an additional voltage is formed near the top gate, a better gate control capability will lead to more inverted carriers. Therefore, these dual gate structures have a larger drain current than does the single gate. Finally, both positive bias stress and negative bias illumination stress in both structures are discussed. The results of positive bias stress have shown good quality of the gate insulator layer and negative bias illumination stress was discussed to confirm the coupled voltage.

Investigation of the Effect of Weak Non-Linearities on P1dB and Efficiency of Class B/J/J* Amplifiers

The variation of phase of the current through the non-linear intrinsic capacitances of a high-power RF device caused by the variation of the phase in the continuum of drain voltage waveforms in Class B/J/J* leads to a reduction of intrinsic drain current when moving from class B to class J* while the drain current increases from class B to class J. Consequently, a subset of voltage waveforms of the class B/J/J* continuum can be used to design amplifiers with higher P1dB, and efficiency at P1dB than in Class B. A simple choice of this subset is demonstrated with a 2.6 GHz Class B/J/J* amplifier, achieving a P1dB of 38.1 dBm and PAE at P1dB of 54.7%, the highest output power and efficiency at P1dB amongst narrowband linear amplifiers using the CGH40010 reported to date, at a comparable peak PAE of 72%.

Bandgap-Engineered Zinc-Tin-Oxide Thin Films for Ultraviolet Sensors.

Zinc-tin-oxide thin-film transistors were prepared by radio frequency magnetron co-sputtering, while an identical zinc-tin-oxide thin film was deposited simultaneously on a clear glass substrate to facilitate measurements of the optical properties. When we adjusted the deposition power of ZnO and SnO2, the bandgap of the amorphous thin film was dominated by the deposition power of SnO2. Since the thin-film transistor has obvious absorption in the ultraviolet region owing to the wide bandgap, the drain current increases with the generation of electron-hole pairs. As part of these investigations, a zinc-tin-oxide thin-film transistor has been fabricated that appears to be very promising for ultraviolet applications.

Drain current enhancement induced by hole injection from gate of 600-V-class normally off gate injection transistor under high temperature conditions up to 200 °C

In this paper, the current–voltage (I–V) characteristics of a 600-V-class normally off GaN gate injection transistor (GIT) from 25 to 200 °C are analyzed, and it is revealed that the drain current of the GIT increases during high-temperature operation. It is found that the maximum drain current (Idmax) of the GIT is 86% higher than that of a conventional 600-V-class normally off GaN metal insulator semiconductor hetero-FET (MIS-HFET) at 150 °C, whereas the GIT obtains 56% Idmax even at 200 °C. Moreover, the mechanism of the drain current increase of the GIT is clarified by examining the relationship between the temperature dependence of the I–V characteristics of the GIT and the gate hole injection effect determined from the shift of the second transconductance (gm) peak of the gm–Vg characteristic. From the above, the GIT is a promising device with enough drivability for future power switching applications even under high-temperature conditions.

Effects of source/drain electrode contact length on the photoresponsive properties of organic field-effect transistors

With the continual increase of the carrier mobility of organic semiconductors, there is a great need for optimizing the contact between source/drain electrode and organics in order to further improve the performance of organic field-effect transistors. The effects of Au source/drain electrode contact length on the photosensitivity in pentacene-based organic field-effect transistors were systematically investigated. The results show that at a given gate voltage and drain voltage, the drain current increases with the contact length at first and then tends to saturate at a contact length of 0.7 mm. It is observed that the effective mobility under illumination, both in the linear region and the saturation region, as well as the photoresponsivity and the external quantum efficiency, increase with contact length. All of these can be attributed to the reduction of contact resistance with the increase of contact length. Moreover, analytical expressions were derived and successfully describe the measured dependence of the drain current on the contact length.

Analysis of Reduction in Lag Phenomena and Current Collapse in Field-Plate AlGaN/GaN HEMTs With High Acceptor Density in a Buffer Layer

We make a 2-D transient analysis of field-plate AlGaN/GaN HEMTs with a semi-insulating buffer layer, where only a deep acceptor above the midgap is considered. The deep-acceptor density is varied between 1017 cm−3and $8 {\times 10}^{{17}}$ cm−3. It is studied how the deep-acceptor density and the field plate affect the buffer-related drain lag and gate lag, and current collapse. It is shown that the lags and current collapse are reduced by introducing a field plate. This reduction occurs because electron trapping by the deep acceptors is weakened by the field plate. It is also shown that without a field plate, the drain lag and current collapse increase with increasing the deep-acceptor density as expected, although the gate lag decreases when the deep-acceptor density becomes high in the region between $2{\times 10}^{{17}}$ cm−3and $8 {\times 10}^{{17}}$ cm−3. On the other hand, with a field plate, surprisingly, the lags and current collapse decrease when the deep-acceptor density becomes high. This is attributed to the fact that the reduction in drain lag and current collapse by introducing a field plate becomes more significant when the deep-acceptor density becomes higher.

Temperature dependence of DC transport characteristics for a two-dimensional electron gas in an undoped Si/SiGe heterostructure

We investigate DC characteristics of a two-dimensional electron gas (2DEG) in an undoped Si/SiGe heterostructure and its temperature dependence. An insulated-gate field-effect transistor was fabricated, and transfer characteristics were measured at 4 K–300 K. At low temperatures (T &amp;lt; 45 K), source electrons are injected into the buried 2DEG channel first and drain current increases with the gate voltage. By increasing the gate voltage further, the current saturates followed by a negative transconductance observed, which can be attributed to electron tunneling from the buried channel to the surface channel. Finally, the drain current is saturated again at large gate biases due to parallel conduction of buried and surface channels. By increasing the temperature, an abrupt increase in threshold voltage is observed at T ∼ 45 K and it is speculated that negatively charged impurities at the Al2O3/Si interface are responsible for the threshold voltage shift. At T &amp;gt; 45 K, the current saturation and negative transconductance disappear and the device acts as a normal transistor.

Hydrogen sensors based on TFT’s with catalytic source/drain electrodes: IGZO vs. pentacene

A novel H2 sensor based on an InGaZnO thin-film transistor (IGZO TFT) with Pd source/drain electrodes as sensing medium is fabricated. Without the need of heating, rapid and concentration-dependent response (in the form of drain-current increase) of the sensor is observed under various cycles of H2 exposure/evacuation with H2 concentration ranging from 200 to 15 000 ppm. The drain-current increase is due to a decrease in barrier height at the interface between the Pd source and IGZO channel induced by the formation of a hydrogen dipole layer at the interface. By comparing this sensor with its counterpart based on pentacene OTFT having an opposite response, it can be claimed that the same hydrogen dipole layer has opposite effect on the two TFTs: it creates an electric field that can assist the flow of electrons from the source electrode to the IGZO channel, but oppose the flow of holes from the source electrode to the pentacene channel. As a result, the IGZO TFT can work in an OFF-to- ON mode during sensing, and so the standby power of sensing circuit could be reduced. Although the OTFT sensor shows higher sensitivity and faster response due to the higher flexibility of the pentacene layer, the proposed sensor has a better stability at high temperature due to the larger bandgap of IGZO and so is suitable for hydrogen-sensing applications in a wider range of operating temperature.