High-side Switch Research Articles

A Fully ZVS Critical Conduction Mode Boost PFC

Boost converter operating in critical conduction mode is widely used in low-power power factor corrector because of its simplicity and low switching losses. The switching loss due to parasitic capacitor discharge at the on-time instant can also be reduced by a valley switching technique. In this paper, we introduce a new driver topology for the high-side switch in a synchronous boost converter operating in the critical conduction mode to obtain full zero-voltage switching. Using the proposed high-side driver topology, the conventional control circuit is sufficient to control the low-side switch, and no additional control circuit is required to adjust the timing of the switches. Finally, the line current distortion is reduced through the use of on-time extension technique to less than 10% in the defined load range. Based on approximate mathematical calculations, two separate distortion reduction circuits are designed to implement the on-time extension technique for both voltage-mode and current-mode control methods.

Fast-Shared Current Transient Response in High-Precision Interleaved Inverters

A robust self-interleaving mechanism for paralleled hysteresis-current-controlled inverters is proposed, featuring sustained switching under all load conditions. A fast interleaving technique that can be applied when no clamping of the output voltage occurs is combined with a self-interleaving mechanism that ensures correct switching during output-voltage-clamping conditions. The self-interleaving mechanism was analyzed using the state-plane method, extended to multiple modules in parallel. A minimum switching frequency and maximum duty cycle are guaranteed under all load conditions, enabling the use of low-cost bootstrap circuits to drive the high-side switches. The interleaving approach results in reduced volume of the passive components and improved dynamic response. Simulations were conducted to verify the combined operation of both methods, and measurements were performed on a 2.8-kW prototype zero-voltage-switching inverter with a discrete hysteresis current controller.

고출력 MHL용 구형저주파 구동 방식의 전자식 안정기 설계

본 논문에서는 Buck Converter 동작 원리를 Full -Bridge Inverter에 적용한 전자식 안정기를 제안하였다. 전자식안정기는 EMI 필터, 수동 PFC, Full-Bridge Inverter로 2-stage로 구성되어 있다. PFC는 신뢰성 확보를 위해 수동 PFC를 사용하였다. Full-Bridge Inverter는 High Side와 Low Side 스위치의 구동 주파수를 각각 고주파와 저주파로 구동하여 Buck Converter의 동작을 구현 하였다. 램프를 저주파수 구형파로 구동하여 음향공명현상을 피하게 되었으며, 고주파수 스위칭으로 인덕터의 부피를 줄였다. 제안한 방법은 시뮬레이션과 실험을 통해 증명하였다. In this paper, We proposed electronic ballast that applys Buck Converter operation principle to Full-Bridge inverter. The proposed ballast consists of an EMI Filter, a full-bridge rectifier, a passive power factor correction (PFC) circuit and a full-bridge inverter. The passive PFC is used and a Full-Bridge inverter operation by two frequency. High Side and Low Side switch was driven by high frequency and low frequency and realized buck Converter's operation. The lamp is driven by Low Frequency square wave to avoid Acoustic Resonance. Also, bulk of inductor is reduced by high frequency switching. Performance of the proposed ballast was validated through computer simulation using Pspice, experimentation and by applying it to an electronic ballast for a prototype 700W MHL.

A High-Dynamic Range Current Source Gate Driver for Switching-Loss Reduction of High-Side Switch in Buck Converter

In this letter, a high-dynamic range current source gate driver (HD-CSD) circuit is proposed to reduce the switching loss of the high-side switch in buck converter with wide variation of the gate resistance. Hard switching loss is the major loss in high-side switch and limits the high switching-frequency application of dc-dc converter. Comparing with conventional voltage source gate driver (VSD) and the reported four switches CSD (4S-CSD), the proposed HD-CSD behaves more like the ideal current source driver which can realize the fast switching of power switches to reduce the switching loss. In addition, with proposed HD-CSD, impact of gate resistance that limits the switching speed of the power switch can be greatly reduced. Experimental results are presented to show the power efficiency improvement of buck converter with HD-CSD high-side driver comparing with VSD and 4S-CSD high-side drivers at switching frequency of 1 MHz.

Discussion of Turn on Current Peaks of SiC Switches in Half Bridges

The optimal control parameters for semiconductor switches at the development state with new materials and structures are often unidentified. By using those sample switches with a gate control set by investigating one switch only, parasitic influences might lead to increased switching losses in half bridges [1, 2]. The focus of this paper is on an effect at turn on by using for example normally on JFET as high and low side switch. At this an increased current peak might occur which leads to higher switching losses. By adjusting the gate voltage losses can be economized.

자동차용 3상 모터 드라이브 IC

This paper presents a motor drive IC for automotive applications. The drive IC is dedicated to control and drive external MOSFETs which directly drive 3-phase motor with a high current. In case of driving high-side power switches, the bootstrap topology is widely used. however, it requires three bootstrap diode and three capacitor respectively. And it needs a minimum charging time to maintain high-side voltage. The motor drive IC uses a charge-pump circuit for all three high-side voltage with various protection schemes for automotive applications.

Automotive Fan Control with Smart Power Switch [From Mind to Market

This article presents a fan control unit requiring 30 A motor currents up to 20 kHz PWM. The smart integrated circuit (IC) used here includes a self-protected high-side switch with 4 mOmega RDSON, all digital control from a microcontroller, and extended diagnostics. High-current switching at high frequency generates electromagnetic interference (EMI) and power losses. Corner rounding and slew rates were optimized to reduce EMI filter size on the module. The power QFN (PQFN) package, half the size of the equivalent conventional package, helps to evacuate high power dissipation during switching. A smart power switch, combined with a 16-b microcontroller (MCU) and the control area network (CAN) communication protocol, provides an embedded solution, bringing cost savings on the system.

Analysis of a Narrow-Base Lateral IGBT With Double Buried Layer for Junction-Isolated Smart-Power Technologies

An n-type lateral insulated gate bipolar transistor (nLIGBT) with a double buried layer structure is studied. This device is integrated in an existing smart-power junction-isolated technology with a 0.35-mum CMOS core without adding extra mask steps. The double buried layer underneath the active nLIGBT not only renders this a floating device (i.e., it can be used as a high-side switch) but also suppresses the substrate current effectively, and, what is more, it introduces a buried hole diverter. As a consequence, this device has a wide safe operating area and switches off extremely fast with no current tail. The device's static and dynamic behavior is analyzed through 2-D numerical simulations. Finally, the device is compared to the rivaling drain extended MOSFET transistor in this technology.

Design of a 1-MHz LLC Resonant Converter Based on a DSP-Driven SOI Half-Bridge Power MOS Module

In this paper, the design of a 1-MHz LLC resonant converter prototype is presented. Aiming to provide an integrated solution of the resonant converter, a half-bridge (HB) power metal oxide semiconductor (MOS) module employing silicon-on-insulator technology has been designed. Such a technology, which is suitable for high-voltage and high-frequency applications, allows enabling HB power MOSFET modules operating up to 3MHz with a rated voltage of 400V. The power device integrates the driving stages of the high-side and low-side switch along with a latch circuit used to implement over-voltage/over-current protection. The module has been designed to be driven by a digital signal processor device, which has been adopted to perform frequency modulation of the resonant converter. By this way, output voltage regulation against variations from light- to full-loaded conditions has been achieved. The issues related to the transformer design of the LLC resonant converter are discussed, too. Owing to the high switching frequency experienced by the converter, 3F4 ferrite cores have been selected for their low magnetic power losses between 0.5 and 3 MHz and core temperatures up to 120degC. The resonant converter has been designed to operate in an input voltage range of 300-400V with an output voltage of 12V and a maximum output power of 120W. Within these design specifications, a performance analysis of the LLC converter has been conducted, comparing the results obtained at the switching frequencies of 500kHz and 1MHz. A suitable model of the LLC resonant converter has been developed to aid the prototype design.

Active vibration insulator

An active vibration insulator includes an electromagnetic actuator, a cyclic-control-signals output device, and an electromagnetic-actuator driver. The electromagnetic-actuator driver includes an asymmetric half-bridge circuit, and an actuating-signals output device. The actuating-signal output device outputs a signal for turning on one of a high-side switch and a low-side switch of the asymmetric half-bridge circuit, and outputs a pulse-width-modulated actuating signal for actuating the other one of them by means of pulse-width modulation based on the cyclic control signals, which the cyclic-control-signals output device outputs, or outputs a pulse-width-modulated actuating signal for actuating both of them by means of pulse-width modulation when the cyclic control signals are positive. Moreover, the actuating-signal output device outputs a signal for turning off one of them, and outputs a pulse-width-modulated actuating signal for actuating the other one of them by means of pulse-width modulation when the cyclic control signals are negative.

Novel Current-Source Multi-Level Inverter Driven by Single Gate Drive Power Supply

This paper proposes a novel current-source multi-level inverter, which is based on a current-source half bridge topology. Multi-level inverters are effective to reduce harmonic distortion of the output voltage and the output current. However, the multi-level inverters require many gate drive power supplies to drive switching devices. The gate drive circuits using a bootstrap circuit and a pulse transformer can reduce the number of the gate drive power supplies, but a pulse width of the output PWM waveform is limited. Furthermore, high-speed power switching devices are indispensable to compose a high-frequency power converter but various problems of high frequency noise arise due to high dv/dt rate, especially in high-side switching devices.The proposed current-source multi-level inverter is composed with a common emitter topology of all switching devices. Therefore, it is possible to operate with a single power supply of gate drive circuit, which allows stabilizing a potential level of all the drive circuits.In this paper, effectiveness of the proposed circuit is verified with experimental results.

A Self-Boost Charge Pump Topology for a Gate Drive High-Side Power Supply

A self-boost charge pump topology is presented for a floating high-side gate drive power supply that features high voltage and current capabilities for use in integrated power electronic modules (IPEMs). The transformerless topology uses a small capacitor to transfer energy to the high-side switch from a single power supply referred to the negative rail. Unlike conventional bootstrap power supplies, no switching of the main phase-leg switches is required to provide power continuously to the high-side gate drive, even if the high-side switch is permanently on. Additional advantages include low parts-count and simple control requirements. A piecewise linear model of the self-boost charge pump is derived and the circuit's operating characteristics are analyzed. Simulation and experimental results are provided to verify the desired operation of the new charge pump circuit. Guidelines are provided to assist with circuit component selection in new applications.

On-chip current sensing techniques for hysteresis current controlled DC–DC converters

An on-chip current sensing technique for a hysteresis current controlled step-down DC–DC converter is presented. This current sensing technique has been designed with standard 0.35 µm CMOS 2P4M processes. Experimental results show that the current sensing circuit measures full-time the inductor current whether the high-side or low-side switch is turned on.

Integrated current sensing circuits suitable for step-down DC-DC converters

A new integrated current sensing circuit suitable for step-down DC-DC converters is presented. The current sensing circuit can fully measure the inductor current through sensing the current of power switches whether the high side or low side switch is turned on. The proposed circuits can work in DC-DC converters such that the loading current can be managed through control theories.

A reverse-voltage protection circuit for MOSFET power switches

When MOSFET is used as a power switch, it is essential to prevent reverse current flow through the parasitic body diodes under reverse voltage condition. A new built-in reverse voltage protection circuit for MOSFETs has been developed. In this design, an area-efficient circuit is used to automatically select the proper well bias voltage to prevent reverse current under the reverse-voltage condition. This built-in reverse protection circuit has been successfully implemented in a high-side power switch application using a 0.6-/spl mu/m CMOS process. The die area of the protection circuit is only 2.63% of that of a MOSFET. The latch-up immunity is greater than +12 V and -10 V in voltage triggering mode, and greater than /spl plusmn/500 mA in current triggering mode. The protection circuit is not in series with the MOSFET switch, so that the full output swing and high power efficiency are achieved.

Substrate bias effect on blocking capability of a lateral p-channel MOSFET on SOI

Abstract The substrate bias effect on the breakdown voltage of a p -channel MOSFET on a SOI film (SOI-PMOS) is investigated numerically and experimentally. The breakdown voltage of the SOI-PMOS is estimated with varying substrate bias, and the breakdown mechanism is analyzed. In view of the application of the SOI-PMOS as a high-side switch, the device structure is optimized for achieving a high breakdown voltage at negative substrate bias.

0.8 µm CMOS Process Compatible 60 V–100 m Ω·mm 2 Power MOSFET on Bonded SOI

In the present paper, we propose high voltage lateral power metal-oxide-semiconductor field effect transistor (MOSFET) on silicon on insulator (SOI), using the pure 0.8 µm complementary metal-oxide-semiconductor (CMOS) processes without diffusion self-alignment. The measured specific on-resistance of the developed lateral power n-channel MOSFET (NMOSFET) was 100 m Ω·mm2 and breakdown voltage was 60 V. The fabricated device attains its on-resistance comparable to that of diffusion self-align MOSFET (DMOSFET). It also achieves high side switch operation by a reasonable cost, and can be integrated with Bipolar CMOS (BiCMOS) circuits and micro processing unit (MPU). Compatibility of the developed MOSFET to these low voltage circuits are demonstrated. Furthermore, we show that the MPUs and BiCMOS analog circuit on SOI is suitable for high temperature operation.

A 70 mΩ intelligent high side switch with full diagnostics

A new, smart power switch for industrial, automotive, and computer applications developed in BCD (Bipolar, CMOS, DMOS) technology is described. It consists of an on-chip 70 m/spl Omega/ power DMOS transistor connected in high side configuration and its driver makes the device virtually indestructible and suitable to drive any kind of load with an output current of 2.5 A. If the load is inductive, an internal voltage clamp allows fast demagnetization down to 55 V below the supply voltage. The device includes novel structures for the driver, the fully integrated charge pump circuit, and its oscillator. These circuits have specifically been designed to reduce electromagnetic interference (EMI) thanks to an accurate control of the output voltage slope and the reduction of the output voltage ripple caused by the charge pump itself. An innovative open load circuit allows the detection of the open load condition with high precision (3 mA /spl plusmn/10% within the temperature range from -25 to 150/spl deg/C and including process spreads). Furthermore, the device protects the load from ground disconnection and is compatible with the new IEC standards concerning burst and surge tests. The quiescent current has also been reduced to 600 /spl mu/A. Diagnostics for CPU feedback is externally available from the chip by two dedicated pins when the following fault conditions occur: open load, overload and short circuit to ground or to the supply voltage, overtemperature, and undervoltage supply.

The characteristics of the lateral IGBT on the thin SOI film when the collector voltage of the IGBT is applied to the substrate

The characteristics of the lateral IGBT on an SOI film when the collector voltage of the IGBT is applied to the substrate are investigated for its application to a high side switch. The measurements of the blocking capability and the dynamic latch-up current during the turn-off transient under an inductive load are carried out with varying thicknesses of the SOI film. A 260 V IGBT can be fabricated on a 5 /spl mu/m thick SOI film without the special device structure. The dynamic latch-up current is improved by reducing the SOI film thickness. This paper shows that applying the collector voltage of the IGBT to the substrate makes it possible to improve the characteristics of the IGBT on a thin SOI film.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Application of a floating well concept to a latch-up-free, low-cost, smart power high-side switch technology

An original design methodology that permits implementing latch-up-free smart power circuits on a very simple, cost-effective technology is presented. The basic concept used for this purpose is letting float the wells of the MOS transistors most susceptible to initiate latch-up. >