High Power Electronic Packaging Research Articles

Size-Controllable Synthesis of Bimodal Cu Particles by Polyol Method and Their Application in Die Bonding for Power Devices

A simple and large-scale polyol method was utilized to successfully synthesize bimodal Cu particles in the air. The size, size distribution, and morphology of Cu particles were determined by the reaction parameters, such as Cu source and additives. The insoluble Cu source is suitable for the formation of bimodal Cu particles as they provide a slow and steady supply of fresh Cu nuclei, which modify the nucleation and growth of Cu particles. In addition, sodium sulfide (Na2S) additive has the ability to control the size of Cu particles due to its reduction capability. As-synthesized bimodal Cu particles were used to fabricate sintered Cu joints for high-power electronic packaging. The results show that the shear strength of sintered Cu joints was determined by the size and size distribution of Cu particles. Sintered Cu joints with high shear strength above 20 MPa can be readily achieved at 300 °C with a slight applied pressure of 0.4 MPa. This strength is superior to joints utilizing nanoparticle Cu paste. The size-matching effect and the high oxidation resistance of the bimodal Cu particles were attributed to the excellent mechanical performance of the sintered Cu joints. Our results indicate that this affordable paste utilizing bimodal Cu particles of a suitably designed size and with a uniform distribution is highly promising as the die-bonding material for next-generation power devices.

New solid-state die-attach method using silver foil bonded on aluminum substrate by eutectic reaction

The high thermal conductivity, lightweight, and low cost of aluminum (Al) make it a promising substrate material for high power electronic and photonic packages and housings. It is particularly attractive for aerospace and space applications due to its lightweight. A main challenge for these applications is poor bondability. The native aluminum oxide (Al2O3) prevents aluminum from bonding by using popular die-attach materials such as solders. Zincating process is often needed to dissolve the Al2O3 layer and deposit a protection zinc layer which provides a basis for subsequent metallization or soldering process. However, the zincating and metallization processes could increase the processing cost and bring more reliability issues.In this research, a novel Ag foil bonding technique has been developed to bond Ag foils directly to Al substrates to produce Ag-cladded Al substrates. Two Ag-Al bonding processes are developed: solid-state and eutectic. Subsequently, Si chips are bonded to the Ag-cladded Al substrates using solid-state process at 300 °C without any additional die-attach material. For the Ag-Al bonding processes, no surface treatment is applied to Al substrates to remove the native Al2O3 layer. In the Ag-Al soli-state bonding process, Ag and Al atoms inter-diffused through the thin Al2O3 to react and form Ag2Al and Ag3Al compounds. In the Ag-Al eutectic bonding process, Ag2Al+(Al) eutectic structure forms at the Ag/Al interface without Ag3Al compound formation. The native Al2O3 layer, a potential fracture path, is broken into pieces during eutectic reaction and possibly dispersed into the eutectic structure. Shear test results of Si/Ag/Al joint samples far exceed the military criterion (MIL-STD-883H method 2019.8). The Si/Ag/Al structures break either along the Ag/Al interface or within the Si chip.With the advantages of high thermal conductivity, high reliability, lightweight, and process simplicity, the Ag-cladded Al structures should be highly valuable for applications in packages and housings where lightweight and high heat-conducting are necessary.

Direct silver to aluminum solid-state bonding processes

The high thermal conductivity, light weight, and low cost of aluminum (Al) make it a promising substrate material for high power electronic packaging. A main challenge of using aluminum in electronic packaging is its poor bondability. The native aluminum oxide (Al2O3) prevents aluminum from bonding to commonly used die-attach materials such as solders. Thus, zincating process is often needed to dissolve the Al2O3 layer and deposit a protective zinc layer which provides a basis for subsequent metallization or soldering processes.In this research, Ag-Al solid-state bonding has been developed as a novel bonding technique to bond Ag directly to Al substrates. No surface treatment was applied on Al substrates to remove the native Al2O3 layer prior to bonding. The shear strength of Ag-Al joints passes the military criterion (MIL-STD-883H method 2019.8) by a large margin. SEM and TEM imaging was utilized to study the microstructures. In the bonding processes conducted at 425 and 450 °C, Ag and Al atoms inter-diffused through the thin Al2O3 to react and form Ag2Al and Ag3Al compounds. To examine the fracture modes of Ag-Al joints, the fracture surfaces after shear tests were evaluated. The effect of bonding temperatures on Ag-Al joint morphology and the fracture behaviors were investigated and discussed.An application of this new technique is to bond thin Ag foils to Al substrates and make them bondable to die-attach materials such as solders and nano-silver paste. This Ag foil bonding method provides an alternative to the zincating process. Other potential applications include making Al surfaces easier to blaze to other metals such as brass, bronze and copper.

Low-pressure solid-state bonding technology using fine-grained silver foils for high-temperature electronics

A solid-state bonding technique using fine-grained silver (Ag) foils is presented. The Ag foils are manufactured using many runs of cold rolling and subsequent annealing processes to achieve the favorable microstructure. X-ray diffraction and pole figure measurement are performed to examine the crystal structure and grain orientations. Si chips are bonded to bare Cu substrates using the Ag foil as the bonding medium at 300 °C in 0.1 torr vacuum assisted by 6.9 MPa static pressure, which is much lower than that used in conventional thermal compression bonding. Cross sections prepared by focus ion beam show clear bonding interfaces with only a few voids smaller than 100 nm. The bonded structures do not crack after cooling down to room temperature, indicating that the ductile Ag layer is able to manage the strain induced by the large coefficient of thermal expansion mismatch between Si and Cu. The average shear strength of as-bonded samples is 29 MPa. High-temperature storage tests are conducted, and slight increase in strength can be observed after 300 °C aging. Fracture analyses show that the breakage occurs within the Ag foil rather than on the bonding interface. Transmission electron microscopy and energy-dispersive spectroscopy (TEM/EDX) are conducted for Ag/Cu interface after 200-h aging, and the result shows that slight diffusion proceeds during the aging. Since Ag has the highest electrical and thermal conductivities among metals, therefore the bonded structures reported in this paper probably represent the best possible design for high-temperature and high-power electronic packaging applications.

Relationship between Diamond Particle Size and Thermal Conductivity of Cu-Diamond Composites

Diamond-copper composites were fabricated by ultrahigh pressure sintering (UHPS) technology. The influence of diamond particle size on the microstructure,relative density and thermal conductivity of composites were investigated. The results indicated that the high relative density of more than 99% diamond-copper composite can be prepared by UHPS method. The composite thermal conductivity dramatically increased with increasing diamond particle size and the highest value of 675W/(m·K) were obtained when using 200μm diamond,which is much higher than those of traditional electronic packing materials. The Cu-diamond composite could fulfill the requirement of heat removal of the high-power electronic packaging devices.

Fluxless Tin and␣Silver-Indium Bonding Processes for␣Silicon onto␣Aluminum

The high thermal conductivity, light weight, and low cost of aluminum (Al) make it a promising material for use in high-power electronic packaging. The challenges are its high coefficient of thermal expansion (CTE) of 23 × 10−6/°C and difficulty in soldering. In this research, we surmounted these challenges by bonding large Si chips to Al boards using fluxless Sn and Ag-In processes, respectively. Despite the large CTE mismatch, the bonded structures were strong as determined by fracture force measured by shear test machine. The reference is the fracture force specified in MIL-STD-883H method 2019.8. The microstructure and composition of the joints were examined using scanning electron microscopy (SEM) and energy-dispersive x-ray (EDX) analysis. The resulting Sn joint is almost pure Sn with thin intermetallic layer. The Ag-In joint consists of Ag/(Ag)/Ag2In/(Ag)/Ag that has a melting temperature higher than 695°C even though the bonding process was performed at 180°C. These bonding processes are entirely fluxless. The fluxless feature greatly helps reduce voids in the joints, which in turn increases the joint strength. These preliminary but encouraging results should open up new applications of Al boards in electronic packaging where Al was avoided because of its high CTE and difficulty in bonding.

Two-dimensional electrical modeling of thermoelectric devices considering temperature-dependent parameters under the condition of nonuniform substrate temperature distribution

Since more aggressive thermal solutions, than would be required for uniform heating, are highly desired. Thermoelectric devices are regarded as an available thermal solution for high power electronic packages like processors. In this paper, a steady-state numerical model is derived for thermoelectric coolers (TECs) with parameters controlled by two-dimensional thermal profiles. Using the thermoelectric duality, we propose an improved electrical model with temperature-dependent parameter distribution in the presence of multi-couple pellets. Both electrical element and thermal behavior are simulated based on this improved model with TEC parameters modified according to the nonuniform temperature effects. The results demonstrate an excellent agreement with numerical calculation and the proposed electrical model. It proves that thermal profiles in the underlying silicon substrate have a linear effects on the temperature at the cold side of TECs. In addition, the optimum value of the temperature difference exhibits a negative interrelation with the electrical current flowing through TECs under a fixed hot junction temperature.

Analysis of thermoelectric cooler performance for high power electronic packages

Abstract In this paper, an analysis of thermoelectric cooler (TEC) performance is conducted for high power electronic packages such as processors. Based on the TEC module parameters, two sets of analytical solutions for TECs in system constraints are derived for the junction temperature T j at a fixed cooling power Q c , and for Q c at a fixed T j , respectively. As against the iterative procedure often reported in literature, the major advantage of the present analytical method lies in the fact that the solutions can be obtained without resorting to the pellet thermoelectric parameters and geometric details. Two cooling scenarios, the processor test and the processor cooling under end-user conditions, are analyzed based on the present analysis models for two commercial TECs with high cooling power capacities nominal. Analytical results show that significant thermal enhancements are achievable based on optimized currents and cooling configurations. The validation of the present analysis is also conducted through experimental measurements and comparison with previous solutions.

An Approach To Numerical Simulation Of Thermal Contact Problems In Modern Electronic Packages

The increasing demand on higher packaging density, higher frequency and higher power of the electronic devices is a challenge for contemporary engineers to be able to simulate and prototype as mechanical as thermal problems. The heat dissipation problem is becoming nowadays a crucial issue and requires application of materials with high thermal conductivity and novel packaging methods. Currently there are a number of recognised “bottle necks” for heat dissipation in electronic packages. One of them is a thermal contact resistance (TCR), which arises in the region where two solid contact members touch each other. The high TCR reduces the amount of heat which can be transmitted from the heat source to the heat sink and the same raises the device temperature and reduces the overall reliability of the package due to thermo-mechanical stresses. There have been a large number of theoretical and experimental investigations performed to understand and improve the knowledge on TCR. The TCR arises in the region of contact, when two solids are pressed together. The real contact area is only a small fraction of the nominal or apparent area [1]. Despite of the profound studies not fully understanding and satisfactory method has been elaborated to be able to predict with reasonable accuracy the heat conduction across the contact. Besides, the thermal properties of TCR are not known and only some assumptions are made to be able to simulate the temperature distribution over electronic packages with the TCR existence. In this paper a combined experimental-numerical approach to the simulation of thermal contact problems in electronic package is applied. The test results revel that the approach can be a promising solution allowing for quick verification and evaluation of temperature distribution in high power electronic packages, which seem to be crucial nowadays.

Thermal management of high power electronics with phase change cooling

A study on the prospect of designing high power electronic packages with phase change cooling is presented, with special emphasis on minimising the rising of junction temperatures due to thermal transient effects. The one-dimensional thermal model consists of a finite slab suddenly exposed to a uniform heat flux at the top surface and cooled by convective air at the bottom. The phase change problem is divided into sub-problems and solved progressively. Before the slab starts to melt, both exact and approximate solutions are presented for the distribution of temperature in the slab as functions of time and Biot number Bi. The necessity of partitioning the time domain into two regimes, separated by the time t0 needed for the thermal front to traverse across the whole slab, is emphasised. After the slab melts, quasi-steady state solutions are obtained both for the melt depth and the evolution of surface temperature as functions of time and Biot number when tm>t0, with tm denoting the time needed for melting to commence at the top surface of the slab. The quasi-steady state solutions are compared with those obtained by using the method of finite elements. Approximate but simple analytical solutions are also constructed for the tm<t0 case which, again, are compared with the finite element results. Finally, these solutions are analysed to guide the design of advanced packages with optimised phase change cooling strategies.

An overview to integrated power module design for high power electronics packaging

In recent years, there has been an explosion in demand for smaller and lighter, more efficient, and less expensive power electronic supplies and converters. There are a number of reasons for this recent necessity, ranging from the need for smaller and cheaper power converters for consumer electronics (such as laptop computers and cellular phones) to the need for highly reliable power electronics for such items as satellite and military craft power systems, which are required to be highly efficient, light in weight, smaller in volume, and low cost. This paper discusses the concept of Integrated Power Modules (IPMs), in which the electronic control circuitry and the high power electronics of the converter are integrated into a single compact standardized module. The advantages and disadvantages of such an approach will be discussed in reference to the current industry standard for power electronics design and packaging. The researchers will then take the readers through the IPM design, including basic circuit topology layout, module fabrication processes, and finally thermal considerations.

Novel, Matched CTE Integrated Substrates for Power Electronics

ABSTRACTRapid advances in high power electronic packaging require the development of new heat-sink/substrate materials. Advanced composites designed to provide thermal control as well as improved thermal conductivity have the potential to provide benefits in the removal of excess heat from electronic devices. Carbon-carbon (C-C)composites are under consideration for numerous electronic packaging applications. A new manufacturing process has been developed to produce high thermal conductivity (400 W/mK) C-C composites at greatly reduced cost (less than $50/lb). However, low CTE (0.25 × 10−6cm/cm °C) of C-C composites results in reduced fatigue life in chipon- board (COB) applications with silicon chips (CTE ≈ 2.6 × 10−6 cm/cm °C). A novel process was developed to convert the carbon matrix into the SiC matrix which retains the overall high composite thermal conductivity. This novel technology is well-suited for COB applications. Several types of coatings, such as CVD AIN, CVD Si and a polymer slurry-based low dielectric coating were applied to the C-SiC composite. Processing schemes were developed to produce crack-free coatings. Metallization of the dielectric coating was performed for the process integration with electronic devices. Thus, integrated substrates for power electronics were fabricated without the need of conventional metal/ceramic joining and associated high stresses. The properties of this new composite material for power electronics substrates are presented.

A Novel, Low-Cost C-C Composite Heat Sink Material

AbstractRapid advances in high power electronics packaging require the development of new heat sink materials. Advanced composites designed to provide thermal expansion control as well as improved thermal conductivity have the potential to provide benefits in the removal of excess heat from electronic devices. Carbon-carbon (C-C) composits are under consideration for several military and space electronic applications including SEM-E electronic boxes. The high cost of C-C composits has greatly hindered their wide spread commercialization. A new manufacturing process has been developed to produce high thermal conductivity (over 400 W/mK) C-C composites at greatly reduced cost (less than $50/lb). This new material has potential applications as both a heat sink and a substrate. Dielectric coatings such as A1N and diamond were applied to this new type of heat sink material. Processing, as well as mechanical and thermal properties of this new class of heat sink material will be presented.

Elephantine Electronics --- A New Circuit Packaging Problem

Very high voltage-high power electronic equipment packaging techniques present new and unique problems in the field of product engineering and packaging. New electronic systems in this category consist of a number of subunits, but all of the systems utilize a high voltage power supply as the basic unit. In the case of conventional electronic systems, the power supply components have standard shapes and are packaged in accepted configurations. Components performing these same functions in high voltage high power supplies, deviate tremendously from the norm. The power transformer may occupy the same space as a weekend cabin, the filter capacitors may be as large as a railroad car, the rectifiers may give the impression of factory chimney stacks. For reasons of size alone these components require special structural considerations. For reasons of their high voltage-high power operation they also require special configuration considerations. The packaging of equipment in this category involves the packaging of bulky components into an assembly, while considering ease of construction, ease of transportation and the ease of removal of components for maintenance purposes. The components along with the hardware utilized for the support structure, must then constitute a package that provides the most economical utilization of space, and at the same time, provide voltage clearances that may be several orders of magnitude greater than those normally encountered when packaging lower voltage components. In general, this equipment is not contained within a cabinet or rack as is normal in lower voltage circuitry. These equipments usually utilize one or more buildings either in existence or specially designed and constructed for the purpose. Consequently, considerable thought must be given to operator convenience and human engineering. The packaging, integration and manufacturing of a typical system including operational, safety and maintenance considerations will be described.