High Low Frequency Capacitance Method Research Articles

Extracting interface trap density in β-Ga<sub>2</sub>O<sub>3</sub>-based heterointerface

<p indent="0mm">High performance devices need a high quality interface between metal/semiconductor, semiconductor/semiconductor or semiconductor/insulator. In this work, we report three different methods to obtain the interface trap density (<italic>D</italic>_it) in β-Ga₂O₃-based SBD, PN, and MOS capacitors. The characteristics of capacitance-voltage and conductance-voltage corresponding to frequency demonstrate a low <italic>D</italic>_it for Ni-SBD. Also, we introduce admittance spectroscopy (AS) to evaluate <italic>D</italic>_it of NiO/β-Ga₂O₃ PN diode. Moreover, the accurate high-low frequency capacitance method has been adopted for the MOS capacitor. The verified methods for extracting <italic>D</italic>_it offer a quantification of the quality of interface, which contribute to interface processing and device design.

Interface Optimization and Modulation of Leakage Current Conduction Mechanism of Yb2O3/GaSb MOS Capacitors With (NH4)2S Solutions Passivation

In current work, the impact of ammonium sulfide (NH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> ) <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> S solution passivation with varied pH value on the Yb <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /n-GaSb interface has been investigated comparatively. Compared with control samples, the neutral (NH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> ) <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> S solution passivation can effectively reduce oxides layer on GaSb surface and gate leakage via X-ray photoelectron spectroscopy(XPS) measurements and electrical characterization. High-low frequency capacitance method was used to evaluate interface-state density Dit, it was found that capping with Yb <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> can delaythe interface-state generation and the lowest Dit value of 5.18 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> eV <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> for Yb <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /GaSb capacitor with neutral (NH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> ) <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> S was achieved. Moreover, the possible leakage current conduction mechanisms for capacitors measured at room temperature and low temperature have also been discussed systematically.

C-V and J-V investigation of HfO2/Al2O3 bilayer dielectrics MOSCAPs on (100) β-Ga2O3

In this letter, MOS capacitors with bilayer dielectrics consisted of large bandgap Al2O3 and high-k HfO2 in different stacking order on n-type doped (100) β-Ga2O3 are investigated through C − V and J − V measurement. The C − V measurement results reveal that incoming HfO2 makes both bilayer structures attain an increasing dielectric constant, which means a better gate control ability in transistors comparing with single Al2O3. Additionally, the interface state density extracted by high-low frequency capacitance method suggests that Al2O3/(100)β-Ga2O3 with no treatment shows a comparative Dit value (8.0 × 1012 cm-2eV-1 to 2.2 × 1011 cm-2eV-1) with HfO2/(100)β-Ga2O3 (8.4 × 1012 cm-2eV-1 to 1.0 × 1011 cm-2eV-1) in energy range of 0.2 to 0.9 eV. Furthermore, HfO2/Al2O3/Ga2O3 showing a bigger forward breakdown voltage of 11.0 V than 7.8 V of Al2O3/HfO2/Ga2O3 demonstrates that inserted larger bandgap Al2O3 insulator between Ga2O3 semiconductor and high-k HfO2 dielectric can prevent gate leakage current more effectively. Accordingly, the HfO2/Al2O3/Ga2O3 can enhance gate control ability with an acceptable gate breakdown voltage and become an alternative choice in the design of the gate structure for Ga2O3 MOSFETs.

Quantum Confinement and Interface States in ZnO Nanocrystalline Thin-Film Transistors

The experimental current–voltage ( ${I}_{D}$ – ${V}_{G}$ ) and capacitance–voltage ( ${C}$ – ${V}_{G}$ ) characteristics of the bottom-gate/top-contact ZnO thin-film transistors (TFTs) are analyzed accounting for quantum confinement and interface state effects. All the measurements are performed on the same TFTs composed of a 45-nm-thick nanocrystalline ZnO channel, indium tin oxide gate electrode, and a 21-nm-thick Al2O3 gate insulator. Interface state density (Dit) derived from the combined high–low frequency capacitance method reveals a large Dit near the conduction band edge. The TFT characteristics are simulated using a Schrodinger–Poisson model and compared to a semiclassical model. The Schrodinger–Poisson model calculates a lower C in accumulation by correctly accounting for the peak carrier concentration being several nanometers away from the ZnO/Al2O3 interface. The fit error in ${C}$ – ${V}_{G}$ in strong accumulation is only 1.2% compared to 4% in the semiclassical simulations. All simulations are performed using 21 nm of Al2O3. An effective mobility ( $\mu _{\mathrm{ eff}}$ ) that increases linearly with gate voltage is derived from the ratio of the experimental ${I}_{D}$ and the simulated mobile charge per unit area of the channel. Ignoring quantum confinement overestimates the channel charge and hence underestimates $\mu _{\mathrm{ eff}}$ by 40%. An additional Dit profile, at the top interface of the ZnO, is proposed in our analysis to explain the ${I}_{D}$ – ${V}_{G}$ characteristics in the subthreshold region.

Direct observation of inversion capacitance in p-type diamond MOS capacitors with an electron injection layer

The electrical properties of Al2O3/p-type diamond (111) MOS capacitors were studied with the goal of furthering diamond-based semiconductor research. To confirm the formation of an inversion layer in the p-type diamond body, an n-type layer for use as a minority carrier injection layer was selectively deposited onto p-type diamond. To form the diamond MOS capacitors, Al2O3 was deposited onto OH-terminated diamond using atomic layer deposition. The MOS capacitor showed clear inversion capacitance at 10 Hz. The minority carrier injection from the n-type layer reached the inversion n-channel diamond MOS field-effect transistor (MOSFET). Using the high-low frequency capacitance method, the interface state density, Dit, within an energy range of 0.1–0.5 eV from the valence band edge energy, Ev, was estimated at (4–9) × 1012 cm−2 eV−1. However, the high Dit near Ev remains an obstacle to improving the field effect mobility for the inversion p-channel diamond MOSFET.

ALD TiO2 thin film as dielectric for Al/p-Si Schottky diode

Electrical analysis of Al/p-Si Schottky diode with titanium dioxide (TiO2) thin film was performed at room temperature. The forward and reverse bias current–voltage (I–V) characteristics of diode were studied. Using thermionic emission (TE) theory, the main electrical parameters of the Al/TiO2/p-Si Schottky diode such as ideality factor (n), zero bias barrier height (ϕ Bo) and series resistance (R s) were estimated from forward bias I–V plots. At the same time, values of n, ϕ Bo and R s were obtained from Cheung’s method. It was shown that electrical parameters obtained from TE theory and Cheung’s method exhibit close agreement with each other. The reverse-bias leakage current mechanism of Al/TiO2/p-Si Schottky barrier diodes was investigated. The I–V curves in the reverse direction are taken and interpreted via both Schottky and Poole–Frenkel effects. Schottky effect was found to be dominant in the reverse direction. In addition, the capacitance–voltage (C–V) and conductance–voltage (G/w–V) characteristics of diode were investigated at different frequencies (50–500 kHz). The frequency dependence of interface states density was obtained from the Hill–Coleman method and the voltage dependence of interface states density was obtained from the high–low frequency capacitance method.

Analyses of temperature-dependent interface states, series resistances, and AC electrical conductivities of Al/p—Si and Al/Bi4Ti3O12/p—Si structures by using the admittance spectroscopy method

In this study, Al/p—Si and Al/Bi4Ti3O12/p—Si structures are fabricated and their interface states (Nss), the values of series resistance (Rs), and AC electrical conductivity (σac) are obtained each as a function of temperature using admittance spectroscopy method which includes capacitance—voltage (C—V) and conductance—voltage (G—V) measurements. In addition, the effect of interfacial Bi4Ti3O12 (BTO) layer on the performance of the structure is investigated. The voltage-dependent profiles of Nss and Rs are obtained from the high-low frequency capacitance method and the Nicollian method, respectively. Experimental results show that Nss and Rs, as strong functions of temperature and applied bias voltage, each exhibit a peak, whose position shifts towards the reverse bias region, in the depletion region. Such a peak behavior is attributed to the particular distribution of Nss and the reordering and restructuring of Nss under the effect of temperature. The values of activation energy (Ea), obtained from the slope of the Arrhenius plot, of both structures are obtained to be bias voltage-independent, and the Ea of the metal-ferroelectric-semiconductor (MFS) structure is found to be half that of the metal—semiconductor (MS) structure. Furthermore, other main electrical parameters, such as carrier concentration of acceptor atoms (NA), built-in potential (Vbi), Fermi energy (EF), image force barrier lowering (Δ Φb), and barrier height (Φb), are extracted using reverse bias C−2—V characteristics as a function of temperature.

Low equivalent oxide thickness of TiO2/GaAs MOS capacitor

High quality TiO2 film grown by MOCVD on p-type GaAs with (NH4)2S treatment was obtained. The characteristics of TiO2/GaAs MOS capacitor were further improved by post-metallization annealing treatment. The leakage current densities can reach 1.7×10−6 and 4.5×10−5A/cm2 at ±2V (2.7MV/cm). The equivalent oxide thickness can reach 0.53nm for the physical thickness of 7.5nm. The dielectric constant is 52. The lowest interface state density is 4.7×1011cm−2eV−1 derived by the high-low frequency capacitance method.

Quality Improvements of Titanium Oxide/Gallium Arsenide MOS Capacitors by Post-Metallization Annealing and Sulfur-Treatment

The characteristics of post-metallization annealed TiO2 with various thicknesses on (NH4)2S-treated GaAs were investigated. The electrical characteristics of TiO2 films grown on (NH4)2S-treated GaAs were improved due to the removal of native oxide. The post-metallization annealing treatment can further passivate the grain boundary of TiO2 film and interface of TiO2/GaAs. With both treatments, the leakage current densities of thick TiO2 (77nm)/GaAs are 1.4 × 10-7 and 2.3 × 10-5 A/cm2 at ± 1.5 MV/cm, and that of thin TiO2 (7.5 nm) are 1.7 × 10-6 and 4.5 × 10-5 A/cm2 at ± 2 V (2.7 MV/cm). The dielectric constant and equivalent oxide thickness can reach 52 and 0.53 nm, respectively. The lowest interface state density is 3.8 × 1012 cm-2eV-1 by the high-low frequency capacitance method.

On the temperature dependent profile of interface states and series resistance characteristics in (Ni/Au)/Al 0.22Ga 0.78N/AlN/GaN heterostructures

The bias dependent series resistance ( R s ) and density distribution profile of interface states ( N ss ) of (Ni/Au)/Al 0.22Ga 0.78N/AlN/GaN heterostructure have been investigated by admittance measurements in a wide temperature range of 80–400 K. Experimental results show that both the values of capacitance ( C) and conductance ( G/ ω) were found to be strongly temperature and applied bias voltage dependent. The capacitance–voltage ( C– V) plots give a peak especially at high temperatures in the depletion region and disappear at low temperatures. When the temperature was increased both the values of C and G/ ω reduced. This decrease of capacitance can be understood if the dielectric constant of interfacial layer decreases with increasing temperature. Such temperature dependent behavior of C and G/ ω also can be attributed to the thermal restructuring and reordering of the interface states. The downward curvatures in C– V plots have been attributed to the R s of heterostructure and R s may cause a large deviation in C– V and G/ ω– V data. Therefore, the entire C– V and G/ ω– V measurements were corrected for the effect of R s . Also, the value of R s increases with increasing temperature. The density distribution profile of N ss was obtained from high–low frequency capacitance method. In addition, the temperature dependent ac conductivity ( σ ac ) data obtained between 275 and 400 K show a linear behavior and was fitted to the Arrhenius plot. The E a values were obtained from the slope of ln σ vs 1/ T plots to be −58.5, −59.7, −60.4 and −60.6 meV for the applied biases of −4, −3, −2 and −1 V, respectively.

Interface characterization and current conduction in HfO 2-gated MOS capacitors

Metal-oxide-semiconductor (MOS) capacitors incorporating hafnium dioxide (HfO 2) dielectrics were fabricated and investigated. In this work, the electrical and interfacial properties were characterized based on capacitance–voltage ( C– V) and current–voltage ( I– V) measurements. Thereafter the current conduction mechanism, electron effective mass ( m*), mean density of interface traps per unit area and energy ( D ¯ it ), energy distribution of interface traps density and near-interface oxide traps density ( N NIOT) were studied in details. The characterization reveals that the dominant conduction mechanism in the region of high temperature and high field is Schottky emission. The mean density of interface traps per unit area and energy is about 6.3 × 10 12 cm −2 eV −1 by using high–low frequency capacitance method. The maximum D it is about 7.76 × 10 12 cm −2 eV −1 located at 0.27 eV above the valence band.

Hafnium oxide thin films deposited by high pressure reactive sputtering in atmosphere formed with different Ar/O 2 ratios

The physical and electrical properties of hafnium oxide (HfO 2) thin films deposited by high pressure reactive sputtering (HPRS) have been studied as a function of the Ar/O 2 ratio in the sputtering gas mixture. Transmission electron microscopy shows that the HfO 2 films are polycrystalline, except the films deposited in pure Ar, which are amorphous. According to heavy ion elastic recoil detection analysis, the films deposited without using O 2 are stoichiometric, which means that the composition of the HfO 2 target is conserved in the deposition films. The use of O 2 for reactive sputtering results in slightly oxygen-rich films. Metal-Oxide-Semiconductor (MOS) devices were fabricated to determine the deposited HfO 2 dielectric constant and the trap density at the HfO 2/Si interface ( D it) using the high–low frequency capacitance method. Poor capacitance–voltage ( CV) characteristics and high values of D it are observed in the polycrystalline HfO 2 films. However, a great improvement of the electrical properties was observed in the amorphous HfO 2 films, showing dielectric constant values close to 17 and a minimum D it of 2×10 11 eV −1 cm −2.

Influence of electron cyclotron resonance nitrogen plasma exposure on the electrical characteristics of SiNx:H/InP structures

We have studied the influence of nitrogen plasma exposure of the InP surface on the electrical characteristics of electron cyclotron resonance deposited Al/SiNx:H/InP devices. Nitrogen plasma exposure was performed just before the SiNx:H deposition without vacuum breaking. A 30 s plasma treatment at low microwave power (60 W) sharply reduces the minimum of the interface trap density, from 4×1012 to 1.6×1012 eV−1 cm−2 (obtained by the high–low frequency capacitance method). We explain this reduction due to the formation of P–N and/or In–P–N complexes at the InP surface during the plasma-exposure step. These bonds are broken thermally after a rapid thermal annealing of the device. The minimum of the interface trap density, obtained at the optimum plasma exposure conditions, is among the lowest ones reported in the literature and similar to those obtained with more complicated processing technologies of the SiNx:H/InP structure. This is a clear indication that plasma exposure in N2 atmosphere seems to be a valuable and simple surface conditioning method.